/** @file
  This file describes the contents of the ACPI DMA address Remapping

@copyright
  INTEL CONFIDENTIAL
  Copyright 2016 - 2020 Intel Corporation.

  The source code contained or described herein and all documents related to the
  source code ("Material") are owned by Intel Corporation or its suppliers or
  licensors. Title to the Material remains with Intel Corporation or its suppliers
  and licensors. The Material may contain trade secrets and proprietary and
  confidential information of Intel Corporation and its suppliers and licensors,
  and is protected by worldwide copyright and trade secret laws and treaty
  provisions. No part of the Material may be used, copied, reproduced, modified,
  published, uploaded, posted, transmitted, distributed, or disclosed in any way
  without Intel's prior express written permission.

  No license under any patent, copyright, trade secret or other intellectual
  property right is granted to or conferred upon you by disclosure or delivery
  of the Materials, either expressly, by implication, inducement, estoppel or
  otherwise. Any license under such intellectual property rights must be
  express and approved by Intel in writing.

  Unless otherwise agreed by Intel in writing, you may not remove or alter
  this notice or any other notice embedded in Materials by Intel or
  Intel's suppliers or licensors in any way.

  This file contains a 'Intel Peripheral Driver' and is licensed as such under the terms
  of your license agreement with Intel or your vendor. This file may be modified
  by the user, subject to the additional terms of the license agreement.

@par Specification Reference:
**/
#include "Dmar.h"
#include <Register/P2sbRegs.h>

EFI_ACPI_DMAR_TABLE DmarTable = {
  //
  // EFI_ACPI_DMAR_HEADER
  //
  {
    //
    // EFI_ACPI_DESCRIPTION_HEADER
    //
    {
      EFI_ACPI_VTD_DMAR_TABLE_SIGNATURE,
      sizeof (EFI_ACPI_DMAR_TABLE),
      EFI_ACPI_DMAR_TABLE_REVISION,

      //
      // Checksum will be updated at runtime
      //
      0x00,

      //
      // It is expected that these values will be programmed at runtime
      //
      { 'I', 'N', 'T', 'E', 'L', ' ' },
      EFI_ACPI_DMAR_OEM_TABLE_ID,
      0x1,
      EFI_ACPI_DMAR_OEM_CREATOR_ID,
      1
    },

    //
    // DMAR table specific entries below:
    //

    //
    // 39-bit addressing Host Address Width
    //
    38,

    //
    // Flags
    //
    0,

    //
    // Reserved fields
    //
    { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
  },

  //
  // First DRHD structure, VT-d Engine #1
  //
  {
    //
    // EFI_ACPI_DMAR_DRHD_HEADER
    //
    {
      {0,                                         // Type = 0 (DRHD)
      sizeof (EFI_ACPI_DRHD_ENGINE1_STRUCT)},     // Length of structure
      0,                                          // Flag - Do not include all
      0,                                          // Reserved fields
      0,                                          // Segment
      0                                           // Base address of DMA-remapping hardware - Updated at boot time
    },
    //
    // Device Scopes
    //
    {
      {
        {1,                                     // Type
        sizeof (EFI_ACPI_DEV_SCOPE_STRUCTURE),  // Length
        0,                                      // Segment number
        0,                                      // Reserved
        0},                                     // Start bus number
        {2, 0}                                  // PCI path
      }
    }
  },
#if FixedPcdGetBool(PcdIpuEnable) == 1
  //
  // Second DRHD structure, VT-d Engine #2
  //
  {
    //
    // EFI_ACPI_DMAR_DRHD_HEADER
    //
    {
      {0,                                         // Type = 0 (DRHD)
      sizeof (EFI_ACPI_DRHD_ENGINE1_STRUCT)},     // Length of structure
      0,                                          // Flag - Do not include all
      0,                                          // Reserved fields
      0,                                          // Segment
      0                                           // Base address of DMA-remapping hardware - Updated at boot time
    },
    //
    // Device Scopes
    //
    {
      {
        {1,                                     // Type
        sizeof (EFI_ACPI_DEV_SCOPE_STRUCTURE),  // Length
        0,                                      // Segment number
        0,                                      // Reserved
        0},                                     // Start bus number
        {5, 0}                                  // PCI path
      }
    }
  },
#endif
  //
  //Third DRHD structure VT-d Engine# 3
  //
  {
    //
    // EFI_ACPI_DMAR_DRHD_HEADER
    //
    {
      {0,                                        // Type = 0 (DRHD)
      sizeof (EFI_ACPI_DRHD_ENGINE3_STRUCT)},    // Length of strucure.
      1,                                         // Flag - Include all
      0,                                         // Reserved
      0,                                         // Segment Number
      0                                          // Base address of DMA-remapping hardware.
    },
    {
      //
      // Device Scopes
      //
      {
        {3,                                          // Type=IO APIC
        sizeof (EFI_ACPI_DEV_SCOPE_STRUCTURE),       // Length
        0,                                           // Reserved
        2,                                           // Enumeration ID
        V_P2SB_CFG_IBDF_BUS},                        // Start bus number
        {V_P2SB_CFG_IBDF_DEV, V_P2SB_CFG_IBDF_FUNC}  // PCI path
      },
      //
      // Device Scopes
      //
      {
        {4,                                          // Type=HPET
        sizeof (EFI_ACPI_DEV_SCOPE_STRUCTURE),       // Length
        0,                                           // Reserved
        0,                                           // Enumeration ID
        V_P2SB_CFG_HBDF_BUS},                        // Start bus number
        {V_P2SB_CFG_HBDF_DEV, V_P2SB_CFG_HBDF_FUNC}  // PCI path
      }
    }
  },
  //RMRR structure for IGD device.
  {
    //
    // EFI_ACPI_DMAR_RMRR_HEADER
    //
    {
      {
        0x1,                                    // Type 1 - RMRR structure
        sizeof(EFI_ACPI_RMRR_IGD_STRUC)         // Length
      },
      { 0x00, 0x00 },                           // Reserved
      0x0000,                                   // Segment Num
      0x0000000000000000,                       // RMRR Base address - Updated in runtime.
      0x0000000000000000                        // RMRR Limit address - Updated in runtime.
    },
    //
    // Device Scopes
    //
    {
      {
        {1,                                   // Type
        sizeof (EFI_ACPI_DEV_SCOPE_STRUCTURE), // Length
        0,                                    // Reserved
        0,                                    // Enum ID
        0},                                   // Start bus number
        {2, 0}                                // PCI path
      }
    }
  }
};

//
// Dummy function required for build tools
//
#if defined (__GNUC__)
VOID*
ReferenceAcpiTable (
  VOID
  )

{
  //
  // Reference the table being generated to prevent the optimizer from removing the
  // data structure from the exeutable
  //
  return (VOID*)&DmarTable;
}
#else
int
main (
  VOID
  )
{
  return 0;
}
#endif