211 lines
6.3 KiB
C
211 lines
6.3 KiB
C
/** @file
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Implements TPM2 PTP ( Platform TPM Profile ) Device Library
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;******************************************************************************
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;* Copyright (c) 2014, Insyde Software Corp. All Rights Reserved.
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;*
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;* You may not reproduce, distribute, publish, display, perform, modify, adapt,
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;* transmit, broadcast, present, recite, release, license or otherwise exploit
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;* any part of this publication in any form, by any means, without the prior
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;* written permission of Insyde Software Corporation.
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;*
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;******************************************************************************
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*/
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#ifndef _TPM2_PTP_COMM_LIB_H_
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#define _TPM2_PTP_COMM_LIB_H_
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#include <Uefi.h>
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//
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// Default Timeout values
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//
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#define PTP_HCI_TIMEOUT_A 750 * 1000 // 750 ms
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#define PTP_HCI_TIMEOUT_B 2000 * 1000 // 2 s
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#define PTP_HCI_TIMEOUT_C 200 * 1000 // 200 ms
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#define PTP_HCI_TIMEOUT_D 30 * 1000 // 30 ms
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#define PTP_HCI_POLLING_PERIOD 140 // Poll register every 140 microsecondss
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#define PTP_HCI_RESPONSE_HEADER_SIZE 12 // TPM2_RESPONSE_HEADER size
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#define TPM_LOCALITY_BUFFER_SIZE 0x10000 // Locality Buffer Size
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//
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// PTP HCI Control Area
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//
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#define R_PTP_LOCALITY_STATE 0x00
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#define R_TPM_LOCALITY_CONTROL 0X08
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#define R_TPM_LOCALITY_STATUS 0x0C
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#define R_TPM_INTERFACE_ID 0x30
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#define R_CRB_CONTROL_EXT 0x38
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#define R_CRB_CONTROL_REQ 0x40
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#define R_CRB_CONTROL_STS 0x44
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#define R_CRB_CONTROL_CANCEL 0x48
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#define R_CRB_CONTROL_START 0x4C
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#define R_CRB_CONTROL_INT 0x50
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#define R_CRB_CONTROL_CMD_SIZE 0x58
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#define R_CRB_CONTROL_CMD_LOW 0x5C
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#define R_CRB_CONTROL_CMD_HIGH 0x60
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#define R_CRB_CONTROL_RESPONSE_SIZE 0x64
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#define R_CRB_CONTROL_RESPONSE_ADDR 0x68
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#define R_CRB_DATA_BUFFER 0x80
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//
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// R_CRB_CONTROL_STS Bits
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//
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#define B_CRB_CONTROL_STS_TPM_STATUS 0x00000001 // BIT0
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#define B_CRB_CONTROL_STS_TPM_IDLE 0x00000002 // BIT1
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//
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// R_CRB_CONTROL_REQ Bits
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//
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#define B_R_CRB_CONTROL_REQ_COMMAND_READY 0x00000001 // BIT0
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#define B_R_CRB_CONTROL_REQ_GO_IDLE 0x00000002 // BIT1
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//
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// R_CRB_CONTROL_START Bits
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//
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#define B_CRB_CONTROL_START 0x00000001 // BIT0
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//
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// R_TPM_INTERFACE_ID Bits
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//
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#define B_TPM_INTERFACE_FIFO 0x0000
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#define B_TPM_INTERFACE_CRB 0x0001
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#define B_TPM_INTERFACE_TIS 0xFFFF
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//
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// R_CRB_CONTROL_CANCEL Bits
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//
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#define B_CRB_CONTROL_CANCEL 0x00000001 // BIT0
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//
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// R_TPM_LOCALITY_STATUS Bits
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//
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#define B_CRB_LOCALITY_STS_GRANTED 0x00000001 // BIT0
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#define B_CRB_LOCALITY_STS_BEEN_SEIZED 0x00000002 // BIT1
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//
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// R_TPM_LOCALITY_CONTROL Bits
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//
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#define B_CRB_LOCALITY_CTL_REQUEST_ACCESS 0x00000001 // BIT0
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#define B_CRB_LOCALITY_CTL_RELINQUISH 0x00000002 // BIT1
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#define B_CRB_LOCALITY_CTL_SEIZE 0x00000004 // BIT2
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//
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// R_PTP_LOCALITY_STATE Bits
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//
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#define B_CRB_LOCALITY_STATE_TPM_ESTABLISHED 0x00000001 // BIT0
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#define B_CRB_LOCALITY_STATE_LOCALITY_ASSIGNED 0x00000002 // BIT1
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#define B_CRB_LOCALITY_STATE_REGISTER_VALID 0x00000080 // BIT7
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//
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// R_PTP_LOCALITY_STATE Mask Values
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//
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#define V_CRB_LOCALITY_STATE_ACTIVE_LOC_MASK 0x0000001C // Bits [4:2]
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//
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// Value written to R_PTP_HCI_CMD and CA_START
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// to indicate that a command is available for processing
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//
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#define V_PTP_HCI_COMMAND_AVAILABLE_START 0x00000001
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#define V_PTP_HCI_COMMAND_AVAILABLE_CMD 0x00000000
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#define V_PTP_HCI_BUFFER_ADDRESS_RDY 0x00000003
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//
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// Ignore bit setting mask for WaitRegisterBits
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//
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#define V_PTP_HCI_IGNORE_BITS 0x00000000
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//
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// All bits clear mask for WaitRegisterBits
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//
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#define V_PTP_HCI_ALL_BITS_CLEAR 0xFFFFFFFF
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#define V_PTP_HCI_START_CLEAR 0x00000001
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//
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// Max CRB command/reponse buffer length
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//
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#define S_PTP_HCI_CRB_LENGTH 3968 // 0xFED40080:0xFED40FFF = 3968 Bytes
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/**
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Check whether CRB interface activated.
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@retval TRUE CRB is active.
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@retval FALSE CRB is not active.
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**/
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BOOLEAN
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EFIAPI
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IsCrbInterfaceActive (
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VOID
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);
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/**
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Sets TPM_LOC_CTRL register to a defined value to indicate that a command is
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available for processing.
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@retval EFI_SUCCESS Register successfully written.
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@retval TBD
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**/
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EFI_STATUS
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EFIAPI
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PtpTpm2RequestUseTpm (
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VOID
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);
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/**
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Sends command to TPM for execution.
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@param[in] Buffer Buffer for TPM command data.
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@param[in] DataLength TPM command data length.
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@retval EFI_SUCCESS Operation completed successfully.
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@retval EFI_TIMEOUT The register can't run into the expected status in time.
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**/
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EFI_STATUS
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EFIAPI
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PtpTpm2Send (
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IN UINT8 *Buffer,
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IN UINT32 DataLength
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);
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/**
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Receives response data of last command from TPM.
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@param[out] Buffer Buffer for response data.
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@param[out] RespSize Response data length.
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@retval EFI_SUCCESS Operation completed successfully.
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@retval EFI_TIMEOUT The register can't run into the expected status in time.
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@retval EFI_DEVICE_ERROR Unexpected device status.
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@retval EFI_BUFFER_TOO_SMALL Response data is too long.
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**/
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EFI_STATUS
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EFIAPI
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PtpTpm2Receive (
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OUT UINT8 *Buffer,
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OUT UINT32 *RespSize
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);
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/**
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Sends formatted command to TPM for execution and returns formatted response data.
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@param[in] InputBuffer Buffer for the input data.
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@param[in] InputBufferSize Size of the input buffer.
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@param[out] ReturnBuffer Buffer for the output data.
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@param[out] ReturnBufferSize Size of the output buffer.
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@retval EFI_SUCCESS Operation completed successfully.
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@retval EFI_TIMEOUT The register can't run into the expected status in time.
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**/
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EFI_STATUS
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EFIAPI
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PtpTpm2SubmitCommand (
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IN UINT32 InputParameterBlockSize,
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IN UINT8 *InputParameterBlock,
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IN OUT UINT32 *OutputParameterBlockSize,
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IN UINT8 *OutputParameterBlock
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);
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#endif //_TPM2_PTP_COMM_LIB_H_
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