564 lines
21 KiB
C
564 lines
21 KiB
C
/** @file
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Statements that include other files
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;******************************************************************************
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;* Copyright (c) 2012 - 2021, Insyde Software Corp. All Rights Reserved.
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;*
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;* You may not reproduce, distribute, publish, display, perform, modify, adapt,
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;* transmit, broadcast, present, recite, release, license or otherwise exploit
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;* any part of this publication in any form, by any means, without the prior
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;* written permission of Insyde Software Corporation.
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;*
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;******************************************************************************
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*/
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#include "PciHotPlugDxe.h"
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//
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// Instantiation of Driver private data.
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//
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PCIE_HOT_PLUG_DEVICE_PATH DefaultPcieHotPlugDevicePath [1] = {
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{
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ACPI(0x0),
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PCI(0x20, 0x8),
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END
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}
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};
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EFI_HPC_LOCATION DefaultHpcLocation [1] = {
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{
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(EFI_DEVICE_PATH_PROTOCOL *) &DefaultPcieHotPlugDevicePath[0],
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(EFI_DEVICE_PATH_PROTOCOL *) &DefaultPcieHotPlugDevicePath[0]
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}
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};
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UINTN NumberOfHotplugBridge = 0;
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EFI_HPC_LOCATION *HpcLocationTbl;
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PCIE_HOT_PLUG_DEVICE_PATH *PcieHotPlugDevicePathTbl;
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HOT_PLUG_BRIDGE_INFO *mHotPlugBridgeInfoTable;
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/**
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Entry point for the driver.
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This routine reads the PlatformType GPI on FWH and produces a protocol
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to be consumed by the chipset driver to effect those settings.
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@param[in] ImageHandle The firmware allocated handle for the EFI image.
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@param[in] SystemTable A pointer to the EFI System Table.
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@retval EFI_SUCCESS The entry point is executed successfully.
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**/
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EFI_STATUS
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EFIAPI
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PciHotPlugEntryPoint (
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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)
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{
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EFI_STATUS Status;
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PCI_HOT_PLUG_INSTANCE *PciHotPlug;
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//
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// OemServices
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//
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NumberOfHotplugBridge = 0;
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mHotPlugBridgeInfoTable = NULL;
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DEBUG_OEM_SVC ((DEBUG_INFO, "OemKernelServices Call: OemSvcGetHotplugBridgeInfo \n"));
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Status = OemSvcGetHotplugBridgeInfo (
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&mHotPlugBridgeInfoTable
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);
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DEBUG_OEM_SVC ((DEBUG_INFO, "OemKernelServices OemSvcGetHotplugBridgeInfo Status: %r\n", Status));
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if (!EFI_ERROR (Status)) {
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return Status;
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}
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if (FeaturePcdGet (PcdH2ODxeCpPciHpcGetBridgeInfoSupported)) {
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H2O_DXE_CP_PCI_HPC_GET_BRIDGE_INFO_DATA PciHpcGetBridgeInfoData;
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PciHpcGetBridgeInfoData.Size = sizeof (H2O_DXE_CP_PCI_HPC_GET_BRIDGE_INFO_DATA);
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PciHpcGetBridgeInfoData.Status = H2O_CP_TASK_NORMAL;
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PciHpcGetBridgeInfoData.HotPlugBridgeInfoTable = mHotPlugBridgeInfoTable;
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DEBUG_CP ((DEBUG_INFO, "Checkpoint Trigger: %g\n", &gH2ODxeCpPciHpcGetBridgeInfoGuid));
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H2OCpTrigger (&gH2ODxeCpPciHpcGetBridgeInfoGuid, &PciHpcGetBridgeInfoData);
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DEBUG_CP ((DEBUG_INFO, "Checkpoint Result: %x\n", PciHpcGetBridgeInfoData.Status));
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if (PciHpcGetBridgeInfoData.Status == H2O_CP_TASK_UPDATE) {
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mHotPlugBridgeInfoTable = PciHpcGetBridgeInfoData.HotPlugBridgeInfoTable;
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}
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}
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ProcessHotplugBridgeInfoTable (mHotPlugBridgeInfoTable);
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if (NumberOfHotplugBridge == 0) {
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return EFI_NOT_FOUND;
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}
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PciHotPlug = AllocatePool (sizeof (PCI_HOT_PLUG_INSTANCE));
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if (PciHotPlug == NULL) {
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return EFI_OUT_OF_RESOURCES;
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}
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//
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// Initialize driver private data.
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//
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ZeroMem (PciHotPlug, sizeof (PCI_HOT_PLUG_INSTANCE));
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PciHotPlug->Signature = EFI_PCIHOTPLUG_DRIVER_PRIVATE_SIGNATURE;
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PciHotPlug->HotPlugInitProtocol.GetRootHpcList = GetRootHpcList;
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PciHotPlug->HotPlugInitProtocol.InitializeRootHpc = InitializeRootHpc;
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PciHotPlug->HotPlugInitProtocol.GetResourcePadding = GetResourcePadding;
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Status = gBS->InstallProtocolInterface (
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&PciHotPlug->Handle,
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&gEfiPciHotPlugInitProtocolGuid,
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EFI_NATIVE_INTERFACE,
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&PciHotPlug->HotPlugInitProtocol
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);
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ASSERT_EFI_ERROR (Status);
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return EFI_SUCCESS;
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}
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VOID
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ProcessHotplugBridgeInfoTable (
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IN HOT_PLUG_BRIDGE_INFO *HotPlugBridgeInfoTable
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)
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{
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UINTN Index;
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UINTN Index2;
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Index = 0;
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if (HotPlugBridgeInfoTable == NULL) {
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return;
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}
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//
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// Calculate how many hot plug bridge we have.
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//
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while (HotPlugBridgeInfoTable[Index].NodeUID!= END_OF_TABLE) {
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if (HotPlugBridgeInfoTable[Index].NodeUID != IGNORE_DEVICE) {
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NumberOfHotplugBridge++;
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}
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Index++;
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}
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if (NumberOfHotplugBridge == 0) {
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//
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// There is no Hot plug bridge
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//
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return;
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}
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//
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// Prepare PcieHotPlugDevicePathTbl
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//
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PcieHotPlugDevicePathTbl = AllocatePool ((sizeof (PCIE_HOT_PLUG_DEVICE_PATH) * NumberOfHotplugBridge));
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if (PcieHotPlugDevicePathTbl == NULL) {
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//
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// Fail to allocate memory for table, treat as no hot plug bridge.
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//
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NumberOfHotplugBridge = 0;
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return;
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}
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//
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// Initial Table default
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//
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ZeroMem (PcieHotPlugDevicePathTbl, (sizeof (PCIE_HOT_PLUG_DEVICE_PATH) * NumberOfHotplugBridge));
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for (Index = 0; Index < NumberOfHotplugBridge; Index++) {
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CopyMem ((VOID*)&PcieHotPlugDevicePathTbl[Index].PciRootBridgeNode, (VOID*)&DefaultPcieHotPlugDevicePath[0].PciRootBridgeNode, sizeof (PCIE_HOT_PLUG_DEVICE_PATH));
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}
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//
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// Prepare HotPlugBridgeInfoTable
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//
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HpcLocationTbl = AllocatePool ((sizeof (EFI_HPC_LOCATION) * NumberOfHotplugBridge));
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if (HpcLocationTbl == NULL) {
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//
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// Fail to allocate memory for table, treat as no hot plug bridge.
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//
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NumberOfHotplugBridge = 0;
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return;
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}
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//
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// Initial Table default
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//
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ZeroMem (HpcLocationTbl, (sizeof (EFI_HPC_LOCATION) * NumberOfHotplugBridge));
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for (Index = 0; Index < NumberOfHotplugBridge; Index++) {
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CopyMem ((VOID*)&HpcLocationTbl[Index].HpcDevicePath, (VOID*)&DefaultHpcLocation[0].HpcDevicePath, sizeof (EFI_HPC_LOCATION));
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}
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//
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// Initial table content by HotPlugBridgeInfoTable
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//
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Index = 0;
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Index2 = 0;
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while (HotPlugBridgeInfoTable[Index2].NodeUID != END_OF_TABLE) {
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if (HotPlugBridgeInfoTable[Index2].NodeUID != IGNORE_DEVICE) {
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PcieHotPlugDevicePathTbl[Index].PciRootBridgeNode.UID = HotPlugBridgeInfoTable[Index2].NodeUID;
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PcieHotPlugDevicePathTbl[Index].PciRootPortNode.Device = HotPlugBridgeInfoTable[Index2].DevNum;
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PcieHotPlugDevicePathTbl[Index].PciRootPortNode.Function = HotPlugBridgeInfoTable[Index2].FuncNum;
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HpcLocationTbl[Index].HpcDevicePath = (EFI_DEVICE_PATH_PROTOCOL *)&PcieHotPlugDevicePathTbl[Index];
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HpcLocationTbl[Index].HpbDevicePath = (EFI_DEVICE_PATH_PROTOCOL *)&PcieHotPlugDevicePathTbl[Index];
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Index++;
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}
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Index2++;
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}
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}
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/**
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This procedure returns a list of Root Hot Plug controllers that require
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initialization during boot process
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@param[in] This The pointer to the instance of the EFI_PCI_HOT_PLUG_INIT protocol.
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@param[in] HpcCount The number of Root HPCs returned.
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@param[in] HpcList The list of Root HPCs. HpcCount defines the number of elements in this list.
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@retval EFI_SUCCESS
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**/
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EFI_STATUS
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EFIAPI
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GetRootHpcList (
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IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,
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OUT UINTN *HpcCount,
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OUT EFI_HPC_LOCATION **HpcList
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)
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{
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*HpcCount = (UINTN) NumberOfHotplugBridge;
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*HpcList = HpcLocationTbl;
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return EFI_SUCCESS;
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}
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/**
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This procedure Initializes one Root Hot Plug Controller
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This process may casue initialization of its subordinate buses
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@param[in] This The pointer to the instance of the EFI_PCI_HOT_PLUG_INIT protocol.
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@param[in] HpcDevicePath The Device Path to the HPC that is being initialized.
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@param[in] HpcPciAddress The address of the Hot Plug Controller function on the PCI bus.
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@param[in] Event The event that should be signaled when the Hot Plug Controller initialization is complete. Set to NULL if the caller wants to wait until the entire initialization process is complete. The event must be of the type EFI_EVT_SIGNAL.
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@param[in] HpcState The state of the Hot Plug Controller hardware. The type EFI_Hpc_STATE is defined in section 3.1.
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@retval EFI_SUCCESS
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**/
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EFI_STATUS
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EFIAPI
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InitializeRootHpc (
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IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,
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IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath,
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IN UINT64 HpcPciAddress,
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IN EFI_EVENT Event, OPTIONAL
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OUT EFI_HPC_STATE *HpcState
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)
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{
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if (Event) {
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gBS->SignalEvent (Event);
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}
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*HpcState = EFI_HPC_STATE_INITIALIZED;
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return EFI_SUCCESS;
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}
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/**
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Get start bus number according input unique ID.
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@param[in] Uid Unique ID that is required by ACPI.
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@param[out] BusStartNumber The start bus number that this PCI root bridge resides.
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@retval EFI_SUCCESS Find start bus number successfully.
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@retval EFI_INVALID_PARAMETER BusStartNumber is NULL.
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@retval EFI_NOT_FOUND Cannot find start bus number.
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**/
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STATIC
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EFI_STATUS
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GetBusStartNumberFromUid (
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IN UINT32 Uid,
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OUT UINT32 *BusStartNumber
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)
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{
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EFI_STATUS Status;
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UINTN NoHandles;
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EFI_HANDLE *Handles;
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UINTN Index;
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ACPI_HID_DEVICE_PATH *DevicePath;
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EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
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EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciHostBridge;
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EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *BusNumberRanges;
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if (BusStartNumber == NULL) {
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return EFI_INVALID_PARAMETER;
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}
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Status = gBS->LocateHandleBuffer (
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ByProtocol,
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&gEfiPciRootBridgeIoProtocolGuid,
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NULL,
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&NoHandles,
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&Handles
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);
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if (EFI_ERROR (Status)) {
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return EFI_NOT_FOUND;
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}
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for (Index = 0; Index < NoHandles; Index++) {
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Status = gBS->HandleProtocol (
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Handles[Index],
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&gEfiDevicePathProtocolGuid,
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(VOID **)&DevicePath
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);
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if (EFI_ERROR (Status) || DevicePathType (DevicePath) != ACPI_DEVICE_PATH ||
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DevicePathSubType (DevicePath) != ACPI_DP || DevicePath->UID != Uid) {
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continue;
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}
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Status = gBS->HandleProtocol (
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Handles[Index],
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&gEfiPciRootBridgeIoProtocolGuid,
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(VOID **)&PciRootBridgeIo
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);
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if (EFI_ERROR (Status)) {
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break;
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}
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Status = gBS->HandleProtocol (
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PciRootBridgeIo->ParentHandle,
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&gEfiPciHostBridgeResourceAllocationProtocolGuid,
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(VOID **)&PciHostBridge
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);
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if (EFI_ERROR (Status)) {
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break;
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}
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Status = PciHostBridge->StartBusEnumeration (
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PciHostBridge,
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Handles[Index],
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&BusNumberRanges
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);
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if (EFI_ERROR (Status) || BusNumberRanges == NULL) {
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Status = EFI_NOT_FOUND;
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break;
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}
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if (BusNumberRanges->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR && BusNumberRanges->ResType == ACPI_ADDRESS_SPACE_TYPE_BUS) {
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*BusStartNumber = (UINT32)BusNumberRanges->AddrRangeMin;
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} else {
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Status = EFI_NOT_FOUND;
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}
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FreePool (BusNumberRanges);
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break;
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}
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if (Index == NoHandles) {
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Status = EFI_NOT_FOUND;
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}
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FreePool (Handles);
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return EFI_ERROR (Status) ? EFI_NOT_FOUND : EFI_SUCCESS;
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}
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/**
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Returns the resource padding required by the PCI bus that is controlled by the specified Hot Plug Controller.
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@param[in] This The pointer to the instance of the EFI_PCI_HOT_PLUG_INIT protocol. initialized.
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@param[in] HpcDevicePath The Device Path to the Hot Plug Controller.
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@param[in] HpcPciAddress The address of the Hot Plug Controller function on the PCI bus.
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@param[in] HpcState The state of the Hot Plug Controller hardware. The type EFI_HPC_STATE is defined in section 3.1.
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@param[in] Padding This is the amount of resource padding required by the PCI bus under the control of the specified Hpc. Since the caller does not know the size of this buffer, this buffer is allocated by the callee and freed by the caller.
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@param[in] Attribute Describes how padding is accounted for.
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@retval EFI_SUCCESS
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**/
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EFI_STATUS
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EFIAPI
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GetResourcePadding (
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IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,
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IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath,
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IN UINT64 HpcPciAddress,
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OUT EFI_HPC_STATE *HpcState,
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OUT VOID **Padding,
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OUT EFI_HPC_PADDING_ATTRIBUTES *Attributes
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)
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{
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EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *PaddingResource;
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EFI_STATUS Status;
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UINT64 PciAddress;
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UINTN Index;
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BOOLEAN ResourcePaddingFound;
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BOOLEAN Above4GbMmioSupported;
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UINT8 ReservedBusCount;
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UINT16 ReservedIoRange;
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UINT64 ReservedNonPrefetchableMmio;
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UINT64 AlignmentOfReservedNonPrefetchableMmio;
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UINT64 ReservedPrefetchableMmio;
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UINT64 AlignmentOfReservedPrefetchableMmio;
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UINT32 BusStartNumber;
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Index = 0;
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ResourcePaddingFound = FALSE;
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ReservedBusCount = 0;
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ReservedIoRange = 0;
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ReservedNonPrefetchableMmio = 0;
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AlignmentOfReservedNonPrefetchableMmio = 0;
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ReservedPrefetchableMmio = 0;
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AlignmentOfReservedPrefetchableMmio = 0;
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while (mHotPlugBridgeInfoTable[Index].NodeUID != END_OF_TABLE) {
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if (mHotPlugBridgeInfoTable[Index].NodeUID != IGNORE_DEVICE) {
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BusStartNumber = 0;
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Status = GetBusStartNumberFromUid (mHotPlugBridgeInfoTable[Index].NodeUID, &BusStartNumber);
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if (EFI_ERROR (Status)) {
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return EFI_NOT_READY;
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}
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PciAddress = EFI_PCI_ADDRESS (BusStartNumber, mHotPlugBridgeInfoTable[Index].DevNum, mHotPlugBridgeInfoTable[Index].FuncNum, 0);
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if (HpcPciAddress == PciAddress) {
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ResourcePaddingFound = TRUE;
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ReservedBusCount = mHotPlugBridgeInfoTable[Index].ReservedBusCount;
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ReservedIoRange = mHotPlugBridgeInfoTable[Index].ReservedIoRange;
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ReservedNonPrefetchableMmio = mHotPlugBridgeInfoTable[Index].ReservedNonPrefetchableMmio;
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AlignmentOfReservedNonPrefetchableMmio = mHotPlugBridgeInfoTable[Index].AlignemntOfReservedNonPrefetchableMmio;
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ReservedPrefetchableMmio = mHotPlugBridgeInfoTable[Index].ReservedPrefetchableMmio;
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AlignmentOfReservedPrefetchableMmio = mHotPlugBridgeInfoTable[Index].AlignemntOfReservedPrefetchableMmio;
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break;
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}
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}
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Index++;
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}
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Above4GbMmioSupported = FALSE;
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if (FeaturePcdGet (PcdH2ODxeCpPciHpcGetResourcePaddingSupported)) {
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H2O_DXE_CP_PCI_HPC_GET_RESOURCE_PADDING_DATA PciHpcGetResourcePaddingData;
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PciHpcGetResourcePaddingData.Size = sizeof (H2O_DXE_CP_PCI_HPC_GET_RESOURCE_PADDING_DATA);
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PciHpcGetResourcePaddingData.Status = H2O_CP_TASK_NORMAL;
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PciHpcGetResourcePaddingData.Above4GbMmioSupported = Above4GbMmioSupported;
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PciHpcGetResourcePaddingData.ResourcePaddingFound = ResourcePaddingFound;
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PciHpcGetResourcePaddingData.PciAddress = HpcPciAddress;
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PciHpcGetResourcePaddingData.PciDevicePath = HpcDevicePath;
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PciHpcGetResourcePaddingData.ReservedBusCount = ReservedBusCount;
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PciHpcGetResourcePaddingData.ReservedIoRange = ReservedIoRange;
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PciHpcGetResourcePaddingData.ReservedNonPrefetchableMmio = ReservedNonPrefetchableMmio;
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PciHpcGetResourcePaddingData.AlignmentOfReservedNonPrefetchableMmio = AlignmentOfReservedNonPrefetchableMmio;
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PciHpcGetResourcePaddingData.ReservedPrefetchableMmio = ReservedPrefetchableMmio;
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PciHpcGetResourcePaddingData.AlignmentOfReservedPrefetchableMmio = AlignmentOfReservedPrefetchableMmio;
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DEBUG_CP ((DEBUG_INFO, "Checkpoint Trigger: %g\n", &gH2ODxeCpPciHpcGetResourcePaddingGuid));
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H2OCpTrigger (&gH2ODxeCpPciHpcGetResourcePaddingGuid, &PciHpcGetResourcePaddingData);
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DEBUG_CP ((DEBUG_INFO, "Checkpoint Result: %x\n", PciHpcGetResourcePaddingData.Status));
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if (PciHpcGetResourcePaddingData.Status == H2O_CP_TASK_UPDATE) {
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Above4GbMmioSupported = PciHpcGetResourcePaddingData.Above4GbMmioSupported;
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ResourcePaddingFound = PciHpcGetResourcePaddingData.ResourcePaddingFound;
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ReservedBusCount = PciHpcGetResourcePaddingData.ReservedBusCount;
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ReservedIoRange = PciHpcGetResourcePaddingData.ReservedIoRange;
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ReservedNonPrefetchableMmio = PciHpcGetResourcePaddingData.ReservedNonPrefetchableMmio;
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AlignmentOfReservedNonPrefetchableMmio = PciHpcGetResourcePaddingData.AlignmentOfReservedNonPrefetchableMmio;
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ReservedPrefetchableMmio = PciHpcGetResourcePaddingData.ReservedPrefetchableMmio;
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AlignmentOfReservedPrefetchableMmio = PciHpcGetResourcePaddingData.AlignmentOfReservedPrefetchableMmio;
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}
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}
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if (!ResourcePaddingFound) {
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return EFI_UNSUPPORTED;
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}
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|
PaddingResource = AllocatePool (4 * sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR));
|
|
if (PaddingResource == NULL) {
|
|
return EFI_OUT_OF_RESOURCES;
|
|
}
|
|
|
|
*Padding = (VOID *) PaddingResource;
|
|
|
|
//
|
|
// Padding for bus
|
|
//
|
|
ZeroMem (PaddingResource, 4 * sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR));
|
|
*Attributes = EfiPaddingPciBus;
|
|
|
|
PaddingResource->Desc = 0x8A;
|
|
PaddingResource->Len = 0x2B;
|
|
PaddingResource->ResType = ACPI_ADDRESS_SPACE_TYPE_BUS;
|
|
PaddingResource->GenFlag = 0x0;
|
|
PaddingResource->SpecificFlag = 0;
|
|
PaddingResource->AddrRangeMin = 0;
|
|
PaddingResource->AddrRangeMax = 0;
|
|
PaddingResource->AddrLen = ReservedBusCount;
|
|
//
|
|
// Pad 0 Bus
|
|
//
|
|
// Padding for non-prefetchable memory
|
|
//
|
|
PaddingResource++;
|
|
PaddingResource->Desc = 0x8A;
|
|
PaddingResource->Len = 0x2B;
|
|
PaddingResource->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
|
|
PaddingResource->GenFlag = 0x0;
|
|
PaddingResource->AddrSpaceGranularity = Above4GbMmioSupported ? 64 : 32;
|
|
PaddingResource->SpecificFlag = 0;
|
|
//
|
|
// Pad non-prefetchable
|
|
//
|
|
PaddingResource->AddrRangeMin = 0;
|
|
PaddingResource->AddrLen = ReservedNonPrefetchableMmio;
|
|
//
|
|
// Force minimum 4KByte alignment for Virtualization technology for Directed I/O
|
|
//
|
|
if (PaddingResource->AddrLen < SIZE_4K) {
|
|
PaddingResource->AddrRangeMax = SIZE_4K - 1;
|
|
} else {
|
|
PaddingResource->AddrRangeMax = AlignmentOfReservedNonPrefetchableMmio < SIZE_4K ? SIZE_4K - 1 : AlignmentOfReservedNonPrefetchableMmio - 1;
|
|
}
|
|
//
|
|
// Padding for prefetchable memory
|
|
//
|
|
PaddingResource++;
|
|
PaddingResource->Desc = 0x8A;
|
|
PaddingResource->Len = 0x2B;
|
|
PaddingResource->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;
|
|
PaddingResource->GenFlag = 0x0;
|
|
PaddingResource->AddrSpaceGranularity = Above4GbMmioSupported ? 64 : 32;
|
|
PaddingResource->SpecificFlag = 06;
|
|
//
|
|
// Pad prefetchable
|
|
//
|
|
PaddingResource->AddrRangeMin = 0;
|
|
PaddingResource->AddrLen = ReservedPrefetchableMmio;
|
|
//
|
|
// Force minimum 4KByte alignment for Virtualization technology for Directed I/O
|
|
//
|
|
if (PaddingResource->AddrLen < SIZE_4K) {
|
|
PaddingResource->AddrRangeMax = SIZE_4K - 1;
|
|
} else {
|
|
PaddingResource->AddrRangeMax = AlignmentOfReservedPrefetchableMmio < SIZE_4K ? SIZE_4K - 1 : AlignmentOfReservedPrefetchableMmio - 1;
|
|
}
|
|
//
|
|
// Padding for I/O
|
|
//
|
|
PaddingResource++;
|
|
PaddingResource->Desc = 0x8A;
|
|
PaddingResource->Len = 0x2B;
|
|
PaddingResource->ResType = ACPI_ADDRESS_SPACE_TYPE_IO;
|
|
PaddingResource->GenFlag = 0x0;
|
|
PaddingResource->SpecificFlag = 0;
|
|
PaddingResource->AddrRangeMin = 0;
|
|
PaddingResource->AddrLen = ReservedIoRange;
|
|
//
|
|
// Pad 4K of IO
|
|
//
|
|
PaddingResource->AddrRangeMax = ReservedIoRange / 0x1000;
|
|
//
|
|
// Alignment
|
|
//
|
|
// Terminate the entries.
|
|
//
|
|
PaddingResource++;
|
|
((EFI_ACPI_END_TAG_DESCRIPTOR *) PaddingResource)->Desc = ACPI_END_TAG_DESCRIPTOR;
|
|
((EFI_ACPI_END_TAG_DESCRIPTOR *) PaddingResource)->Checksum = 0x0;
|
|
|
|
*HpcState = EFI_HPC_STATE_INITIALIZED | EFI_HPC_STATE_ENABLED;
|
|
|
|
return EFI_SUCCESS;
|
|
}
|