89 lines
2.4 KiB
C
89 lines
2.4 KiB
C
/** @file
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Initialize DMA controller for ISA device
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;******************************************************************************
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;* Copyright (c) 2019, Insyde Software Corporation. All Rights Reserved.
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;*
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;* You may not reproduce, distribute, publish, display, perform, modify, adapt,
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;* transmit, broadcast, present, recite, release, license or otherwise exploit
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;* any part of this publication in any form, by any means, without the prior
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;* written permission of Insyde Software Corporation.
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;*
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;******************************************************************************
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*/
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#include <Uefi.h>
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#include <Library/IoLib.h>
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#include "8237aRegs.h"
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/**
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Initialize DMA controller for ISA device
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This function initialize a 2-level DMA system consist of 2 Intel 8237A
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(-like) DMA controllers.
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**/
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VOID
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InitDmaController (
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VOID
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)
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{
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UINT8 Data8;
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UINTN Channel;
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//
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// Clear command register and internal flip-flop
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//
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IoWrite8 (R_8237A_DMA1_STS_CMD, 0);
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IoWrite8 (R_8237A_DMA1_CLEAR_BYTE_POINTER, 0);
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IoWrite8 (R_8237A_DMA2_STS_CMD, 0);
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IoWrite8 (R_8237A_DMA2_CLEAR_BYTE_POINTER, 0);
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//
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// Setup CH.0 (a.k.a. CH.4) on DMA2 for cascading
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//
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Data8 =
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V_8237A_CHANNEL_0 |
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(V_8237A_VERIFY_TRANSFER << N_8237A_OPERATION) |
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(V_8237A_AUTO_INIT_DISABLE << N_8237A_AUTO_INIT) |
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(V_8237A_ADDRESS_INCREMENT << N_8237A_ADDRESS_DIRECTION) |
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(V_8237A_CASCADE_MODE << N_8237A_MODE_SELECT);
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IoWrite8 (R_8237A_DMA2_MODE, Data8);
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//
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// Clear Request Register and unset Mask Register of CH.0 (a.k.a. CH.4) on DMA2
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//
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IoWrite8 (R_8237A_DMA2_REQ, 0);
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IoWrite8 (R_8237A_DMA2_SINGLE_MASK, 0);
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for (Channel = 0; Channel <= 3; Channel++) {
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//
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// Setup Mode Register for each channel (except for CH.4)
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//
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Data8 =
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(Channel & B_8237A_CHANNEL_SELECT) |
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(V_8237A_AUTO_INIT_DISABLE << N_8237A_AUTO_INIT) |
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(V_8237A_ADDRESS_INCREMENT << N_8237A_ADDRESS_DIRECTION) |
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(V_8237A_SINGLE_MODE << N_8237A_MODE_SELECT);
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IoWrite8 (R_8237A_DMA1_MODE, Data8);
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if (Channel != 0) {
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IoWrite8 (R_8237A_DMA2_MODE, Data8);
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}
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//
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// Clear Request Register and unset Mask Register for each channel (except for CH.4)
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//
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IoWrite8 (R_8237A_DMA1_REQ, 0);
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IoWrite8 (R_8237A_DMA1_SINGLE_MASK, 0);
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if (Channel != 0) {
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IoWrite8 (R_8237A_DMA1_REQ, 0);
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IoWrite8 (R_8237A_DMA2_SINGLE_MASK, 0);
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}
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}
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}
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