133 lines
3.5 KiB
C
133 lines
3.5 KiB
C
/** @file
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PCI Io Protocol
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;******************************************************************************
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;* Copyright (c) 2015, Insyde Software Corporation. All Rights Reserved.
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;*
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;* You may not reproduce, distribute, publish, display, perform, modify, adapt,
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;* transmit, broadcast, present, recite, release, license or otherwise exploit
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;* any part of this publication in any form, by any means, without the prior
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;* written permission of Insyde Software Corporation.
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;*
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;******************************************************************************
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*/
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#include <PiDxe.h>
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#include <Library/IoLib.h>
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#include "Pci.h"
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/**
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Read/Write PCI configuration space
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@param [in] Write TRUE for writes, FALSE for reads
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@param [in] Width
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@param [in] Address The PCI address of the operation.
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@param [in, out] Buffer The destination buffer to store the results.
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**/
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EFI_STATUS
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RootBridgeIoPciRW (
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IN BOOLEAN Write,
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IN EFI_WIDTH Width,
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IN UINT32 Address,
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IN OUT VOID *Buffer
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)
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{
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UINTN PciData;
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PciData = 0xcfc + (Address & 0x03);
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Address &= ~0x03;
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IoWrite32(0xcf8, Address);
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if (Write)
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{
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switch (Width)
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{
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case EfiWidthUint8:
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IoWrite8((UINT16)PciData, *(UINT8*)Buffer);
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break;
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case EfiWidthUint16:
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IoWrite16((UINT16)PciData, *(UINT16*)Buffer);
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break;
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case EfiWidthUint32:
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IoWrite32((UINT16)PciData, *(UINT32*)Buffer);
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break;
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}
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}
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else
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{
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switch (Width)
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{
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case EfiWidthUint8:
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*(UINT8*)Buffer = IoRead8((UINT16)PciData);
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break;
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case EfiWidthUint16:
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*(UINT16*)Buffer = IoRead16((UINT16)PciData);
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break;
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case EfiWidthUint32:
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*(UINT32*)Buffer = IoRead32((UINT16)PciData);
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break;
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}
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}
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return EFI_SUCCESS;
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}
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/**
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Enables a PCI driver to read PCI controller registers in a
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PCI configuration space under a PCI Root Bridge.
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@param [in] Width
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@param [in] Address The PCI address of the operation.
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@param [in, out] Buffer The destination buffer to store the results.
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@retval EFI_SUCCESS The data was read from the PCI root bridge.
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@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.
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@retval EFI_INVALID_PARAMETER Buffer is NULL.
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@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
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**/
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EFI_STATUS
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PciRead (
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IN EFI_WIDTH Width,
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IN UINT32 Address,
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IN OUT VOID *Buffer
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)
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{
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return RootBridgeIoPciRW (
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FALSE,
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Width,
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Address,
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Buffer
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);
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}
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/**
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Enables a PCI driver to write to PCI controller registers in a
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PCI configuration space under a PCI Root Bridge.
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@param [in] Width
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@param [in] Address The PCI address of the operation.
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@param [in, out] Buffer The source buffer to get the data.
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@retval EFI_SUCCESS The data was read from the PCI root bridge.
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@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.
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@retval EFI_INVALID_PARAMETER Buffer is NULL.
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@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
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**/
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EFI_STATUS
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PciWrite (
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IN EFI_WIDTH Width,
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IN UINT32 Address,
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IN OUT VOID *Buffer
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)
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{
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return RootBridgeIoPciRW (
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TRUE,
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Width,
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Address,
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Buffer
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);
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}
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