212 lines
7.1 KiB
C
212 lines
7.1 KiB
C
/** @file
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This file describes the contents of the ACPI Fixed ACPI Description Table
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(FADT). All changes to the FADT contents should be done in this file.
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2020-2021 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains a 'Sample Driver' and is licensed as such under the terms
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of your license agreement with Intel or your vendor. This file may be modified
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by the user, subject to the additional terms of the license agreement.
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@par Specification Reference:
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**/
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#ifndef _FADT_H_
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#define _FADT_H_
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//
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// Statements that include other files
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//
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#include <IndustryStandard/Acpi.h>
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#include "Register/PmcRegs.h"
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#include "Register/TcoRegs.h"
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//
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// FADT Definitions
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//
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#ifndef EFI_ACPI_OEM_FADT_REVISION
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#define EFI_ACPI_OEM_FADT_REVISION 0x00000000
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#endif
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//
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// For ACPI 1.0 support
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//
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#define EFI_ACPI_INT_MODEL 0x00
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/*
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1 Desktop
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2 Mobile
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3 Workstation
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4 Enterprise Server
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5 SOHO Server
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6 Appliance PC
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7 Performance Server
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*/
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#define EFI_ACPI_PREFERRED_PM_PROFILE 0x01
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#define EFI_ACPI_SCI_INT 0x0009
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#define EFI_ACPI_SMI_CMD 0x000000B2
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#define EFI_ACPI_S4_BIOS_REQ 0xF2
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#define EFI_ACPI_PSTATE_CNT 0x00
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#define EFI_ACPI_GPE1_BASE 0x10
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#define EFI_ACPI_CST_CNT 0x0
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#define EFI_ACPI_P_LVL2_LAT 101
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#define EFI_ACPI_P_LVL3_LAT 1001
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#define EFI_ACPI_FLUSH_SIZE 0x0000
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#define EFI_ACPI_FLUSH_STRIDE 0x0000
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#define EFI_ACPI_DUTY_OFFSET 0x01
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#define EFI_ACPI_DUTY_WIDTH 0x03
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#define EFI_ACPI_DAY_ALRM 0x0D
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#define EFI_ACPI_MON_ALRM 0x00
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#define EFI_ACPI_CENTURY 0x32
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//
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// IA-PC Boot Architecture Flags, see ACPI 6.3 table specification and Acpi61.h
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// We should not use EFI_ACPI_6_3_8042 for legacy free platform, or XP reset fail. No impact to mobile.
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//
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#define EFI_ACPI_IAPC_BOOT_ARCH (EFI_ACPI_6_3_LEGACY_DEVICES)
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//
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// Fixed Feature Flags, see ACPI 6.3 table specification and Acpi6_3.h
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//
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#define EFI_ACPI_FIXED_FEATURE_FLAGS (\
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EFI_ACPI_6_3_USE_PLATFORM_CLOCK | \
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EFI_ACPI_6_3_WBINVD | \
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EFI_ACPI_6_3_DCK_CAP | \
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EFI_ACPI_6_3_FIX_RTC | \
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EFI_ACPI_6_3_RTC_S4 | \
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EFI_ACPI_6_3_SLP_BUTTON | \
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EFI_ACPI_6_3_PROC_C1 | \
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EFI_ACPI_6_3_RESET_REG_SUP \
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)
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//
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// PM1A Event Register Block Generic Address Information
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//
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#define EFI_ACPI_PM1A_EVT_BLK_ADDRESS_SPACE_ID EFI_ACPI_6_3_SYSTEM_IO
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#define EFI_ACPI_PM1A_EVT_BLK_BIT_WIDTH 0x20
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#define EFI_ACPI_PM1A_EVT_BLK_BIT_OFFSET 0x00
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#define EFI_ACPI_PM1A_EVT_BLK_ADDRESS FixedPcdGet16 (PcdAcpiBaseAddress)
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//
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// PM1B Event Register Block Generic Address Information
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//
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#define EFI_ACPI_PM1B_EVT_BLK_ADDRESS_SPACE_ID EFI_ACPI_6_3_SYSTEM_IO
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#define EFI_ACPI_PM1B_EVT_BLK_BIT_WIDTH 0x00
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#define EFI_ACPI_PM1B_EVT_BLK_BIT_OFFSET 0x00
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#define EFI_ACPI_PM1B_EVT_BLK_ADDRESS 0x0000000000000000
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//
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// PM1A Control Register Block Generic Address Information
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//
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#define EFI_ACPI_PM1A_CNT_BLK_ADDRESS_SPACE_ID EFI_ACPI_6_3_SYSTEM_IO
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#define EFI_ACPI_PM1A_CNT_BLK_BIT_WIDTH 0x10
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#define EFI_ACPI_PM1A_CNT_BLK_BIT_OFFSET 0x00
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#define EFI_ACPI_PM1A_CNT_BLK_ADDRESS (EFI_ACPI_PM1A_EVT_BLK_ADDRESS + 0x04)
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//
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// PM1B Control Register Block Generic Address Information
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//
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#define EFI_ACPI_PM1B_CNT_BLK_ADDRESS_SPACE_ID EFI_ACPI_6_3_SYSTEM_IO
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#define EFI_ACPI_PM1B_CNT_BLK_BIT_WIDTH 0x00
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#define EFI_ACPI_PM1B_CNT_BLK_BIT_OFFSET 0x00
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#define EFI_ACPI_PM1B_CNT_BLK_ADDRESS 0x0000000000000000
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//
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// PM2 Control Register Block Generic Address Information
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//
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#define EFI_ACPI_PM2_CNT_BLK_ADDRESS_SPACE_ID EFI_ACPI_6_3_SYSTEM_IO
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#define EFI_ACPI_PM2_CNT_BLK_BIT_WIDTH 0x08
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#define EFI_ACPI_PM2_CNT_BLK_BIT_OFFSET 0x00
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#define EFI_ACPI_PM2_CNT_BLK_ADDRESS (EFI_ACPI_PM1A_EVT_BLK_ADDRESS + 0x50)
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//
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// Power Management Timer Control Register Block Generic Address
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// Information
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//
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#define EFI_ACPI_PM_TMR_BLK_ADDRESS_SPACE_ID EFI_ACPI_6_3_SYSTEM_IO
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#define EFI_ACPI_PM_TMR_BLK_BIT_WIDTH 0x20
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#define EFI_ACPI_PM_TMR_BLK_BIT_OFFSET 0x00
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#define EFI_ACPI_PM_TMR_BLK_ADDRESS (EFI_ACPI_PM1A_EVT_BLK_ADDRESS + 0x08)
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//
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// General Purpose Event 0 Register Block Generic Address
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// Information
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//
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#define EFI_ACPI_GPE0_BLK_ADDRESS_SPACE_ID EFI_ACPI_6_3_SYSTEM_IO
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#define EFI_ACPI_GPE0_BLK_BIT_WIDTH 0x100
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#define EFI_ACPI_GPE0_BLK_BIT_OFFSET 0x00
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#define EFI_ACPI_GPE0_BLK_ADDRESS (EFI_ACPI_PM1A_EVT_BLK_ADDRESS + R_ACPI_IO_GPE0_STS_31_0)
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//
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// General Purpose Event 1 Register Block Generic Address
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// Information
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//
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#define EFI_ACPI_GPE1_BLK_ADDRESS_SPACE_ID EFI_ACPI_6_3_SYSTEM_IO
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#define EFI_ACPI_GPE1_BLK_BIT_WIDTH 0x00
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#define EFI_ACPI_GPE1_BLK_BIT_OFFSET 0x00
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#define EFI_ACPI_GPE1_BLK_ADDRESS 0x0000000000000000
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//
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// Reset Register Generic Address Information
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//
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#define EFI_ACPI_RESET_REG_ADDRESS_SPACE_ID EFI_ACPI_6_3_SYSTEM_IO
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#define EFI_ACPI_RESET_REG_BIT_WIDTH 0x08
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#define EFI_ACPI_RESET_REG_BIT_OFFSET 0x00
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#define EFI_ACPI_RESET_REG_ADDRESS 0x0000000000000CF9
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#define EFI_ACPI_RESET_VALUE 0x06
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//
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// Number of bytes decoded by PM1 event blocks (a and b)
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//
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#define EFI_ACPI_PM1_EVT_LEN ((EFI_ACPI_PM1A_EVT_BLK_BIT_WIDTH + EFI_ACPI_PM1B_EVT_BLK_BIT_WIDTH) / 8)
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//
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// Number of bytes decoded by PM1 control blocks (a and b)
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//
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#define EFI_ACPI_PM1_CNT_LEN ((EFI_ACPI_PM1A_CNT_BLK_BIT_WIDTH + EFI_ACPI_PM1B_CNT_BLK_BIT_WIDTH) / 8)
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//
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// Number of bytes decoded by PM2 control block
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//
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#define EFI_ACPI_PM2_CNT_LEN (EFI_ACPI_PM2_CNT_BLK_BIT_WIDTH / 8)
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//
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// Number of bytes decoded by PM timer block
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//
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#define EFI_ACPI_PM_TMR_LEN (EFI_ACPI_PM_TMR_BLK_BIT_WIDTH / 8)
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//
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// Number of bytes decoded by GPE0 block
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//
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#define EFI_ACPI_GPE0_BLK_LEN (EFI_ACPI_GPE0_BLK_BIT_WIDTH / 8)
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//
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// Number of bytes decoded by GPE1 block
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//
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#define EFI_ACPI_GPE1_BLK_LEN (EFI_ACPI_GPE1_BLK_BIT_WIDTH / 8)
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#endif
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