76 lines
3.0 KiB
Plaintext
76 lines
3.0 KiB
Plaintext
/** @file
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ACPI RTD3 SSDT Library for Generic Pcie Rp with End Point as Discrete Graphics Device to Disable HPD SCI Implementated As D3 Wake Hook .
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2021 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains a 'Sample Driver' and is licensed as such under the terms
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of your license agreement with Intel or your vendor. This file may be modified
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by the user, subject to the additional terms of the license agreement.
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@par Specification Reference:
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**/
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/// @details
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/// Code in this file uses following variables:
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/// WAKG: Discrete Graphics HPD SCI implementated As D3 Wake GPIO - optional
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/** @defgroup pcie_scope PCIe Root Port Scope **/
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//
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// GpioLib imports(DSDT)
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//
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External (\_SB.SHPO, MethodObj)
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Name (DGCE, 0) // DG CS Entry Happen or Exit Happen. 0: CS Exit, 1 : CS Entry
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// Disable Discrete Graphics HPD SCI implementated As D3 Wake GPIO
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// Since DG HPD wake is not required when System is in Sx or S0ix,
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// this method will be used to disable GD HPD SCI Event.
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Method (DHDW) {
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// Disable WAKE
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If (LOr (CondRefOf (WAKG), LNotEqual (WAKG, 0))) {
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\_SB.SHPO (WAKG, 1) // set gpio ownership to driver(0=ACPI mode, 1=GPIO mode)
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\_SB.CAGS (WAKG) // Clear GPIO Status if set for 2-tier GPIO
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}
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}
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// Enable Discrete Graphics HPD SCI implementated As D3 Wake GPIO
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// Since DG HPD wake is not required when System is in Sx or S0ix,
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// this method will be used to enable GD HPD SCI Event.
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Method (EHDW) {
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If (LEqual (DGCE, 1)) {
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// Force Disable the Wake Capability
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DHDW ()
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Return (1)// Enable Failed
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}
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// Enable WAKE
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If (LOr (CondRefOf (WAKG), LNotEqual (WAKG, 0))) {
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\_SB.SHPO (WAKG, 0) // set gpio ownership to ACPI(0=ACPI mode, 1=GPIO mode)
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\_SB.CAGS (WAKG) // Clear GPIO Status if set for 2-tier GPIO
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}
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Return (0) // Enable Successfully
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}
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