alder_lake_bios/Intel/AlderLake/AlderLakeBoardPkg/BoardPkg.dec

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## @file
#
# The DEC files are used by the utilities that parse DSC and
# INF files to generate AutoGen.c and AutoGen.h files
# for the build infrastructure.
#
#******************************************************************************
#* Copyright (c) 2021, Insyde Software Corp. All Rights Reserved.
#*
#* You may not reproduce, distribute, publish, display, perform, modify, adapt,
#* transmit, broadcast, present, recite, release, license or otherwise exploit
#* any part of this publication in any form, by any means, without the prior
#* written permission of Insyde Software Corporation.
#*
#******************************************************************************
#
#@copyright
# INTEL CONFIDENTIAL
# Copyright 2018 - 2021 Intel Corporation.
#
# The source code contained or described herein and all documents related to the
# source code ("Material") are owned by Intel Corporation or its suppliers or
# licensors. Title to the Material remains with Intel Corporation or its suppliers
# and licensors. The Material may contain trade secrets and proprietary and
# confidential information of Intel Corporation and its suppliers and licensors,
# and is protected by worldwide copyright and trade secret laws and treaty
# provisions. No part of the Material may be used, copied, reproduced, modified,
# published, uploaded, posted, transmitted, distributed, or disclosed in any way
# without Intel's prior express written permission.
#
# No license under any patent, copyright, trade secret or other intellectual
# property right is granted to or conferred upon you by disclosure or delivery
# of the Materials, either expressly, by implication, inducement, estoppel or
# otherwise. Any license under such intellectual property rights must be
# express and approved by Intel in writing.
#
# Unless otherwise agreed by Intel in writing, you may not remove or alter
# this notice or any other notice embedded in Materials by Intel or
# Intel's suppliers or licensors in any way.
#
# This file contains a 'Sample Driver' and is licensed as such under the terms
# of your license agreement with Intel or your vendor. This file may be modified
# by the user, subject to the additional terms of the license agreement.
#
# @par Specification Reference:
#
##
[Defines]
DEC_SPECIFICATION = 0x00010017
PACKAGE_NAME = BoardPkg
PACKAGE_VERSION = 0.1
PACKAGE_GUID = A840FA72-FBF7-4357-B301-DAE2233F14AB
[Includes]
Include
Features/Setup/Include
Acpi/AcpiTables
Acpi/AcpiTables/Include
Acpi/AcpiTables/Dsdt
Acpi/AcpiTables/Dsdt/Sio
Acpi/AcpiTables/Mcfg
AlderLakeSBoards/Include
AlderLakeUSimicsBoards/Include
AlderLakeMBoards/Include
AlderLakePBoards/Include
[Guids]
gBoardModuleTokenSpaceGuid = {0x72d1fff7, 0xa42a, 0x4219, {0xb9, 0x95, 0x5a, 0x67, 0x53, 0x6e, 0xa4, 0x2a}}
gPlatformModuleTokenSpaceGuid = {0x69d13bf0, 0xaf91, 0x4d96, {0xaa, 0x9f, 0x21, 0x84, 0xc5, 0xce, 0x3b, 0xc0}}
gBootDeviceInfoGuid = {0x5BD6B672, 0xB6EA, 0x4D6A, {0xB5, 0x90, 0x18, 0xA9, 0x32, 0xB7, 0x87, 0x94}}
gPlatformInitFvLocationGuid = {0xa564010a, 0x1d90, 0x4b1c, {0x8d, 0x10, 0xcb, 0xba, 0xff, 0xb2, 0x55, 0x42}}
gAcpiTableStorageGuid = {0x7e374e25, 0x8e01, 0x4fee, {0x87, 0xf2, 0x39, 0x0c, 0x23, 0xc6, 0x06, 0xcd}}
gOcAcpiTableStorageGuid = {0x22d85435, 0xf24a, 0x43db, {0x7d, 0x04, 0x01, 0x56, 0x06, 0xdf, 0x21, 0xb1}}
gRcAcpiTableStorageGuid = {0x6b5c8fe5, 0x70dd, 0x4e17, {0xbf, 0xf4, 0xd2, 0x1c, 0x26, 0x58, 0x6e, 0xb3}}
gPmaxAcpiTableStorageGuid = {0x66E6C2E4, 0x0245, 0x4545, {0x81, 0x65, 0x12, 0x32, 0x24, 0x80, 0xAF, 0x31}}
gVpdFfsGuid = {0x338FA35A, 0xCA4A, 0x4DBC, {0xA6, 0xF4, 0x9B, 0xD1, 0x59, 0x3B, 0x61, 0xBC}}
##
## PCT configuration file name guids
##
gPctPreMemFileNameGuid = {0x4EA785A4, 0x6BFF, 0x45A2, {0x9D, 0x42, 0xBB, 0x28, 0xC9, 0x53, 0xDD, 0xEC}}
gPctPostMemFileNameGuid = {0xE8633F36, 0x4B3F, 0x4635, {0x84, 0xE5, 0x8E, 0xD6, 0x8B, 0xAB, 0x5B, 0x78}}
gPctAcpiFileNameGuid = {0xF6177C68, 0x96CA, 0x493F, {0x98, 0xBC, 0x2D, 0x3B, 0xF3, 0xBF, 0xC1, 0x91}}
##
## PCT configuration data type guids
##
gPctPreMemGpioDataTypeGuid = {0x8F0A9072, 0x396B, 0xE857, {0xCF, 0xEC, 0x42, 0xF5, 0xEF, 0xC6, 0x48, 0xB7}}
gPctPostMemGpioDataTypeGuid = {0x4202A3E9, 0xC386, 0xB762, {0xA8, 0xCB, 0xFB, 0x19, 0xEF, 0xBE, 0xCF, 0x89}}
gPctAcpiDataTypeGuid = {0xF1716E22, 0x6F24, 0xA1B9, {0xD5, 0xFE, 0x30, 0xC1, 0xE5, 0x9A, 0x3F, 0x39}}
[Protocols]
gPlatformNvsAreaProtocolGuid = {0xc77ae556, 0x40a3, 0x41c0, {0xac, 0xe6, 0x71, 0x43, 0x8c, 0x60, 0xf8, 0x71}}
gFvAppDispatchFlagProtocolGuid = {0x47458821, 0x44a3, 0x43f6, {0x90, 0xda, 0xdf, 0xdf, 0xce, 0x62, 0xf4, 0xfc}}
[Ppis]
gRstRaidControllerPpiGuid = {0x62f52aed, 0xf299, 0x4167, { 0x8e, 0x94, 0xea, 0x61, 0x9f, 0x5, 0x12, 0xad}}
gPeiHybridNvmExpressHostControllerPpiGuid = {0x5da70373, 0xd684, 0x4b95, { 0x9a, 0xae, 0x72, 0x6d, 0xa3, 0xfd, 0x47, 0xcb}}
gReadyForGopConfigPpiGuid = {0x5f252c18, 0x1781, 0x4290, {0xa7, 0xb6, 0xfd, 0x99, 0x63, 0x4c, 0x6a, 0x8a}}
gPeiFvCnvDispatchFlagPpiGuid = {0x2ea45093, 0xa4e6, 0x42ac, {0x86, 0xcf, 0x5e, 0xc6, 0xbf, 0xfb, 0x88, 0x85}}
gPatchConfigurationDataPreMemPpiGuid = {0xa09b1a0c, 0x690c, 0x4d48, {0xa8, 0x98, 0xa1, 0x2c, 0x94, 0x26, 0xd7, 0x06}}
gSetupVariablesReadyPpiGuid = {0xda549f2b, 0xb2ed, 0x43a2, {0xb2, 0x4d, 0xc3, 0x67, 0x67, 0xa8, 0xcf, 0x27}}
[LibraryClasses]
#[-start-201030-IB17510117-add]#
BoardConfigLib|Include/Library/BoardConfigLib.h
#[-end-201030-IB17510117-add]#
[PcdsFixedAtBuild]
gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency|38400000|UINT64|0x32132113
gBoardModuleTokenSpaceGuid.PcdDefaultBoardId|0|UINT16|0x10101009
gBoardModuleTokenSpaceGuid.PcdLpcIoDecodeRange|0x0010|UINT16|0x10001010
gBoardModuleTokenSpaceGuid.PchLpcIoEnableDecoding|0x3c03|UINT16|0x10001011
gBoardModuleTokenSpaceGuid.PcdLpcSioIndexPort|0x4e|UINT16|0x90000018
gBoardModuleTokenSpaceGuid.PcdLpcSioDataPort|0x4f|UINT16|0x9000001F
gBoardModuleTokenSpaceGuid.PcdLpcSioConfigDefaultPort|0x164E|UINT16|0x9000001C
gBoardModuleTokenSpaceGuid.PcdSioBaseAddress|0x0680|UINT16|0x9000001D
gBoardModuleTokenSpaceGuid.PcdSetupEnable |FALSE|BOOLEAN|0xF0000027
gBoardModuleTokenSpaceGuid.PcdS4Enable |FALSE|BOOLEAN|0xF0000028
gBoardModuleTokenSpaceGuid.PcdTerminalEnable |FALSE|BOOLEAN|0xF000002F
gBoardModuleTokenSpaceGuid.PcdAcpiDebugFeatureEnable |FALSE|BOOLEAN|0xF0000045
gBoardModuleTokenSpaceGuid.PcdStartupAcmBinEnable |FALSE|BOOLEAN|0xF0000053
gBoardModuleTokenSpaceGuid.PcdMicrocodeBinEnable |FALSE|BOOLEAN|0xF0000097
gBoardModuleTokenSpaceGuid.PcdStartupAcmProdBinEnable |FALSE|BOOLEAN|0xF0000098
gBoardModuleTokenSpaceGuid.PcdBiosGuardBinEnable |FALSE|BOOLEAN|0xF0000099
gBoardModuleTokenSpaceGuid.PcdEcEnable |FALSE|BOOLEAN|0xF000004D
gBoardModuleTokenSpaceGuid.PcdModularCryptoEnable |FALSE|BOOLEAN|0xF000001B
gBoardModuleTokenSpaceGuid.PcdFFUEnable |FALSE|BOOLEAN|0xF000001C
gBoardModuleTokenSpaceGuid.PcdFspBinGccBuildEnable |FALSE|BOOLEAN|0xF000001D
##
## The Flash PCDs will be patched based on FDF definitions during build.
## Set them to 0 here to prevent confusion.
##
gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesBase|0x00000000|UINT32|0x20000040
gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize|0x00000000|UINT32|0x20000041
gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset|0x00000000|UINT32|0x20000042
gBoardModuleTokenSpaceGuid.PcdFlashFvTsnMacAddressBase|0x00000000|UINT32|0x20000049
gBoardModuleTokenSpaceGuid.PcdFlashFvTsnMacAddressSize|0x00000000|UINT32|0x2000004A
gBoardModuleTokenSpaceGuid.PcdFlashFvTsnMacAddressOffset|0x00000000|UINT32|0x2000004B
gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalBase|0x00000000|UINT32|0x2000004C
gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalSize|0x00000000|UINT32|0x2000004D
gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset|0x00000000|UINT32|0x2000004E
gBoardModuleTokenSpaceGuid.PcdFlashExtendRegionBase|0x00000000|UINT32|0x2000004F
gBoardModuleTokenSpaceGuid.PcdFlashExtendRegionOffset|0x00000000|UINT32|0x20000050
gBoardModuleTokenSpaceGuid.PcdFlashExtendRegionSizeInUse|0x00000000|UINT32|0x20000051
gBoardModuleTokenSpaceGuid.PcdFlashFvExtendedPostMemoryBase|0x00000000|UINT32|0x20000052
gBoardModuleTokenSpaceGuid.PcdFlashFvExtendedPostMemoryOffset|0x00000000|UINT32|0x20000053
gBoardModuleTokenSpaceGuid.PcdFlashFvExtendedPostMemorySize|0x00000000|UINT32|0x20000054
gBoardModuleTokenSpaceGuid.PcdFlashFvExtendedAdvancedBase|0x00000000|UINT32|0x20000055
gBoardModuleTokenSpaceGuid.PcdFlashFvExtendedAdvancedOffset|0x00000000|UINT32|0x20000056
gBoardModuleTokenSpaceGuid.PcdFlashFvExtendedAdvancedSize|0x00000000|UINT32|0x20000057
# BIOS TCC Subregion
gBoardModuleTokenSpaceGuid.PcdFlashFvTccCacheCfgBase|0x00000000|UINT32|0x20000058
gBoardModuleTokenSpaceGuid.PcdFlashFvTccCacheCfgSize|0x00000000|UINT32|0x20000059
gBoardModuleTokenSpaceGuid.PcdFlashFvTccCacheCfgOffset|0x00000000|UINT32|0x2000005A
gBoardModuleTokenSpaceGuid.PcdFlashFvTccCrlBinaryBase|0x00000000|UINT32|0x2000005B
gBoardModuleTokenSpaceGuid.PcdFlashFvTccCrlBinarySize|0x00000000|UINT32|0x2000005C
gBoardModuleTokenSpaceGuid.PcdFlashFvTccCrlBinaryOffset|0x00000000|UINT32|0x2000005D
gBoardModuleTokenSpaceGuid.PcdFlashFvTccStreamCfgBase|0x00000000|UINT32|0x2000005E
gBoardModuleTokenSpaceGuid.PcdFlashFvTccStreamCfgSize|0x00000000|UINT32|0x2000005F
gBoardModuleTokenSpaceGuid.PcdFlashFvTccStreamCfgOffset|0x00000000|UINT32|0x20000060
gBoardModuleTokenSpaceGuid.PcdNhltBinEnable |FALSE|BOOLEAN|0xF000009C
gBoardModuleTokenSpaceGuid.PcdGopConfigBin |FALSE|BOOLEAN|0xF000014E
gBoardModuleTokenSpaceGuid.PcdRaidDriverEfiEnable |FALSE|BOOLEAN|0xF000006C
gBoardModuleTokenSpaceGuid.PcdRsteDriverEfiEnable |FALSE|BOOLEAN|0xF0000083
gBoardModuleTokenSpaceGuid.PcdNvmeEnable |FALSE|BOOLEAN|0xF000006D
gBoardModuleTokenSpaceGuid.PcdIntelRaidEnable |FALSE|BOOLEAN|0xF000003A
gBoardModuleTokenSpaceGuid.PcdSipkgBinaryEnable |FALSE|BOOLEAN|0xF0000A50
gBoardModuleTokenSpaceGuid.PcdFlashObbBase|0x00000000|UINT32|0xF0000A51
gBoardModuleTokenSpaceGuid.PcdFlashObbOffset|0x00000000|UINT32|0xF0000A52
gBoardModuleTokenSpaceGuid.PcdFlashObbSize|0x00000000|UINT32|0xF0000A53
gBoardModuleTokenSpaceGuid.PcdFlashIbbBase|0x00000000|UINT32|0xF0000A57
gBoardModuleTokenSpaceGuid.PcdFlashIbbOffset|0x00000000|UINT32|0xF0000A58
gBoardModuleTokenSpaceGuid.PcdFlashIbbSize|0x00000000|UINT32|0xF0000A59
gBoardModuleTokenSpaceGuid.PcdFlashFvRsvdOffset|0x00000000|UINT32|0x20000A5E
gBoardModuleTokenSpaceGuid.PcdFlashFvRsvdSize|0x00000000|UINT32|0x20000A5F
gBoardModuleTokenSpaceGuid.PcdFlashFvVpdOffset |0x00000000|UINT32|0x200000F0
gBoardModuleTokenSpaceGuid.PcdFlashFvVpdSize |0x00000000|UINT32|0x200000F1
gBoardModuleTokenSpaceGuid.PcdFlashFvVpdBase |0x00000000|UINT32|0x200000F2
gBoardModuleTokenSpaceGuid.PcdFlashIbbRBase|0x00000000|UINT32|0x20000A60
gBoardModuleTokenSpaceGuid.PcdFlashIbbROffset|0x00000000|UINT32|0x20000A61
gBoardModuleTokenSpaceGuid.PcdFlashIbbRSize|0x00000000|UINT32|0x20000A62
#[-start-211208-TAMT000035-add]#
# IPCM Support PCD
gPlatformModuleTokenSpaceGuid.PcdIPCMSupportEnable|TRUE|BOOLEAN|0x20000A63
#[-end-211208-TAMT000035-add]#
[PcdsDynamic]
# Board Init Table List
gBoardModuleTokenSpaceGuid.PcdPeiBoardInitTableList|0|UINT32|0x00000018
gBoardModuleTokenSpaceGuid.PcdDxeBoardInitTableList|0|UINT64|0x00000019
# Board Expander GPIO Table
gBoardModuleTokenSpaceGuid.PcdGpioExpanderTable|0|UINT32|0x00000044
gBoardModuleTokenSpaceGuid.PcdGpioExpanderTableSize|0|UINT16|0x00000045
gBoardModuleTokenSpaceGuid.PcdGpioExpanderTable2|0|UINT32|0x00000046
gBoardModuleTokenSpaceGuid.PcdGpioExpanderTable2Size|0|UINT16|0x00000047
# PCH Misc Configuration
gBoardModuleTokenSpaceGuid.PcdDebugUsbUartEnable|FALSE|BOOLEAN|0x00000061
gBoardModuleTokenSpaceGuid.PcdMipiCamGpioEnable|FALSE|BOOLEAN|0x00000065
gBoardModuleTokenSpaceGuid.PcdSmbiosMainSlotEntry|0|UINT64|0x00000103
gBoardModuleTokenSpaceGuid.PcdUsbcEcPdNegotiation|FALSE|BOOLEAN|0x00000110
# Feature Override Funciton
gBoardModuleTokenSpaceGuid.PcdFuncPeiBoardSpecificInitPostMem|0|UINT32|0x00000F11
gBoardModuleTokenSpaceGuid.PcdFuncBoardConfigInitPreMem|0|UINT32|0x00000F12
gBoardModuleTokenSpaceGuid.PcdFuncBoardConfigInit|0|UINT64|0x00000F13
gBoardModuleTokenSpaceGuid.PcdFuncPeiBoardSpecificInitPreMem|0|UINT32|0x00000F14
# DRAM Configuration
gBoardModuleTokenSpaceGuid.PcdMrcSpdData00|0|UINT32|0x00000170
gBoardModuleTokenSpaceGuid.PcdMrcSpdData01|0|UINT32|0x00000171
gBoardModuleTokenSpaceGuid.PcdMrcSpdData10|0|UINT32|0x00000172
gBoardModuleTokenSpaceGuid.PcdMrcSpdData11|0|UINT32|0x00000173
gBoardModuleTokenSpaceGuid.PcdMrcSpdData|0|UINT32|0x00000174
gBoardModuleTokenSpaceGuid.PcdMrcSpdDataSize|0|UINT16|0x00000175
gBoardModuleTokenSpaceGuid.PcdMrcDqMapCpu2Dram|0|UINT32|0x00000072
gBoardModuleTokenSpaceGuid.PcdMrcDqMapCpu2DramSize|0|UINT16|0x00000073
# SPD Address Table
gBoardModuleTokenSpaceGuid.PcdMrcSpdAddressTable0|0|UINT8|0x00000199
gBoardModuleTokenSpaceGuid.PcdMrcSpdAddressTable1|0|UINT8|0x0000019A
gBoardModuleTokenSpaceGuid.PcdMrcSpdAddressTable2|0|UINT8|0x0000019B
gBoardModuleTokenSpaceGuid.PcdMrcSpdAddressTable3|0|UINT8|0x0000019C
gBoardModuleTokenSpaceGuid.PcdMrcSpdAddressTable4|0|UINT8|0x0000019D
gBoardModuleTokenSpaceGuid.PcdMrcSpdAddressTable5|0|UINT8|0x0000019E
gBoardModuleTokenSpaceGuid.PcdMrcSpdAddressTable6|0|UINT8|0x0000019F
gBoardModuleTokenSpaceGuid.PcdMrcSpdAddressTable7|0|UINT8|0x000001A0
gBoardModuleTokenSpaceGuid.PcdMrcSpdAddressTable8|0|UINT8|0x000001A1
gBoardModuleTokenSpaceGuid.PcdMrcSpdAddressTable9|0|UINT8|0x000001A2
gBoardModuleTokenSpaceGuid.PcdMrcSpdAddressTable10|0|UINT8|0x000001A3
gBoardModuleTokenSpaceGuid.PcdMrcSpdAddressTable11|0|UINT8|0x000001A4
gBoardModuleTokenSpaceGuid.PcdMrcSpdAddressTable12|0|UINT8|0x000001A5
gBoardModuleTokenSpaceGuid.PcdMrcSpdAddressTable13|0|UINT8|0x000001A6
gBoardModuleTokenSpaceGuid.PcdMrcSpdAddressTable14|0|UINT8|0x000001A7
gBoardModuleTokenSpaceGuid.PcdMrcSpdAddressTable15|0|UINT8|0x000001A8
# CA Vref Configuration
gBoardModuleTokenSpaceGuid.PcdMrcCaVrefConfig|0|UINT8|0x0000009D
# Root Port Clock Info
gBoardModuleTokenSpaceGuid.PcdPcieClock0|0|UINT64|0x0000009E
gBoardModuleTokenSpaceGuid.PcdPcieClock1|0|UINT64|0x0000009F
gBoardModuleTokenSpaceGuid.PcdPcieClock2|0|UINT64|0x000000A0
gBoardModuleTokenSpaceGuid.PcdPcieClock3|0|UINT64|0x000000A1
gBoardModuleTokenSpaceGuid.PcdPcieClock4|0|UINT64|0x000000A2
gBoardModuleTokenSpaceGuid.PcdPcieClock5|0|UINT64|0x000000A3
gBoardModuleTokenSpaceGuid.PcdPcieClock6|0|UINT64|0x000000A4
gBoardModuleTokenSpaceGuid.PcdPcieClock7|0|UINT64|0x000000A5
gBoardModuleTokenSpaceGuid.PcdPcieClock8|0|UINT64|0x000000A6
gBoardModuleTokenSpaceGuid.PcdPcieClock9|0|UINT64|0x000000A7
gBoardModuleTokenSpaceGuid.PcdPcieClock10|0|UINT64|0x000000A8
gBoardModuleTokenSpaceGuid.PcdPcieClock11|0|UINT64|0x000000A9
gBoardModuleTokenSpaceGuid.PcdPcieClock12|0|UINT64|0x000000AA
gBoardModuleTokenSpaceGuid.PcdPcieClock13|0|UINT64|0x000000AB
gBoardModuleTokenSpaceGuid.PcdPcieClock14|0|UINT64|0x000000AC
gBoardModuleTokenSpaceGuid.PcdPcieClock15|0|UINT64|0x000000AD
gBoardModuleTokenSpaceGuid.PcdPcieClock16|0|UINT64|0x000000AE
gBoardModuleTokenSpaceGuid.PcdPcieClock17|0|UINT64|0x000000AF
# USB 2.0 PHY Port parameters
gBoardModuleTokenSpaceGuid.PcdUsb20Port0Phy|0|UINT32|0x000000BF
gBoardModuleTokenSpaceGuid.PcdUsb20Port1Phy|0|UINT32|0x000000C0
gBoardModuleTokenSpaceGuid.PcdUsb20Port2Phy|0|UINT32|0x000000C1
gBoardModuleTokenSpaceGuid.PcdUsb20Port3Phy|0|UINT32|0x000000C2
gBoardModuleTokenSpaceGuid.PcdUsb20Port4Phy|0|UINT32|0x000000C3
gBoardModuleTokenSpaceGuid.PcdUsb20Port5Phy|0|UINT32|0x000000C4
gBoardModuleTokenSpaceGuid.PcdUsb20Port6Phy|0|UINT32|0x000000C5
gBoardModuleTokenSpaceGuid.PcdUsb20Port7Phy|0|UINT32|0x000000C6
gBoardModuleTokenSpaceGuid.PcdUsb20Port8Phy|0|UINT32|0x000000C7
gBoardModuleTokenSpaceGuid.PcdUsb20Port9Phy|0|UINT32|0x000000C8
gBoardModuleTokenSpaceGuid.PcdUsb20Port10Phy|0|UINT32|0x000000C9
gBoardModuleTokenSpaceGuid.PcdUsb20Port11Phy|0|UINT32|0x000000CA
gBoardModuleTokenSpaceGuid.PcdUsb20Port12Phy|0|UINT32|0x000000CB
gBoardModuleTokenSpaceGuid.PcdUsb20Port13Phy|0|UINT32|0x000000CC
gBoardModuleTokenSpaceGuid.PcdUsb20Port14Phy|0|UINT32|0x000000CD
gBoardModuleTokenSpaceGuid.PcdUsb20Port15Phy|0|UINT32|0x000000CE
# GPIO Group Tier
gBoardModuleTokenSpaceGuid.PcdGpioGroupToGpeDw0|0|UINT32|0x000000E9
gBoardModuleTokenSpaceGuid.PcdGpioGroupToGpeDw1|0|UINT32|0x000000EA
gBoardModuleTokenSpaceGuid.PcdGpioGroupToGpeDw2|0|UINT32|0x000000EB
# USB 2.0 Port Over Current Pin
gBoardModuleTokenSpaceGuid.PcdUsb20OverCurrentPinPort0|0|UINT8|0x000000CF
gBoardModuleTokenSpaceGuid.PcdUsb20OverCurrentPinPort1|0|UINT8|0x000000D0
gBoardModuleTokenSpaceGuid.PcdUsb20OverCurrentPinPort2|0|UINT8|0x000000D1
gBoardModuleTokenSpaceGuid.PcdUsb20OverCurrentPinPort3|0|UINT8|0x000000D2
gBoardModuleTokenSpaceGuid.PcdUsb20OverCurrentPinPort4|0|UINT8|0x000000D3
gBoardModuleTokenSpaceGuid.PcdUsb20OverCurrentPinPort5|0|UINT8|0x000000D4
gBoardModuleTokenSpaceGuid.PcdUsb20OverCurrentPinPort6|0|UINT8|0x000000D5
gBoardModuleTokenSpaceGuid.PcdUsb20OverCurrentPinPort7|0|UINT8|0x000000D6
gBoardModuleTokenSpaceGuid.PcdUsb20OverCurrentPinPort8|0|UINT8|0x000000D7
gBoardModuleTokenSpaceGuid.PcdUsb20OverCurrentPinPort9|0|UINT8|0x000000D8
gBoardModuleTokenSpaceGuid.PcdUsb20OverCurrentPinPort10|0|UINT8|0x000000D9
gBoardModuleTokenSpaceGuid.PcdUsb20OverCurrentPinPort11|0|UINT8|0x000000DA
gBoardModuleTokenSpaceGuid.PcdUsb20OverCurrentPinPort12|0|UINT8|0x000000DB
gBoardModuleTokenSpaceGuid.PcdUsb20OverCurrentPinPort13|0|UINT8|0x000000DC
gBoardModuleTokenSpaceGuid.PcdUsb20OverCurrentPinPort14|0|UINT8|0x000000DD
gBoardModuleTokenSpaceGuid.PcdUsb20OverCurrentPinPort15|0|UINT8|0x000000DE
# USB 3.0 Port Over Current Pin
gBoardModuleTokenSpaceGuid.PcdUsb30OverCurrentPinPort0|0|UINT8|0x000000DF
gBoardModuleTokenSpaceGuid.PcdUsb30OverCurrentPinPort1|0|UINT8|0x000000E0
gBoardModuleTokenSpaceGuid.PcdUsb30OverCurrentPinPort2|0|UINT8|0x000000E1
gBoardModuleTokenSpaceGuid.PcdUsb30OverCurrentPinPort3|0|UINT8|0x000000E2
gBoardModuleTokenSpaceGuid.PcdUsb30OverCurrentPinPort4|0|UINT8|0x000000E3
gBoardModuleTokenSpaceGuid.PcdUsb30OverCurrentPinPort5|0|UINT8|0x000000E4
gBoardModuleTokenSpaceGuid.PcdUsb30OverCurrentPinPort6|0|UINT8|0x000000E5
gBoardModuleTokenSpaceGuid.PcdUsb30OverCurrentPinPort7|0|UINT8|0x000000E6
gBoardModuleTokenSpaceGuid.PcdUsb30OverCurrentPinPort8|0|UINT8|0x000000E7
gBoardModuleTokenSpaceGuid.PcdUsb30OverCurrentPinPort9|0|UINT8|0x000000E8
# USB 3.0 Port Over Current Pin
gBoardModuleTokenSpaceGuid.PcdCpuUsb30OverCurrentPinTable|0x0|UINT32|0x0010002C
gBoardModuleTokenSpaceGuid.PcdCpuXhciPortSupportMap|0|UINT8|0x00100031
gBoardModuleTokenSpaceGuid.PcdCpuUsb30PortEnable|0|UINT8|0x00100032
# Display DDI
gBoardModuleTokenSpaceGuid.PcdSaDisplayConfigTable|0|UINT32|0x00100033
gBoardModuleTokenSpaceGuid.PcdSaDisplayConfigTableSize|0|UINT16|0x00100034
# TBT
gBoardModuleTokenSpaceGuid.PcdDTbtControllerNumber|0x1|UINT8|0x0010002A
gBoardModuleTokenSpaceGuid.PcdITbtRootPortNumber|0x0|UINT8|0x0010002B
gBoardModuleTokenSpaceGuid.PcdBoarddTBTForcePwrGpio0|0x0|UINT32|0x00100035
gBoardModuleTokenSpaceGuid.PcdBoarddTBTForcePwrGpio1|0x0|UINT32|0x00100036
gBoardModuleTokenSpaceGuid.PcdBoarddTBTRTD3PwrGpio0|0x0|UINT32|0x00100037
gBoardModuleTokenSpaceGuid.PcdBoarddTBTRTD3PwrGpio1|0x0|UINT32|0x00100059
# MISC
gBoardModuleTokenSpaceGuid.PcdRecoveryModeGpio|0|UINT64|0x0010102F
gBoardModuleTokenSpaceGuid.PcdPc8374SioKbcPresent|FALSE|BOOLEAN|0x000000ED
gBoardModuleTokenSpaceGuid.PcdOddPowerInitEnable|FALSE|BOOLEAN|0x000000EE
gBoardModuleTokenSpaceGuid.PcdSmbusAlertEnable|FALSE|BOOLEAN|0x0010101E
gBoardModuleTokenSpaceGuid.PcdGpioTier2WakeEnable|FALSE|BOOLEAN|0x00000100
# STAT
gBoardModuleTokenSpaceGuid.PcdSataPortsEnable0|0|UINT8|0x000000F0
# CPU
gBoardModuleTokenSpaceGuid.PcdCpuRatio|0x0|UINT8|0x00000200
gBoardModuleTokenSpaceGuid.PcdBiosGuard|0x0|UINT8|0x00000201
# MISC
gBoardModuleTokenSpaceGuid.PcdPs2KbMsEnable|1|UINT8|0x40000A09
gBoardModuleTokenSpaceGuid.PcdStackBase|0x0|UINT32|0x40000A10
gBoardModuleTokenSpaceGuid.PcdStackSize|0x0|UINT32|0x40000A11
gBoardModuleTokenSpaceGuid.PcdNvsBufferPtr|0x0|UINT32|0x40000A12
gBoardModuleTokenSpaceGuid.PcdCleanMemory|0x0|UINT8|0x40000A13
# HDA Verb Table
gBoardModuleTokenSpaceGuid.PcdHdaVerbTableDatabase|0|UINT32|0x0000005A
#
# The PCD which is defined to enable/disable the SATA LED function.
#
gBoardModuleTokenSpaceGuid.PcdSataLedEnable|FALSE|BOOLEAN|0x0010111F
#
# The PCD which is defined to enable/disable EPI Device (for SDS board).
#
#
# The PCD which is defined to enable/disable the VR Alert function.
#
gBoardModuleTokenSpaceGuid.PcdVrAlertEnable|FALSE|BOOLEAN|0x00101020
#
# The PCD which is defined to enable/disable the PCH thermal hot threshold function.
#
gBoardModuleTokenSpaceGuid.PcdPchThermalHotEnable|FALSE|BOOLEAN|0x00101021
#
# The PCD which is defined to enable/disable the memory thermal sensor GPIO C/D function.
#
gBoardModuleTokenSpaceGuid.PcdMemoryThermalSensorGpioCPmsyncEnable|FALSE|BOOLEAN|0x00101022
gBoardModuleTokenSpaceGuid.PcdMemoryThermalSensorGpioDPmsyncEnable|FALSE|BOOLEAN|0x00101023
#
# This PCD is defined to enable/disable TCSS BIOS handshake for PMC-PD solution
#
gBoardModuleTokenSpaceGuid.PcdBoardPmcPdEnable|TRUE|BOOLEAN|0x00101024
# TouchPanel
gBoardModuleTokenSpaceGuid.PcdBoardGpioTableTouchPanel1|0|UINT32|0x00000048
gBoardModuleTokenSpaceGuid.PcdBoardGpioTableTouchPanel1Size|0|UINT16|0x00000049
gBoardModuleTokenSpaceGuid.PcdBoardGpioTableTouchPanel2|0|UINT32|0x0000004A
gBoardModuleTokenSpaceGuid.PcdBoardGpioTableTouchPanel2Size|0|UINT16|0x0000004B
# Backwards compatible
gBoardModuleTokenSpaceGuid.PcdBoardGpioTableTouchPanel|0|UINT32|0x0000004D
# TsnDevice
gBoardModuleTokenSpaceGuid.PcdBoardGpioTableTsnDevice|0|UINT32|0x0000004E
gBoardModuleTokenSpaceGuid.PcdBoardGpioTableTsnDeviceSize|0|UINT16|0x0000004F
# HSIO
# SA Misc Configuration
gBoardModuleTokenSpaceGuid.PcdSaMiscUserBd|0|UINT8|0x00000066
gBoardModuleTokenSpaceGuid.PcdSaMiscMmioSizeAdjustment|0|UINT16|0x00000067
gBoardModuleTokenSpaceGuid.PcdSaDdrFreqLimit|0|UINT16|0x0000A101
gBoardModuleTokenSpaceGuid.PcdSaMiscFirstDimmBitMask|0|UINT8|0x0000A103
gBoardModuleTokenSpaceGuid.PcdSaMiscFirstDimmBitMaskEcc|0|UINT8|0x0000A104
#CVF GPIO configuration
gBoardModuleTokenSpaceGuid.PcdBoardGpioTableCvf|0|UINT32|0x0000B101
gBoardModuleTokenSpaceGuid.PcdBoardGpioTableCvfSize|0|UINT16|0x0000B102
#CVF USB Port configuration
gBoardModuleTokenSpaceGuid.PcdCvfUsbPort|0x0|UINT8|0x0000B103
# ACPI
gBoardModuleTokenSpaceGuid.PcdAcpiSleepState|1|UINT8|0x40000B02
gBoardModuleTokenSpaceGuid.PcdAcpiHibernate|1|UINT8|0x40000B03
gBoardModuleTokenSpaceGuid.PcdLowPowerS0Idle|0|UINT8|0x40000B04
gBoardModuleTokenSpaceGuid.PcdPciExpNative|0|UINT8|0x40000B05
gBoardModuleTokenSpaceGuid.PcdNativeAspmEnable|1|UINT8|0x40000B06
gBoardModuleTokenSpaceGuid.PcdDisableActiveTripPoints|1|UINT8|0x40000B0A
gBoardModuleTokenSpaceGuid.PcdDisablePassiveTripPoints|0|UINT8|0x40000B0B
gBoardModuleTokenSpaceGuid.PcdDisableCriticalTripPoints|1|UINT8|0x40000B0C
gBoardModuleTokenSpaceGuid.PcdAcpiGnvsAddress|0|UINT64|0x40000013
gBoardModuleTokenSpaceGuid.PcdGraphicsVbtGuid|{0x22, 0x61, 0xd4, 0x4a, 0xeb, 0xff, 0x52, 0x4a, 0xbf, 0xb0, 0x51, 0x8c, 0xfc, 0xa0, 0x2d, 0xb0}|VOID*|0x40000014
# Board Information
gBoardModuleTokenSpaceGuid.PcdEcMajorRevision|0x0|UINT8|0x00101008
gBoardModuleTokenSpaceGuid.PcdEcMinorRevision|0x0|UINT8|0x00101009
gBoardModuleTokenSpaceGuid.PcdPlatformGeneration|0x0|UINT8|0x00101011
gBoardModuleTokenSpaceGuid.PcdSpdPresent|FALSE|BOOLEAN|0x00101012
gBoardModuleTokenSpaceGuid.PcdDockAttached|FALSE|BOOLEAN|0x00101013
gBoardModuleTokenSpaceGuid.PcdPlatformType|0x0|UINT8|0x00101014
gBoardModuleTokenSpaceGuid.PcdPlatformFlavor|0x0|UINT8|0x00101015
gBoardModuleTokenSpaceGuid.PcdBoardRev|0x0|UINT16|0x00101016
gBoardModuleTokenSpaceGuid.PcdBoardBomId|0x0|UINT16|0x00101017
gBoardModuleTokenSpaceGuid.PcdBoardId|0|UINT16|0x00101018
gBoardModuleTokenSpaceGuid.PcdBoardType|0x0|UINT8|0x00101019
gBoardModuleTokenSpaceGuid.PcdEcPresent|FALSE|BOOLEAN|0x0010101A
# PcdSkuType 1:ADL S ,2: ADL P ,3:ADL M ,4: Simics
gBoardModuleTokenSpaceGuid.PcdSkuType|0x0|UINT8|0x0010101F
gBoardModuleTokenSpaceGuid.PcdBoardName|L"0123456789ABCDEF0123456789ABCDEF"|VOID*|0x00101007
gBoardModuleTokenSpaceGuid.PcdWakeupType|0x0|UINT8|0x00101004
gBoardModuleTokenSpaceGuid.PcdDisplayId|0x0|UINT16|0x00101032
gBoardModuleTokenSpaceGuid.PcdTcssPdType|0x0|UINT8|0x0010102A
gBoardModuleTokenSpaceGuid.PcdTcssPdNumber|0x0|UINT8|0x0010102B
gBoardModuleTokenSpaceGuid.PcdDiscreteClockOcSupport|FALSE|BOOLEAN|0x0010102C
# MRC Config
gBoardModuleTokenSpaceGuid.PcdMrcRcompResistor|0|UINT32|0x00000A68
gBoardModuleTokenSpaceGuid.PcdMrcRcompTarget|0|UINT32|0x00000A69
gBoardModuleTokenSpaceGuid.PcdMrcDqByteMap|0|UINT32|0x00000A6A
gBoardModuleTokenSpaceGuid.PcdMrcDqByteMapSize|0|UINT16|0x00000A6B
gBoardModuleTokenSpaceGuid.PcdMrcDqsMapCpu2Dram|0|UINT32|0x00000A6C
gBoardModuleTokenSpaceGuid.PcdMrcDqsMapCpu2DramSize|0|UINT16|0x00000A6D
gBoardModuleTokenSpaceGuid.PcdMrcDqPinsInterleavedControl|FALSE|BOOLEAN|0x00000A6E
gBoardModuleTokenSpaceGuid.PcdMrcDqPinsInterleaved|FALSE|BOOLEAN|0x00000A6F
gBoardModuleTokenSpaceGuid.PcdMrcSafeConfig|0|UINT8|0x00000A70
gBoardModuleTokenSpaceGuid.PcdMrcSafeMode|0|UINT8|0x00000A71
gBoardModuleTokenSpaceGuid.PcdMrcSaGv|0|UINT8|0x00000A72
gBoardModuleTokenSpaceGuid.PcdMrcLp5CccConfig|0|UINT8|0x00000A73
gBoardModuleTokenSpaceGuid.PcdMrcCmdMirror|0|UINT8|0x00000A74
# PCIE RTD3 GPIO
gBoardModuleTokenSpaceGuid.PcdRootPortDev|0xFF|UINT8|0x00000A76
gBoardModuleTokenSpaceGuid.PcdRootPortFunc|0xFF|UINT8|0x00000A77
gBoardModuleTokenSpaceGuid.PcdRootPortIndex|0xFF|UINT8|0x00000A78
gBoardModuleTokenSpaceGuid.PcdPcie0GpioSupport|0|UINT8|0x00000078
gBoardModuleTokenSpaceGuid.PcdPcie0HoldRstExpanderNo|0|UINT8|0x0000007A
gBoardModuleTokenSpaceGuid.PcdPcie0HoldRstGpioNo|0|UINT32|0x0000007B
gBoardModuleTokenSpaceGuid.PcdPcie0HoldRstActive|FALSE|BOOLEAN|0x0000007C
gBoardModuleTokenSpaceGuid.PcdPcie0PwrEnableExpanderNo|0|UINT8|0x0000007D
gBoardModuleTokenSpaceGuid.PcdPcie0PwrEnableGpioNo|0|UINT32|0x0000007E
gBoardModuleTokenSpaceGuid.PcdPcie0PwrEnableActive|FALSE|BOOLEAN|0x0000007F
gBoardModuleTokenSpaceGuid.PcdPcie1GpioSupport|0|UINT8|0x00000120
gBoardModuleTokenSpaceGuid.PcdPcie1HoldRstExpanderNo|0|UINT8|0x00000121
gBoardModuleTokenSpaceGuid.PcdPcie1HoldRstGpioNo|0|UINT32|0x00000122
gBoardModuleTokenSpaceGuid.PcdPcie1HoldRstActive|FALSE|BOOLEAN|0x00000123
gBoardModuleTokenSpaceGuid.PcdPcie1PwrEnableExpanderNo|0|UINT8|0x00000124
gBoardModuleTokenSpaceGuid.PcdPcie1PwrEnableGpioNo|0|UINT32|0x00000125
gBoardModuleTokenSpaceGuid.PcdPcie1PwrEnableActive|FALSE|BOOLEAN|0x00000126
gBoardModuleTokenSpaceGuid.PcdPcie2GpioSupport|0|UINT8|0x00000127
gBoardModuleTokenSpaceGuid.PcdPcie2HoldRstExpanderNo|0|UINT8|0x00000128
gBoardModuleTokenSpaceGuid.PcdPcie2HoldRstGpioNo|0|UINT32|0x00000129
gBoardModuleTokenSpaceGuid.PcdPcie2HoldRstActive|FALSE|BOOLEAN|0x0000012A
gBoardModuleTokenSpaceGuid.PcdPcie2PwrEnableExpanderNo|0|UINT8|0x0000012B
gBoardModuleTokenSpaceGuid.PcdPcie2PwrEnableGpioNo|0|UINT32|0x0000012C
gBoardModuleTokenSpaceGuid.PcdPcie2PwrEnableActive|FALSE|BOOLEAN|0x0000012D
gBoardModuleTokenSpaceGuid.PcdPcie3GpioSupport|0|UINT8|0x0000012E
gBoardModuleTokenSpaceGuid.PcdPcie3HoldRstExpanderNo|0|UINT8|0x0000012F
gBoardModuleTokenSpaceGuid.PcdPcie3HoldRstGpioNo|0|UINT32|0x00000130
gBoardModuleTokenSpaceGuid.PcdPcie3HoldRstActive|FALSE|BOOLEAN|0x00000131
gBoardModuleTokenSpaceGuid.PcdPcie3PwrEnableExpanderNo|0|UINT8|0x00000132
gBoardModuleTokenSpaceGuid.PcdPcie3PwrEnableGpioNo|0|UINT32|0x00000133
gBoardModuleTokenSpaceGuid.PcdPcie3PwrEnableActive|FALSE|BOOLEAN|0x00000134
# USB 2.0 PHY Port parameters
gBoardModuleTokenSpaceGuid.PcdUsb2PhyTuningTable|0|UINT32|0x000000BA
# USB 2.0 Port Over Current Pin
gBoardModuleTokenSpaceGuid.PcdUsb2OverCurrentPinTable|0|UINT32|0x000000BC
# USB 3.0 Port Over Current Pin
gBoardModuleTokenSpaceGuid.PcdUsb3OverCurrentPinTable|0|UINT32|0x000000BE
# Pch SerialIo I2c Pads Termination
gBoardModuleTokenSpaceGuid.PcdPchSerialIoI2c0PadInternalTerm|0x1|UINT8|0x00000020
gBoardModuleTokenSpaceGuid.PcdPchSerialIoI2c1PadInternalTerm|0x1|UINT8|0x00000021
gBoardModuleTokenSpaceGuid.PcdPchSerialIoI2c2PadInternalTerm|0x1|UINT8|0x00000022
gBoardModuleTokenSpaceGuid.PcdPchSerialIoI2c3PadInternalTerm|0x1|UINT8|0x00000023
gBoardModuleTokenSpaceGuid.PcdPchSerialIoI2c4PadInternalTerm|0x1|UINT8|0x00000030
gBoardModuleTokenSpaceGuid.PcdPchSerialIoI2c5PadInternalTerm|0x1|UINT8|0x00000031
gBoardModuleTokenSpaceGuid.PcdPchSerialIoI2c6PadInternalTerm|0x1|UINT8|0x00000032
gBoardModuleTokenSpaceGuid.PcdPchSerialIoI2c7PadInternalTerm|0x1|UINT8|0x00000033
# Board related PCH PmConfig
gBoardModuleTokenSpaceGuid.PcdSlpS0VmRuntimeControl|FALSE|BOOLEAN|0x000000F6
gBoardModuleTokenSpaceGuid.PcdSlpS0Vm070VSupport|FALSE|BOOLEAN|0x000000F7
gBoardModuleTokenSpaceGuid.PcdSlpS0Vm075VSupport|FALSE|BOOLEAN|0x000000F8
# Misc
gBoardModuleTokenSpaceGuid.PcdIoExpanderPresent|FALSE|BOOLEAN|0x000000EC
gBoardModuleTokenSpaceGuid.PcdIvCamInitPresent|FALSE|BOOLEAN|0x000000EF
gBoardModuleTokenSpaceGuid.PcdMobileDramPresent|FALSE|BOOLEAN|0x000000F1
gBoardModuleTokenSpaceGuid.PcdCpuVboostEnable|FALSE|BOOLEAN|0x000000F2
# UCMC GPIO Table
gBoardModuleTokenSpaceGuid.PcdBoardUcmcGpioTable|0|UINT32|0x00000111
gBoardModuleTokenSpaceGuid.PcdBoardUcmcGpioTableSize|0|UINT16|0x00000112
gBoardModuleTokenSpaceGuid.PcdBoardUcmcGpio1|0|UINT32|0x0000011B
gBoardModuleTokenSpaceGuid.PcdBoardUcmcGpio2|0|UINT32|0x0000011C
gBoardModuleTokenSpaceGuid.PcdBoardUcmcGpio3|0|UINT32|0x0000011D
gBoardModuleTokenSpaceGuid.PcdBoardUcmcGpio4|0|UINT32|0x0000011E
# ASL PCD
#gBoardModuleTokenSpaceGuid.ReservedAslPcd1 |FALSE|BOOLEAN|0x00100106
gBoardModuleTokenSpaceGuid.PcdRGBCameraAdr |0x00|UINT8|0x0010010F
gBoardModuleTokenSpaceGuid.PcdDepthCameraAdr |0x00|UINT8|0x00100110
#Board Hook
gBoardModuleTokenSpaceGuid.PcdFuncBoardHookPlatformSetupOverride|0x00|UINT64|0x00200001
# DXE PCD
gBoardModuleTokenSpaceGuid.PcdHidI2cIntPad|0x0|UINT32|0x00100201
gBoardModuleTokenSpaceGuid.PcdDetectPs2KbOnCmdAck|FALSE|BOOLEAN|0x00100202
gBoardModuleTokenSpaceGuid.PcdPreferredPmProfile|0x0|UINT8|0x00100205
gBoardModuleTokenSpaceGuid.PcdSpecificIoExpanderBus|0x0|UINT8|0x00100207
gBoardModuleTokenSpaceGuid.PcdFingerPrintSleepGpio|0x0|UINT32|0x00100209
gBoardModuleTokenSpaceGuid.PcdGfxCrbDetectGpio|0x0|UINT64|0x00100217
#PlatformInfoPcd
gBoardModuleTokenSpaceGuid.PcdEnableVoltageMargining|FALSE|BOOLEAN|0x00101000
gBoardModuleTokenSpaceGuid.PcdGfxCrbDetect|FALSE|BOOLEAN|0x00101001
gBoardModuleTokenSpaceGuid.PcdHsioBoardPresent|FALSE|BOOLEAN|0x00101002
gBoardModuleTokenSpaceGuid.PcdHsioBoardType|0x0|UINT8|0x00101003
gBoardModuleTokenSpaceGuid.PcdMfgMode|FALSE|BOOLEAN|0x00101005
gBoardModuleTokenSpaceGuid.PcdBiosVersion|L"0123456789012345678901234567890123456789"|VOID*|0x0010100E
gBoardModuleTokenSpaceGuid.PcdReleaseDate|L"01234567890123456789"|VOID*|0x0010100F
gBoardModuleTokenSpaceGuid.PcdReleaseTime|L"01234567890123456789"|VOID*|0x00101010
#
# The PCD which holds the pointer of Smbios Platform Info table
#
gBoardModuleTokenSpaceGuid.PcdSmbiosPlatformInfo|0|UINT64|0x0010101B
#
# The PCD which used to enable / disable the code to use RVP Smbios Board Info
#
gBoardModuleTokenSpaceGuid.PcdSmbiosBoardInfoEnable|FALSE|BOOLEAN|0x0010101C
#
# The PCD which holds the pointer of RVP Smbios Board Info
#
gBoardModuleTokenSpaceGuid.PcdSmbiosBoardInfo|0|UINT64|0x0010101D
#
# CoEngineering Custom Defaults PCD
#
gBoardModuleTokenSpaceGuid.PcdCoEngEnableCustomDefaults|0x0|UINT8|0x00100227
#
# The PCD defines the I2C bus number to which PSS chip connected.
#
gBoardModuleTokenSpaceGuid.PcdPssReadSN|FALSE|BOOLEAN|0x00101025
gBoardModuleTokenSpaceGuid.PcdPssI2cBusNumber|0x05|UINT8|0x00101026
gBoardModuleTokenSpaceGuid.PcdPssI2cSlaveAddress|0x6E|UINT8|0x00101027
# PCIE SLOT 1 - X4 CONNECTOR RTD3
gBoardModuleTokenSpaceGuid.PcdPcieSlot1GpioSupport|0|UINT8|0x00000A79
gBoardModuleTokenSpaceGuid.PcdPcieSlot1HoldRstExpanderNo|0|UINT8|0x00000A7A
gBoardModuleTokenSpaceGuid.PcdPcieSlot1HoldRstGpioNo|0|UINT32|0x00000A7B
gBoardModuleTokenSpaceGuid.PcdPcieSlot1HoldRstGpioPolarity|FALSE|BOOLEAN|0x00000A7C
gBoardModuleTokenSpaceGuid.PcdPcieSlot1PwrEnableExpanderNo|0|UINT8|0x00000A7D
gBoardModuleTokenSpaceGuid.PcdPcieSlot1PwrEnableGpioNo|0|UINT32|0x00000A7E
gBoardModuleTokenSpaceGuid.PcdPcieSlot1PwrEnableGpioPolarity|FALSE|BOOLEAN|0x00000A7F
gBoardModuleTokenSpaceGuid.PcdPcieSlot1WakeGpioPin|0x0|UINT32|0x00000A80
gBoardModuleTokenSpaceGuid.PcdPcieSlot1RootPort|0x0|UINT8|0x00000A81
gBoardModuleTokenSpaceGuid.PcdDg1VramSRGpio|0x0|UINT32|0x00000A82
gBoardModuleTokenSpaceGuid.PcdPchPCIeSlot1PwrEnableGpioNo|0x0|UINT32|0x00000A83
gBoardModuleTokenSpaceGuid.PcdPchPCIeSlot1RstGpioNo|0x0|UINT32|0x00000A84
gBoardModuleTokenSpaceGuid.PcdPchPCIeSlot1PwrEnableGpioPolarity|FALSE|BOOLEAN|0x00000A85
gBoardModuleTokenSpaceGuid.PcdPchPCIeSlot1RstGpioPolarity|FALSE|BOOLEAN|0x00000A86
# PCIE SLOT 2 - X4 CONNECTOR RTD3
gBoardModuleTokenSpaceGuid.PcdPchPCIeSlot2PwrEnableGpioNo|0|UINT32|0x00000084
gBoardModuleTokenSpaceGuid.PcdPchPCIeSlot2PwrEnableGpioPolarity|0|BOOLEAN|0x00000085
gBoardModuleTokenSpaceGuid.PcdPchPCIeSlot2RstGpioNo|0|UINT32|0x00000086
gBoardModuleTokenSpaceGuid.PcdPchPCIeSlot2RstGpioPolarity|0|BOOLEAN|0x00000087
gBoardModuleTokenSpaceGuid.PcdPcieSlot2WakeGpioPin|0|UINT32|0x00000088
gBoardModuleTokenSpaceGuid.PcdPcieSlot2RootPort|0|UINT8|0x0000008A
# PCH M.2 SSD Slot 1RTD3
gBoardModuleTokenSpaceGuid.PcdPchSsd1PwrEnableGpioNo|0|UINT32|0x00000080
gBoardModuleTokenSpaceGuid.PcdPchSsd1PwrEnableGpioPolarity|0|BOOLEAN|0x00000081
gBoardModuleTokenSpaceGuid.PcdPchSsd1RstGpioNo|0|UINT32|0x00000082
gBoardModuleTokenSpaceGuid.PcdPchSsd1RstGpioPolarity|0|BOOLEAN|0x00000083
# CPU M.2 SSD Slot RTD3
gBoardModuleTokenSpaceGuid.PcdPcieSsd2PwrEnableGpioNo|0|UINT32|0x0000008B
gBoardModuleTokenSpaceGuid.PcdPcieSsd2RstGpioNo|0|UINT32|0x0000008C
gBoardModuleTokenSpaceGuid.PcdPcieSsd2PwrEnableGpioPolarity|0|BOOLEAN|0x0000008D
gBoardModuleTokenSpaceGuid.PcdPcieSsd2RstGpioPolarity|0|BOOLEAN|0x0000008E
gBoardModuleTokenSpaceGuid.PcdPcieSsd3PwrEnableGpioNo|0|UINT32|0x00000101
gBoardModuleTokenSpaceGuid.PcdPcieSsd3RstGpioNo|0|UINT32|0x00000102
gBoardModuleTokenSpaceGuid.PcdPcieSsd3PwrEnableGpioPolarity|0|BOOLEAN|0x00000109
gBoardModuleTokenSpaceGuid.PcdPcieSsd3RstGpioPolarity|0|BOOLEAN|0x00000104
# CPU Peg DG Slot RTD3
gBoardModuleTokenSpaceGuid.PcdPcieDG2PwrEnableGpioNo|0|UINT32|0x00000105
gBoardModuleTokenSpaceGuid.PcdPcieDG2RstGpioNo|0|UINT32|0x00000106
gBoardModuleTokenSpaceGuid.PcdPcieDG2PwrEnableGpioPolarity|0|BOOLEAN|0x00000107
gBoardModuleTokenSpaceGuid.PcdPcieDG2RstGpioPolarity|0|BOOLEAN|0x00000108
gBoardModuleTokenSpaceGuid.PcdPcieDG2WakeGpioPin|0|UINT32|0x00000113
# PCH SATA port RTD3
gBoardModuleTokenSpaceGuid.PcdPchSataPortPwrEnableGpioNo|0|UINT32|0x0000008F
gBoardModuleTokenSpaceGuid.PcdPchSataPortPwrEnableGpioPolarity|0|BOOLEAN|0x00000400
# I2C Touch Panel 1 RTD3
gBoardModuleTokenSpaceGuid.PcdTouchpanelPwrEnableGpio|0x0|UINT32|0x0010023A
gBoardModuleTokenSpaceGuid.PcdTouchpanelRstGpio|0x0|UINT32|0x0010023B
gBoardModuleTokenSpaceGuid.PcdTouchpanelPwrEnableGpioPolarity|0x0|BOOLEAN|0x00100233
gBoardModuleTokenSpaceGuid.PcdTouchpanelRstGpioPolarity|0x0|BOOLEAN|0x00100234
gBoardModuleTokenSpaceGuid.PcdTouchpadIrqGpioPolarity|0x0|BOOLEAN|0x00100235
gBoardModuleTokenSpaceGuid.PcdTouchpanelIrqGpioPolarity|0x0|BOOLEAN|0x00100236
gBoardModuleTokenSpaceGuid.PcdTouchpanel1PwrEnableGpio|0|UINT32|0x00000401
gBoardModuleTokenSpaceGuid.PcdTouchpanel1RstGpio|0|UINT32|0x00000402
gBoardModuleTokenSpaceGuid.PcdTouchpanel1IrqGpio|0|UINT32|0x00000403
gBoardModuleTokenSpaceGuid.PcdTouchpanel1PwrEnableGpioPolarity|0|BOOLEAN|0x00000404
gBoardModuleTokenSpaceGuid.PcdTouchpanel1RstGpioPolarity|0|BOOLEAN|0x00000405
gBoardModuleTokenSpaceGuid.PcdTouchpanel1IrqGpioPolarity|0|BOOLEAN|0x00000406
# WLAN
gBoardModuleTokenSpaceGuid.PcdWlanWakeGpio|0|UINT32|0x00000407
gBoardModuleTokenSpaceGuid.PcdWlanRootPortNumber|0|UINT8|0x00000408
# LID SWITCH
gBoardModuleTokenSpaceGuid.PcdLidSwitchWakeGpio|0|UINT32|0x0000040D
# FOXVILLE I225 LAN
gBoardModuleTokenSpaceGuid.PcdFoxLanEnableGpio|0|UINT32|0x0000040E
gBoardModuleTokenSpaceGuid.PcdFoxLanWakeGpio|0|UINT32|0x0000040F
gBoardModuleTokenSpaceGuid.PcdFoxLanDisableNGpio|0|UINT32|0x00000410
gBoardModuleTokenSpaceGuid.PcdFoxLanResetGpio|0|UINT32|0x00000411
gBoardModuleTokenSpaceGuid.PcdFoxLanDisableNGpioPolarity|0|BOOLEAN|0x00000412
gBoardModuleTokenSpaceGuid.PcdFoxLanResetGpioPolarity|0|BOOLEAN|0x00000413
gBoardModuleTokenSpaceGuid.PcdFoxlanRootPortNumber|0|UINT8|0x00000414
# USB Type C Split mode
#
# Below PCDs defines the USB Type C Ports and its Porperties
# Each Port has 3 Byte Information
#
# Bit 3 to 7 : Root port under which TBT is mapped (if Port is behind TBT otherwise Ignore),
# Bit 1 to 2 : Port is from which controller (PCH:00/TBT:01/CPU:10)
# Bit 0 Split mode support
#
# PcdUsbTypeCPortX : Actual Port mapping on the Corresponding Controller (PCH/TBT/CPU)
#
# PcdUsbTypeCPortXPch : Mapping on the PCH controller (If Split mode is supported)
gBoardModuleTokenSpaceGuid.PcdUsbTypeCSupport|FALSE|BOOLEAN|0x00100212
gBoardModuleTokenSpaceGuid.PcdUsbTypeCEcLess|0x00|UINT8|0x00100038
gBoardModuleTokenSpaceGuid.PcdTypeCPortsSupported|0x00|UINT8|0x0010004B # Max 10 Type-C Port Supported. Reserving extra Also.
gBoardModuleTokenSpaceGuid.PcdUsbTypeCPort1|0x00|UINT8|0x00100039
gBoardModuleTokenSpaceGuid.PcdUsbTypeCPort1Pch|0x00|UINT8|0x0010003A
gBoardModuleTokenSpaceGuid.PcdUsbCPort1Properties|0x00|UINT8|0x0010003B
gBoardModuleTokenSpaceGuid.PcdUsbTypeCPort2|0x00|UINT8|0x0010003C
gBoardModuleTokenSpaceGuid.PcdUsbTypeCPort2Pch|0x00|UINT8|0x0010003D
gBoardModuleTokenSpaceGuid.PcdUsbCPort2Properties|0x00|UINT8|0x0010003E
gBoardModuleTokenSpaceGuid.PcdUsbTypeCPort3|0x00|UINT8|0x0010003F
gBoardModuleTokenSpaceGuid.PcdUsbTypeCPort3Pch|0x00|UINT8|0x00100040
gBoardModuleTokenSpaceGuid.PcdUsbCPort3Properties|0x00|UINT8|0x00100041
gBoardModuleTokenSpaceGuid.PcdUsbTypeCPort4|0x00|UINT8|0x00100042
gBoardModuleTokenSpaceGuid.PcdUsbTypeCPort4Pch|0x00|UINT8|0x00100043
gBoardModuleTokenSpaceGuid.PcdUsbCPort4Properties|0x00|UINT8|0x00100044
gBoardModuleTokenSpaceGuid.PcdUsbTypeCPort5|0x00|UINT8|0x00100045
gBoardModuleTokenSpaceGuid.PcdUsbTypeCPort5Pch|0x00|UINT8|0x00100046
gBoardModuleTokenSpaceGuid.PcdUsbCPort5Properties|0x00|UINT8|0x00100047
gBoardModuleTokenSpaceGuid.PcdUsbTypeCPort6|0x00|UINT8|0x00100048
gBoardModuleTokenSpaceGuid.PcdUsbTypeCPort6Pch|0x00|UINT8|0x00100049
gBoardModuleTokenSpaceGuid.PcdUsbCPort6Properties|0x00|UINT8|0x0010004A
gBoardModuleTokenSpaceGuid.PcdUsbTypeCPort7|0x00|UINT8|0x0010004D
gBoardModuleTokenSpaceGuid.PcdUsbTypeCPort7Pch|0x00|UINT8|0x0010004E
gBoardModuleTokenSpaceGuid.PcdUsbCPort7Properties|0x00|UINT8|0x0010004F
gBoardModuleTokenSpaceGuid.PcdUsbTypeCPort8|0x00|UINT8|0x00100050
gBoardModuleTokenSpaceGuid.PcdUsbTypeCPort8Pch|0x00|UINT8|0x00100051
gBoardModuleTokenSpaceGuid.PcdUsbCPort8Properties|0x00|UINT8|0x00100052
gBoardModuleTokenSpaceGuid.PcdUsbTypeCPort9|0x00|UINT8|0x00100053
gBoardModuleTokenSpaceGuid.PcdUsbTypeCPort9Pch|0x00|UINT8|0x00100054
gBoardModuleTokenSpaceGuid.PcdUsbCPort9Properties|0x00|UINT8|0x00100055
gBoardModuleTokenSpaceGuid.PcdUsbTypeCPortA|0x00|UINT8|0x00100056
gBoardModuleTokenSpaceGuid.PcdUsbTypeCPortAPch|0x00|UINT8|0x00100057
gBoardModuleTokenSpaceGuid.PcdUsbCPortAProperties|0x00|UINT8|0x00100058
gBoardModuleTokenSpaceGuid.PcdBoardRetimerForcePwrGpio|0x0|UINT32|0x0010004C
# PD PS_ON GPIO
gBoardModuleTokenSpaceGuid.PcdUsbCPsonOverrideN|0x00|UINT32|0x0010006B
gBoardModuleTokenSpaceGuid.PcdUsbCPsonS0ixEntryReq|0x00|UINT32|0x0010006C
gBoardModuleTokenSpaceGuid.PcdUsbCPsonS0ixEntryAck|0x00|UINT32|0x0010006D
# DP Mux GPIO
gBoardModuleTokenSpaceGuid.PcdDpMuxGpio|0x00|UINT32|0x00100070
# DXE PCDs
gBoardModuleTokenSpaceGuid.PcdFingerPrintIrqGpio|0x0|UINT32|0x0010020A
gBoardModuleTokenSpaceGuid.PcdWwanModemBaseBandResetGpio|0x0|UINT32|0x0010020B
gBoardModuleTokenSpaceGuid.PcdBtRfKillGpio|0x0|UINT32|0x0010020D
gBoardModuleTokenSpaceGuid.PcdBtIrqGpio|0x0|UINT32|0x0010020E
gBoardModuleTokenSpaceGuid.PcdTouchpadIrqGpio|0x0|UINT32|0x0010020F
gBoardModuleTokenSpaceGuid.PcdTouchpanelIrqGpio|0x0|UINT32|0x00100210
gBoardModuleTokenSpaceGuid.PcdHdaI2sCodecIrqGpio|0x0|UINT32|0x00100126
gBoardModuleTokenSpaceGuid.PcdHdaI2sCodecI2cBusNumber|0x0|UINT8|0x00100127
gBoardModuleTokenSpaceGuid.PcdEcEspiFlashSharingMode|0x00|UINT8|0x00101031
gBoardModuleTokenSpaceGuid.PcdEcPeciMode|0x00|UINT8|0x00101035
gBoardModuleTokenSpaceGuid.PcdBoardRtd3TableSignature|0x0|UINT64|0x00100250
gBoardModuleTokenSpaceGuid.PcdEcSmiGpio|0x0|UINT32|0x00100200
gBoardModuleTokenSpaceGuid.PcdEcLowPowerExitGpio|0x0|UINT32|0x00100125
gBoardModuleTokenSpaceGuid.PcdSpdAddressOverride|FALSE|BOOLEAN|0x00100203
gBoardModuleTokenSpaceGuid.PcdSmbiosFabBoardName|0|UINT64|0x0000A102
gBoardModuleTokenSpaceGuid.PcdXhciAcpiTableSignature|0x0|UINT64|0x00100204
gBoardModuleTokenSpaceGuid.PcdDDISelection|0x0|UINT8|0x00100215
gBoardModuleTokenSpaceGuid.PcdTsOnDimmTemperature|FALSE|BOOLEAN|0x00100123
gBoardModuleTokenSpaceGuid.PcdWwanFullCardPowerOffGpio|0x0|UINT32|0x0010122D
gBoardModuleTokenSpaceGuid.PcdWwanPerstGpio|0x0|UINT32|0x0010122E
gBoardModuleTokenSpaceGuid.PcdWwanBbrstGpio|0x0|UINT32|0x0010122F
gBoardModuleTokenSpaceGuid.PcdWwanPerstGpioPolarity|0|BOOLEAN|0x00101230
gBoardModuleTokenSpaceGuid.PcdDimmPopulationError|FALSE|BOOLEAN|0x00100221
gBoardModuleTokenSpaceGuid.PcdBoardGpioTableCnvd|0|UINT32|0x00101231
gBoardModuleTokenSpaceGuid.PcdBoardGpioTableCnvdSize|0|UINT16|0x00101232
# TPM PCD
## The PCD is used to specify whether or not send HierarchyChangeAuth command for Platform Hierarchy.
gBoardModuleTokenSpaceGuid.PcdTpm2HierarchyChangeAuthPlatform|TRUE|BOOLEAN|0x00010020
## The PCD is used to specify send HierarchyControl command to enable or disable Platform Hierarchy.
gBoardModuleTokenSpaceGuid.PcdTpm2HierarchyControlPlatform|FALSE|BOOLEAN|0x00010024
## The PCD is used to specify send HierarchyControl command to enable or disable Endorsement Hierarchy.
gBoardModuleTokenSpaceGuid.PcdTpm2HierarchyControlEndorsement|TRUE|BOOLEAN|0x00010025
## The PCD is used to specify send HierarchyControl command to enable or disable Storage Hierarchy.
gBoardModuleTokenSpaceGuid.PcdTpm2HierarchyControlOwner|TRUE|BOOLEAN|0x00010026
## The PCD is used to specify if TrEEPlatform module support TXT provision.
gBoardModuleTokenSpaceGuid.PcdTpm2TxtProvisionSupport|FALSE|BOOLEAN|0x00010027
## The PCD is used to specify whether or not send ChangeEPS command to reprovision Endorsement Hierarchy.
gBoardModuleTokenSpaceGuid.PcdTpm2ChangeEps|FALSE|BOOLEAN|0x00010021
## The PCD is used to specify whether or not send ChangePPS command to reprovision Platform Hierarchy.
gBoardModuleTokenSpaceGuid.PcdTpm2ChangePps|FALSE|BOOLEAN|0x00010022
## The PCD is used to specify whether or not send Clear command to reprovision Storage Hierarchy.
gBoardModuleTokenSpaceGuid.PcdTpm2Clear|FALSE|BOOLEAN|0x00010023
# This PCD would be holding the Discrete BT Module Selection as Disabled, over USB or UART.
# This PCD would be ovveriden by BIOS setup option DiscreteBtModule.
# Disabled - 0, BT Over USB - 1, BT Over UART - 2
gBoardModuleTokenSpaceGuid.PcdDiscreteBtModule|0x0|UINT8|0x00100226
# ASL PCDs
gBoardModuleTokenSpaceGuid.PcdBatteryPresent |0x0|UINT8|0x00100124
gBoardModuleTokenSpaceGuid.PcdRealBattery1Control |0x00|UINT8|0x00100103
gBoardModuleTokenSpaceGuid.PcdRealBattery2Control |0x00|UINT8|0x00100104
gBoardModuleTokenSpaceGuid.PcdMipiCamSensor |FALSE|BOOLEAN|0x00100105
gBoardModuleTokenSpaceGuid.PcdNCT6776FCOM |FALSE|BOOLEAN|0x00100107
gBoardModuleTokenSpaceGuid.PcdNCT6776FSIO |FALSE|BOOLEAN|0x00100108
gBoardModuleTokenSpaceGuid.PcdNCT6776FHWMON |FALSE|BOOLEAN|0x00100109
gBoardModuleTokenSpaceGuid.PcdH8S2113SIO |FALSE|BOOLEAN|0x0010010A
gBoardModuleTokenSpaceGuid.PcdH8S2113UAR |FALSE|BOOLEAN|0x0010010B
gBoardModuleTokenSpaceGuid.PcdZPoddConfig |0x00|UINT8|0x0010010E
gBoardModuleTokenSpaceGuid.PcdSmcRuntimeSciPin |0x00|UINT32|0x00100111
gBoardModuleTokenSpaceGuid.PcdConvertableDockSupport |FALSE|BOOLEAN|0x00100112
gBoardModuleTokenSpaceGuid.PcdEcHotKeyF3Support |0x00|UINT8|0x00100113
gBoardModuleTokenSpaceGuid.PcdEcHotKeyF4Support |0x00|UINT8|0x00100114
gBoardModuleTokenSpaceGuid.PcdEcHotKeyF5Support |0x00|UINT8|0x00100115
gBoardModuleTokenSpaceGuid.PcdEcHotKeyF6Support |0x00|UINT8|0x00100116
gBoardModuleTokenSpaceGuid.PcdEcHotKeyF7Support |0x00|UINT8|0x00100117
gBoardModuleTokenSpaceGuid.PcdEcHotKeyF8Support |0x00|UINT8|0x00100118
gBoardModuleTokenSpaceGuid.PcdVirtualButtonVolumeUpSupport |FALSE|BOOLEAN|0x00100119
gBoardModuleTokenSpaceGuid.PcdVirtualButtonVolumeDownSupport |FALSE|BOOLEAN|0x0010011A
gBoardModuleTokenSpaceGuid.PcdVirtualButtonHomeButtonSupport |FALSE|BOOLEAN|0x0010011B
gBoardModuleTokenSpaceGuid.PcdVirtualButtonRotationLockSupport |FALSE|BOOLEAN|0x0010011C
gBoardModuleTokenSpaceGuid.PcdSlateModeSwitchSupport |FALSE|BOOLEAN|0x0010011D
gBoardModuleTokenSpaceGuid.PcdVirtualGpioButtonSupport |FALSE|BOOLEAN|0x0010011E
gBoardModuleTokenSpaceGuid.PcdAcDcAutoSwitchSupport |FALSE|BOOLEAN|0x0010011F
gBoardModuleTokenSpaceGuid.PcdPmPowerButtonGpioPin |0x00|UINT32|0x00100120
gBoardModuleTokenSpaceGuid.PcdAcpiEnableAllButtonSupport |FALSE|BOOLEAN|0x00100121
gBoardModuleTokenSpaceGuid.PcdAcpiHidDriverButtonSupport |FALSE|BOOLEAN|0x00100122
# Wwan PCDs
gBoardModuleTokenSpaceGuid.PcdWwanWakeGpio|0x0|UINT32|0x00100237
gBoardModuleTokenSpaceGuid.PcdWwanFullCardPowerOffGpioPolarity|0x0|BOOLEAN|0x00100238
gBoardModuleTokenSpaceGuid.PcdWwanBbrstGpioPolarity|0x0|BOOLEAN|0x00100239
gBoardModuleTokenSpaceGuid.PcdPcieWwanEnable|0x0|UINT8|0x00100240
gBoardModuleTokenSpaceGuid.PcdWwanResetWorkaround|FALSE|BOOLEAN|0x00100241
gBoardModuleTokenSpaceGuid.PcdWwanSourceClock|0x0|UINT8|0x00100243
gBoardModuleTokenSpaceGuid.PcdWwanRootPortNumber|0x0|UINT8|0x00100244
gBoardModuleTokenSpaceGuid.PcdPcieDeviceOnWwanSlot|FALSE|BOOLEAN|0x00100245
# Retimer Device For Capsule Update Support
gBoardModuleTokenSpaceGuid.PcdBoardRetimerDataTablePtr|0x0|UINT64|0x00100267
gBoardModuleTokenSpaceGuid.PcdBoardRetimerDataTableEntryCount|0x0|UINT32|0x00100268
# CPU PEG Slot1 RTD3
gBoardModuleTokenSpaceGuid.PcdPegSlot1PwrEnableGpioNo|0|UINT32|0x00100269
gBoardModuleTokenSpaceGuid.PcdPegSlot1PwrEnableGpioPolarity|0|BOOLEAN|0x0010026A
gBoardModuleTokenSpaceGuid.PcdPegSlot1RstGpioNo|0|UINT32|0x0010026B
gBoardModuleTokenSpaceGuid.PcdPegSlot1RstGpioPolarity|0|BOOLEAN|0x0010026C
gBoardModuleTokenSpaceGuid.PcdPegSlot1WakeGpioPin|0|UINT32|0x0010026D
gBoardModuleTokenSpaceGuid.PcdPegSlot1RootPort|0|UINT8|0x0010026E
# CPU PEG Slot2 RTD3
gBoardModuleTokenSpaceGuid.PcdPegSlot2PwrEnableGpioNo|0|UINT32|0x0010024B
gBoardModuleTokenSpaceGuid.PcdPegSlot2PwrEnableGpioPolarity|0|BOOLEAN|0x0010024C
gBoardModuleTokenSpaceGuid.PcdPegSlot2RstGpioNo|0|UINT32|0x0010024D
gBoardModuleTokenSpaceGuid.PcdPegSlot2RstGpioPolarity|0|BOOLEAN|0x0010024E
gBoardModuleTokenSpaceGuid.PcdPegSlot2WakeGpioPin|0|UINT32|0x0010024F
gBoardModuleTokenSpaceGuid.PcdPegSlot2RootPort|0|UINT8|0x00100260
# PCIE SLOT 3 - X2 CONNECTOR RTD3
gBoardModuleTokenSpaceGuid.PcdPchPCIeSlot3PwrEnableGpioNo|0|UINT32|0x00000267
gBoardModuleTokenSpaceGuid.PcdPchPCIeSlot3PwrEnableGpioPolarity|0|BOOLEAN|0x00000268
gBoardModuleTokenSpaceGuid.PcdPchPCIeSlot3RstGpioNo|0|UINT32|0x00000269
gBoardModuleTokenSpaceGuid.PcdPchPCIeSlot3RstGpioPolarity|0|BOOLEAN|0x0000026A
gBoardModuleTokenSpaceGuid.PcdPcieSlot3WakeGpioPin|0|UINT32|0x0000026B
gBoardModuleTokenSpaceGuid.PcdPcieSlot3RootPort|0|UINT8|0x0000026C
# PCH M.2 SSD Slot 2RTD3
gBoardModuleTokenSpaceGuid.PcdPchSsd2PwrEnableGpioNo|0|UINT32|0x0000026D
gBoardModuleTokenSpaceGuid.PcdPchSsd2RstGpioNo|0|UINT32|0x0000026E
gBoardModuleTokenSpaceGuid.PcdPchSsd2PwrEnableGpioPolarity|0|BOOLEAN|0x0000026F
gBoardModuleTokenSpaceGuid.PcdPchSsd2RstGpioPolarity|0|BOOLEAN|0x00000270
# PCH M.2 SSD Slot 3RTD3
gBoardModuleTokenSpaceGuid.PcdPchSsd3PwrEnableGpioNo|0|UINT32|0x00000271
gBoardModuleTokenSpaceGuid.PcdPchSsd3RstGpioNo|0|UINT32|0x00000272
gBoardModuleTokenSpaceGuid.PcdPchSsd3PwrEnableGpioPolarity|0|BOOLEAN|0x00000273
gBoardModuleTokenSpaceGuid.PcdPchSsd3RstGpioPolarity|0|BOOLEAN|0x00000274
# Policy Default Check with Setup Necessary
gBoardModuleTokenSpaceGuid.PcdPolicyCheckIsFirstBoot|0|BOOLEAN|0x00000275
gBoardModuleTokenSpaceGuid.PcdPolicyCheckIsRvpSupport|0|BOOLEAN|0x00000276
gBoardModuleTokenSpaceGuid.PcdPolicyCheckPcdInitDone|0|BOOLEAN|0x00000277
# PLN support
gBoardModuleTokenSpaceGuid.PcdPlnDelayEnableGpio|0x0|UINT32|0x00000280
gBoardModuleTokenSpaceGuid.PcdPlnDelaySelectionGpio|0x0|UINT32|0x00000281
# EC BIOS Guard
gBoardModuleTokenSpaceGuid.PcdEcBiosGuardEnable|FALSE|BOOLEAN|0x00000285
# Display MUX GPIO
gBoardModuleTokenSpaceGuid.PcdDisplayMuxGpioNo|0|UINT32|0x0000028A
# DashG
gBoardModuleTokenSpaceGuid.PcdDashGEnable|FALSE|BOOLEAN|0x0000028B
[PcdsDynamicEx]
# Flag to Disable Vpd Gpio
gBoardModuleTokenSpaceGuid.PcdDisableVpdGpioTable|FALSE|BOOLEAN|0x50000015
# Pre-Mem GPIO table
gBoardModuleTokenSpaceGuid.PcdBoardGpioTablePreMem|{0}|GPIO_INIT_CONFIG_ARRAY|0x50000017 {
<HeaderFiles>
Pins/GpioPinsVer2Lp.h
Pins/GpioPinsVer2H.h
Library/GpioLib.h
PlatformGpioConfig.h
<Packages>
MdePkg/MdePkg.dec
ClientOneSiliconPkg/SiPkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
gBoardModuleTokenSpaceGuid.VpdPcdBoardGpioTablePreMem|{0}|GPIO_INIT_CONFIG[]|0x50000018 {
<HeaderFiles>
Pins/GpioPinsVer4S.h
Pins/GpioPinsVer2Lp.h
Pins/GpioPinsVer2H.h
Library/GpioLib.h
Library/GpioConfig.h
<Packages>
MdePkg/MdePkg.dec
ClientOneSiliconPkg/SiPkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
# GPIO table
gBoardModuleTokenSpaceGuid.PcdBoardGpioTable|{0}|GPIO_INIT_CONFIG_ARRAY|0x50000019 {
<HeaderFiles>
Pins/GpioPinsVer2Lp.h
Pins/GpioPinsVer2H.h
Library/GpioLib.h
PlatformGpioConfig.h
<Packages>
MdePkg/MdePkg.dec
ClientOneSiliconPkg/SiPkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
gBoardModuleTokenSpaceGuid.VpdPcdBoardGpioTable|{0}|GPIO_INIT_CONFIG[]|0x5000001C {
<HeaderFiles>
Pins/GpioPinsVer4S.h
Pins/GpioPinsVer2Lp.h
Pins/GpioPinsVer2H.h
Library/GpioConfig.h
<Packages>
MdePkg/MdePkg.dec
ClientOneSiliconPkg/SiPkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
# PCIE CLOCKS USAGE
gBoardModuleTokenSpaceGuid.VpdPcdPcieClkUsageMap|{0}|PCIE_CLOCKS_USAGE|0x50000022 {
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
#[start-210726-STORM1100-modify]#
gBoardModuleTokenSpaceGuid.VpdC770DISPcdPcieClkUsageMap|{0}|PCIE_CLOCKS_USAGE|0x50000038 {
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
gBoardModuleTokenSpaceGuid.VpdC770UMAPcdPcieClkUsageMap|{0}|PCIE_CLOCKS_USAGE|0x50000039 {
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
#[end-210726-STORM1100-modify]#
#[-start-210927-TAMT000015-add]#
gBoardModuleTokenSpaceGuid.VpdS77014DISPcdPcieClkUsageMap|{0}|PCIE_CLOCKS_USAGE|0x50000044 {
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
gBoardModuleTokenSpaceGuid.VpdS77014UMAPcdPcieClkUsageMap|{0}|PCIE_CLOCKS_USAGE|0x50000045 {
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
#[-end-210927-TAMT000015-add]#
# USB2 OC MAPPING
gBoardModuleTokenSpaceGuid.VpdPcdUSB2OCMap|{0}|USB_OC_MAP_TABLE|0x50000023 {
<HeaderFiles>
PlatformBoardConfig.h
UsbConfig.h
<Packages>
MdePkg/MdePkg.dec
ClientOneSiliconPkg/SiPkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
# USB3 OC MAPPING
gBoardModuleTokenSpaceGuid.VpdPcdUSB3OCMap|{0}|USB_OC_MAP_TABLE|0x50000024 {
<HeaderFiles>
PlatformBoardConfig.h
UsbConfig.h
<Packages>
MdePkg/MdePkg.dec
ClientOneSiliconPkg/SiPkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
#[-start-210728-YUNLEI0116-modify]
# USB2 OC MAPPING
gBoardModuleTokenSpaceGuid.VpdPcd16USB2OCMap|{0}|USB_OC_MAP_TABLE|0x50000037 {
<HeaderFiles>
PlatformBoardConfig.h
UsbConfig.h
<Packages>
MdePkg/MdePkg.dec
ClientOneSiliconPkg/SiPkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
# USB3 OC MAPPING
gBoardModuleTokenSpaceGuid.VpdPcd16USB3OCMap|{0}|USB_OC_MAP_TABLE|0x5000003A {
<HeaderFiles>
PlatformBoardConfig.h
UsbConfig.h
<Packages>
MdePkg/MdePkg.dec
ClientOneSiliconPkg/SiPkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
#[-end-210728-YUNLEI0116-modify]
#SBC SPD DATA
gBoardModuleTokenSpaceGuid.VpdPcdMrcSpdData|{0}|SPD_DATA|0x50000025 {
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
#[-start-210526-KEBIN00005-add]#
gBoardModuleTokenSpaceGuid.Yogac970MO1Q1R16GSpdData|{0}|SPD_DATA|0x50000036{
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
#[-end-210526-KEBIN00005-add]#
#[-start-210519-KEBIN00001-modify]#
gBoardModuleTokenSpaceGuid.Yogac970MO1Q2R16GSpdData|{0}|SPD_DATA|0x5000002B{
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
gBoardModuleTokenSpaceGuid.Yogac970MO1D1R8GSpdData|{0}|SPD_DATA|0x5000002C{
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
gBoardModuleTokenSpaceGuid.Yogac970MO2O2R32GSpdData|{0}|SPD_DATA|0x5000002D{
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
#[-end-210519-KEBIN00001-modify]#
#[-start-210702-YUNLEI0109-add]
gBoardModuleTokenSpaceGuid.Yogac970Samsung16GSpdData|{0}|SPD_DATA|0x50000031{
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
gBoardModuleTokenSpaceGuid.Yogac970hynix16GSpdData|{0}|SPD_DATA|0x50000032{
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
gBoardModuleTokenSpaceGuid.Yogac970hynix8GSpdData|{0}|SPD_DATA|0x50000033{
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
#[-end-210702-YUNLEI0109-add]
#[start-210720-STORM1100-modify]#
# C770_SUPPORT_ENABLE
#[-start-210726-YUNLEI0113-modify]
gBoardModuleTokenSpaceGuid.Yogac770Samsung32GSpdData|{0}|SPD_DATA|0x50000034{
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
gBoardModuleTokenSpaceGuid.Yogac770hynix32GSpdData|{0}|SPD_DATA|0x50000035{
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
#[-end-210726-YUNLEI0113-modify]
#[end-210720-STORM1100-modify]#
#[-start-210910-QINGLIN0060-add]#
gBoardModuleTokenSpaceGuid.DDR4Samsung4GSpdData|{0}|SPD_DATA|0x50000060{
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
gBoardModuleTokenSpaceGuid.DDR4Samsung8GSpdData|{0}|SPD_DATA|0x50000061{
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
gBoardModuleTokenSpaceGuid.DDR4Hynix4GSpdData|{0}|SPD_DATA|0x50000062{
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
gBoardModuleTokenSpaceGuid.DDR4Hynix8GSpdData|{0}|SPD_DATA|0x50000063{
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
gBoardModuleTokenSpaceGuid.DDR4Micron4GSpdData|{0}|SPD_DATA|0x50000064{
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
gBoardModuleTokenSpaceGuid.DDR4Micron8GSpdData|{0}|SPD_DATA|0x50000065{
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
gBoardModuleTokenSpaceGuid.DDR4Micron8G2ndSpdData|{0}|SPD_DATA|0x50000066{
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
gBoardModuleTokenSpaceGuid.DDR4NullSpdData|{0}|SPD_DATA|0x50000067{
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
#[-start-211228-QINGLIN0136-add]#
gBoardModuleTokenSpaceGuid.DDR4Smart4GSpdData|{0}|SPD_DATA|0x50000068{
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
gBoardModuleTokenSpaceGuid.DDR4Adata4GSpdData|{0}|SPD_DATA|0x50000069{
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
gBoardModuleTokenSpaceGuid.DDR4Micron8G170SpdData|{0}|SPD_DATA|0x5000006A{
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
gBoardModuleTokenSpaceGuid.DDR4Smart8G170SpdData|{0}|SPD_DATA|0x5000006B{
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
#[-end-211228-QINGLIN0136-add]#
#[-end-210910-QINGLIN0060-add]#
# SBC MRC DQS MAPPING
gBoardModuleTokenSpaceGuid.VpdPcdMrcDqsMapCpu2Dram|{0}|MRC_DQS|0x50000026 {
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
ClientOneSiliconPkg/SiPkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
#[-start-210519-KEBIN00001-modify]#
gBoardModuleTokenSpaceGuid.YogaC9VpdPcdMrcDqsMapCpu2Dram|{0}|MRC_DQS|0x5000002E {
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
ClientOneSiliconPkg/SiPkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
#[-end-210519-KEBIN00001-modify]#
# SBC MRC DQ MAPPING
gBoardModuleTokenSpaceGuid.VpdPcdMrcDqMapCpu2Dram|{0}|MRC_DQ|0x50000027 {
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
ClientOneSiliconPkg/SiPkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
#[-start-210519-KEBIN00001-modify]#
gBoardModuleTokenSpaceGuid.YogaC9VpdPcdMrcDqMapCpu2Dram|{0}|MRC_DQ|0x5000002F {
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
ClientOneSiliconPkg/SiPkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
#[-end-210519-KEBIN00001-modify]#
#[start-210720-STORM1100-modify]#
gBoardModuleTokenSpaceGuid.YogaC716VpdPcdMrcDqsMapCpu2Dram|{0}|MRC_DQS|0x50000040 {
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
ClientOneSiliconPkg/SiPkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
gBoardModuleTokenSpaceGuid.YogaC714VpdPcdMrcDqsMapCpu2Dram|{0}|MRC_DQS|0x50000041 {
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
ClientOneSiliconPkg/SiPkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
gBoardModuleTokenSpaceGuid.YogaC716VpdPcdMrcDqMapCpu2Dram|{0}|MRC_DQ|0x50000042 {
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
ClientOneSiliconPkg/SiPkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
gBoardModuleTokenSpaceGuid.YogaC714VpdPcdMrcDqMapCpu2Dram|{0}|MRC_DQ|0x50000043 {
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
ClientOneSiliconPkg/SiPkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
#[end-210720-STORM1100-modify]#
#[-start-210817-DABING0002-modify]#
gBoardModuleTokenSpaceGuid.S77014VpdPcdMrcDqsMapCpu2Dram|{0}|MRC_DQS|0x50000050 {
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
ClientOneSiliconPkg/SiPkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
gBoardModuleTokenSpaceGuid.S77014VpdPcdMrcDqMapCpu2Dram|{0}|MRC_DQ|0x50000051 {
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
ClientOneSiliconPkg/SiPkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
#[-end-210817-DABING0002-modify]#
#[-start-210914-DABING0006-modify]#
gBoardModuleTokenSpaceGuid.S77013VpdPcdMrcDqsMapCpu2Dram|{0}|MRC_DQS|0x50000052 {
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
ClientOneSiliconPkg/SiPkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
gBoardModuleTokenSpaceGuid.S77013VpdPcdMrcDqMapCpu2Dram|{0}|MRC_DQ|0x50000053 {
<HeaderFiles>
PlatformBoardConfig.h
<Packages>
MdePkg/MdePkg.dec
ClientOneSiliconPkg/SiPkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
#[-start-210914-DABING0006-modify]#
# CPU USB3 OC MAPPING
gBoardModuleTokenSpaceGuid.VpdPcdCpuUsb3OcMap|{0}|USB_OC_MAP_TABLE|0x50000028 {
<HeaderFiles>
PlatformBoardConfig.h
UsbConfig.h
TcssInfo.h
<Packages>
MdePkg/MdePkg.dec
ClientOneSiliconPkg/SiPkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
# PMAX DEVICE CONFIG
gBoardModuleTokenSpaceGuid.VpdPcdPmaxDevices|{0}|VPD_PMAX_DEV[]|0x50000030 {
<HeaderFiles>
PlatformBoardConfig.h
}
# ACPI data
gBoardModuleTokenSpaceGuid.PcdBoardAcpiData|{0}|VOID*|0x5000001A
# Early Pre-Mem GPIO table
gBoardModuleTokenSpaceGuid.PcdBoardGpioTableEarlyPreMem|{0}|GPIO_INIT_CONFIG_ARRAY|0x5000001B {
<HeaderFiles>
Pins/GpioPinsVer2Lp.h
Pins/GpioPinsVer2H.h
Library/GpioLib.h
PlatformGpioConfig.h
<Packages>
MdePkg/MdePkg.dec
ClientOneSiliconPkg/SiPkg.dec
AlderLakePlatSamplePkg/PlatformPkg.dec
AlderLakeBoardPkg/BoardPkg.dec
}
# Closed Lid WoV LED Lighting I2C Controller Number and I2C Slave address
gBoardModuleTokenSpaceGuid.PcdClwlI2cController|0|UINT8|0x50000029
gBoardModuleTokenSpaceGuid.PcdClwlI2cSlaveAddress|0|UINT8|0x5000002A
# Board Wwan Gpio
gBoardModuleTokenSpaceGuid.PcdBoardGpioTableWwanOnEarlyPreMem|0|UINT32|0x000000115
gBoardModuleTokenSpaceGuid.PcdBoardGpioTableWwanOnEarlyPreMemSize|0|UINT16|0x000000116
gBoardModuleTokenSpaceGuid.PcdBoardGpioTableWwanOffEarlyPreMem|0|UINT32|0x000000117
gBoardModuleTokenSpaceGuid.PcdBoardGpioTableWwanOffEarlyPreMemSize|0|UINT16|0x000000118
gBoardModuleTokenSpaceGuid.PcdBoardGpioTableM80WwanOnEarlyPreMem|0|UINT32|0x000000139
gBoardModuleTokenSpaceGuid.PcdBoardGpioTableM80WwanOnEarlyPreMemSize|0|UINT16|0x000000140
gBoardModuleTokenSpaceGuid.PcdBoardWwanTOn2ResDelayMs|20|UINT16|0x000000141
gBoardModuleTokenSpaceGuid.PcdBoardWwanTOnRes2PerDelayMs|80|UINT16|0x000000142
gBoardModuleTokenSpaceGuid.PcdBoardWwanTOnPer2PdsDelayMs|0|UINT16|0x000000143
gBoardModuleTokenSpaceGuid.PcdBoardWwanTRes2OffDelayMs|10|UINT16|0x000000144
gBoardModuleTokenSpaceGuid.PcdBoardWwanTOffDisDelayMs|500|UINT16|0x000000145
gBoardModuleTokenSpaceGuid.PcdBoardWwanTResTogDelayMs|10|UINT16|0x000000146
gBoardModuleTokenSpaceGuid.PcdBoardWwanTRes2PdsDelayMs|170|UINT16|0x000000147
gBoardModuleTokenSpaceGuid.PcdBoardWwanTPer2ResDelayMs|10|UINT16|0x000000148
# Onboard MR 1 RTD3 (for ADL S8 only, used when dTBT is enabled)
gBoardModuleTokenSpaceGuid.PcdOnBoardMr1PowerEnableGpioNo|0|UINT32|0x00000149
gBoardModuleTokenSpaceGuid.PcdOnBoardMr1PowerEnableGpioPolarity|0|BOOLEAN|0x00000150
gBoardModuleTokenSpaceGuid.PcdOnBoardMr1RstGpioNo|0|UINT32|0x00000151
gBoardModuleTokenSpaceGuid.PcdOnBoardMr1RstGpioPolarity|0|BOOLEAN|0x00000152
gBoardModuleTokenSpaceGuid.PcdOnBoardMr1WakeGpioPin|0|UINT32|0x00000153
gBoardModuleTokenSpaceGuid.PcdOnBoardMr1RootPort|0|UINT8|0x00000154
# Onboard MR 2 RTD3 (Used when dTBT is enabled)
gBoardModuleTokenSpaceGuid.PcdOnBoardMr2PowerEnableGpioNo|0|UINT32|0x00000155
gBoardModuleTokenSpaceGuid.PcdOnBoardMr2PowerEnableGpioPolarity|0|BOOLEAN|0x00000156
gBoardModuleTokenSpaceGuid.PcdOnBoardMr2RstGpioNo|0|UINT32|0x00000157
gBoardModuleTokenSpaceGuid.PcdOnBoardMr2RstGpioPolarity|0|BOOLEAN|0x00000158
gBoardModuleTokenSpaceGuid.PcdOnBoardMr2WakeGpioPin|0|UINT32|0x00000159
gBoardModuleTokenSpaceGuid.PcdOnBoardMr2RootPort|0|UINT8|0x00000160
#
# EC FailSafe Cpu Temp and Fan Speed Setting
#
gBoardModuleTokenSpaceGuid.PcdEcFailSafeActionCpuTemp|0x0000055|UINT8|0x000000119
gBoardModuleTokenSpaceGuid.PcdEcFailSafeActionFanPwm|0x00000041|UINT8|0x00000011A
[PcdsDynamic, PcdsDynamicEx]
#[-start-210928-BAOBO0003-add]#
gBoardModuleTokenSpaceGuid.NotifyECBootUp |0|UINT8|0x60000098
#[-end-210928-BAOBO0003-add]#
[PcdsPatchableInModule]
[PcdsFeatureFlag]
gBoardModuleTokenSpaceGuid.PcdSecurityEnable |FALSE|BOOLEAN|0xF0000B50
gBoardModuleTokenSpaceGuid.PcdAdvancedFeatureEnable |FALSE|BOOLEAN|0xF0000B51
gBoardModuleTokenSpaceGuid.PcdOptimizationEnable |FALSE|BOOLEAN|0xF0000B52
gBoardModuleTokenSpaceGuid.PcdUefiShellEnable |FALSE|BOOLEAN|0xF0000B53
gBoardModuleTokenSpaceGuid.PcdIntelGopEnable |FALSE|BOOLEAN|0xF0000B54
#[-start-211108-IB19370023-added]#
gBoardModuleTokenSpaceGuid.PcdIntelXmlCliFeatureEnable|FALSE|BOOLEAN|0xF0000B55
#[-end-211108-IB19370023-added]#
[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
## This is the GUID of the FFS which contains the Graphics Video BIOS Table (VBT)
# The VBT content is stored as a RAW section which is consumed by GOP PEI/UEFI driver.
# This MIPI GUID can be updated by patching or runtime if platform support multiple VBT configurations.
# @Prompt GUID of the FFS which contains the Graphics Video BIOS Table (VBT)
# { 0x8958d092, 0x7b26, 0x4e47, 0xbb, 0x98, 0x16, 0xae, 0x2d, 0xc3, 0x15, 0xa2 }
gBoardModuleTokenSpaceGuid.PcdVbtMipiGuid|{ 0x92, 0xd0, 0x58, 0x89, 0x26, 0x7b, 0x47, 0x4e, 0xbb, 0x98, 0x16, 0xae, 0x2d, 0xc3, 0x15, 0xa2 }|VOID*|0x00000001
## PCDs for the MMIO base address range (default 1M) for ATA AHCI host controller used in PEI phase
gPlatformModuleTokenSpaceGuid.PcdAhciPeiMmioBase|0xD1000000|UINT32|0x0000C10E
gPlatformModuleTokenSpaceGuid.PcdAhciPeiMmioLimit|0xD10FFFFF|UINT32|0x0000C10F
# PCDs for the MMIO base address range (default 4M) for NVM Express host controller used in PEI phase
# @Prompt Temporary mmio base address of NVME host controller.
gPlatformModuleTokenSpaceGuid.PcdNvmeHcPeiMmioBase |0xFFFFFFFF|UINT32|0x0000C110
# @Prompt Temporary mmio address limitation of NVME host controller.
gPlatformModuleTokenSpaceGuid.PcdNvmeHcPeiMmioLimit|0xFFFFFFFF|UINT32|0x0000C111
## This PCD defines initial setting of TCG2 Persistent Firmware Management Flags
# PCD can be configured for different settings in different scenarios
# Default setting is TCG2_BIOS_TPM_MANAGEMENT_FLAG_DEFAULT | TCG2_BIOS_STORAGE_MANAGEMENT_FLAG_DEFAULT
# @Prompt Initial setting of TCG2 Persistent Firmware Management Flags
# Enabled PPI for PPRequiredForTurnOff, PPRequiredForChangeEPS, PPRequiredForChangePCRs, PPRequiredForEnable_BlockSIDFunc, PPRequiredForDisable_BlockSIDFunc
#[-start-200721-IB17040134-modify]#
##
## redefined with EDK2\SecurityPkg\SecurityPkg.dec
## temporary rollback it
##
# gEfiSecurityPkgTokenSpaceGuid.PcdTcg2PhysicalPresenceFlags|0x300E0|UINT32|0x0001001B
#[-end-200721-IB17040134-modify]#