101 lines
6.6 KiB
Plaintext
101 lines
6.6 KiB
Plaintext
## @file
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# FDF file of Platform.
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#
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# @copyright
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# INTEL CONFIDENTIAL
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# Copyright 2020 - 2021 Intel Corporation.
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#
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# The source code contained or described herein and all documents related to the
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# source code ("Material") are owned by Intel Corporation or its suppliers or
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# licensors. Title to the Material remains with Intel Corporation or its suppliers
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# and licensors. The Material may contain trade secrets and proprietary and
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# confidential information of Intel Corporation and its suppliers and licensors,
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# and is protected by worldwide copyright and trade secret laws and treaty
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# provisions. No part of the Material may be used, copied, reproduced, modified,
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# published, uploaded, posted, transmitted, distributed, or disclosed in any way
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# without Intel's prior express written permission.
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#
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# No license under any patent, copyright, trade secret or other intellectual
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# property right is granted to or conferred upon you by disclosure or delivery
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# of the Materials, either expressly, by implication, inducement, estoppel or
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# otherwise. Any license under such intellectual property rights must be
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# express and approved by Intel in writing.
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#
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# Unless otherwise agreed by Intel in writing, you may not remove or alter
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# this notice or any other notice embedded in Materials by Intel or
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# Intel's suppliers or licensors in any way.
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#
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# This file contains a 'Sample Driver' and is licensed as such under the terms
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# of your license agreement with Intel or your vendor. This file may be modified
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# by the user, subject to the additional terms of the license agreement.
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#
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# @par Specification
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##
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#=================================================================================#
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# 16 MB BIOS - for FSP wrapper
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#=================================================================================#
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DEFINE FLASH_BASE = 0xFF000000 #
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DEFINE FLASH_SIZE = 0x01000000 #
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DEFINE FLASH_BLOCK_SIZE = 0x00010000 #
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DEFINE FLASH_NUM_BLOCKS = 0x00000100 #
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DEFINE ACM_ALIGNMENT_ON_FV_BASE = 256K #
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#=================================================================================#
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#=================================================================================#
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SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset = 0x00000000 # Flash addr (0xFF000000)
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SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize = 0x00060000 #
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SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset = 0x00000000 # Flash addr (0xFF000000)
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SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize = 0x0002E000 #
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SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset = 0x0002E000 # Flash addr (0xFF02E000)
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SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize = 0x00002000 #
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SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = 0x00030000 # Flash addr (0xFF030000)
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SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize = 0x00030000 #
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#
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# OBB - Begin
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#
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SET gBoardModuleTokenSpaceGuid.PcdFlashObbOffset = 0x00060000 # Flash addr (0xFF060000)
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SET gBoardModuleTokenSpaceGuid.PcdFlashObbSize = 0x009A0000 #
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SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset = 0x000E0000 # Flash addr (0xFF0E0000)
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SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize = 0x00210000 #
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SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset = 0x002F0000 # Flash addr (0xFF2F0000)
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SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalSize = 0x00350000 #
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SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset = 0x00640000 # Flash addr (0xFF640000)
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SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize = 0x00090000 #
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SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = 0x006D0000 # Flash addr (0xFF6D0000)
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SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize = 0x00070000 #
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SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset = 0x00740000 # Flash addr (0xFF740000)
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SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize = 0x001C0000 #
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#
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# OBB - End
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#
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#
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# IBB - Begin
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# (Note : IBB here is referenced for capsule update solution. BIOS_INFO defines IBB for Secure Boot)
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#
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SET gBoardModuleTokenSpaceGuid.PcdFlashIbbOffset = 0x00900000 # Flash addr (0xFF900000)
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SET gBoardModuleTokenSpaceGuid.PcdFlashIbbSize = 0x00700000 #
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SET gBoardModuleTokenSpaceGuid.PcdFlashFvRsvdOffset = 0x00900000 # Flash addr (0xFF9C0000)
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SET gBoardModuleTokenSpaceGuid.PcdFlashFvRsvdSize = 0x00000000 #
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## Firmware binaries FV absolute address requires (256KB align - ACM_ALIGNMENT_ON_FV_BASE).
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## Today's ADL uses ACM_ALIGNMENT_ON_FV_BASE = 256KB for an effective use of flash space based on the FV layout.
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## so set Firmware binaries FV Offset in 256KB aligned i.e. 0x00N00000,0x00N40000,0x00N80000,or 0x00NC0000.
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## Build script checks the requirement.
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SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = 0x00900000 # Flash addr (0xFF900000)
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SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize = 0x00080000 # Keep 0x80000 or larger
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SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset = 0x00980000 # Flash addr (0xFF980000)
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SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize = 0x00230000 # reserver as more blocks as possible for microcode
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SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x00BB0000 # Flash addr (0xFFBB0000)
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SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00040000 #
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SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = 0x00BF0000 # Flash addr (0xFFBF0000)
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SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize = 0x000A0000
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SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = 0x00C90000 # Flash addr (0xFFC90000)
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SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize = 0x00250000
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SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset = 0x00EE0000 # Flash addr (0xFFEE0000)
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SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize = 0x00010000
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SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset = 0x00EF0000 # Flash addr (0xFFEF0000)
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SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize = 0x00110000 #
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#
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# IBB - End
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# |