70 lines
1.9 KiB
C
70 lines
1.9 KiB
C
/** @file
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;******************************************************************************
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;* Copyright (c) 2018 - 2021, Insyde Software Corp. All Rights Reserved.
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;*
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;* You may not reproduce, distribute, publish, display, perform, modify, adapt,
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;* transmit, broadcast, present, recite, release, license or otherwise exploit
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;* any part of this publication in any form, by any means, without the prior
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;* written permission of Insyde Software Corporation.
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;*
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;******************************************************************************
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*/
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#ifndef _HG_DATA_INFO_
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#define _HG_DATA_INFO_
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///
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/// Forward reference for pure ANSI compatability
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///
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typedef struct _EFI_HG_NVS_AREA_PROTOCOL EFI_HG_NVS_AREA_PROTOCOL;
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///
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/// Global NVS Area Protocol GUID
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///
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#define HG_DATA_INFORMATION_PROTOCOL_GUID \
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{ \
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0xbb210948, 0x3101, 0x4cef, 0x8d, 0x1d, 0x3f, 0xe5, 0x5e, 0x61, 0x53, 0xb4 \
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}
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///
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/// Revision id - Added TPM related fields
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///
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///
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/// Extern the GUID for protocol users.
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///
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extern EFI_GUID gEfiHgNvsAreaProtocolGuid;
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//
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// This structure must match with the structure in AmdSsdt.asl and NvidiaSsdt.asl HG OpRegion "HGOP"
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//
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#pragma pack (push, 1)
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typedef struct _EFI_HG_NVS_AREA_PROTOCOL {
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//
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// PEG Endpoint Info
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//
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UINT32 EndpointBaseAddress; // PEG Endpoint PCIe Base Address
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UINT32 DgpuPcieCfgBaseAddress; // dGPU Device's PCIe Config Space Base Address
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//
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// HG Board Info
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//
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UINT8 OptimusFlag;
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//
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// Nvidia dGPU Generation
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//
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UINT8 NvDgpuGen;
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//
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// dGPU SSID SVID
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//
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UINT32 DgpuSsidSvid;
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//
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// Nvidia DDS feature
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//
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UINT8 DisplayMode; // DIS_MODE_FLAG: ACPI flag reflect to SBIOS option.
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//
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// HgSlot Selection
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//
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UINT8 HgSlot; // Add HgSlot Policy: PEG(1) or PCH(0) Slot Slection for Hybrid Graphics
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} EFI_HG_NVS_AREA_PROTOCOL;
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#pragma pack (pop)
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#endif //#ifndef HG_DATA_INFO
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