360 lines
15 KiB
C
360 lines
15 KiB
C
/**@file
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@copyright
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INTEL CONFIDENTIAL
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Copyright 1999 - 2021 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains a 'Sample Driver' and is licensed as such under the terms
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of your license agreement with Intel or your vendor. This file may be modified
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by the user, subject to the additional terms of the license agreement.
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@par Specification Reference:
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**/
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#ifndef _EC_H_
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#define _EC_H_
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// Prototypes
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// Driver model protocol interface
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//
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EFI_STATUS
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EFIAPI
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EcWriteCmd (
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UINT8 cmd
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);
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EFI_STATUS
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EFIAPI
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EcReadData (
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UINT8 *data
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);
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EFI_STATUS
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EFIAPI
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EcQueryCommand (
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UINT8 *Qdata
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);
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EFI_STATUS EcIbFree (
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VOID
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);
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EFI_STATUS
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EFIAPI
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EcWriteData (
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UINT8 data
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);
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EFI_STATUS
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EFIAPI
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EcReadMem (
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UINT8 Index,
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UINT8 *Data
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);
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EFI_STATUS
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EFIAPI
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EcWriteMem (
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UINT8 Index,
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UINT8 Data
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);
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EFI_STATUS
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EFIAPI
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ECEnableACPIMode (
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VOID
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);
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EFI_STATUS
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EFIAPI
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ECDisableACPIMode (
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VOID
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);
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EFI_STATUS
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EFIAPI
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ECDisableSMINotify (
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VOID
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);
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EFI_STATUS
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EFIAPI
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ECEnableSMINotify (
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VOID
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) ;
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EFI_STATUS
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EFIAPI
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EcGetSwitchStatus (
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UINT8 *Data
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);
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#define EcDataPort 0x62
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#define EcCommandPort 0x66
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#define EC_GPI_SMI_EVENT 0x08
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//
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// Meaning of Bit for Device Type
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//
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// Bit 15 = Pipe B - LFP2
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// Bit 14 = Pipe B - EFP2
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// Bit 13 = Pipe B - TV2
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// Bit 12 = Pipe B - CRT2
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// Bit 11 = Pipe B - LFP
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// Bit 10 = Pipe B - EFP
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// Bit 9 = Pipe B - TV
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// Bit 8 = Pipe B - Reserved (830M), CRT (855MG, Alviso, Calistoga)
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// Bit 7 = Pipe A - LFP2 (830M), Reserved (855MG, Alviso, Calistoga)
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// Bit 6 = Pipe A - EFP2
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// Bit 5 = Pipe A - TV2
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// Bit 4 = Pipe A - CRT2
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// Bit 3 = Pipe A - LFP (830M), Reserved (855MG, Alviso, Calistoga)
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// Bit 2 = Pipe A - EFP
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// Bit 1 = Pipe A - TV
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// Bit 0 = Pipe A - CRT
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//
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#define DEVICE_PIPEA_CRT 0x0001
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#define DEVICE_PIPEA_TV 0x0002
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#define DEVICE_PIPEA_EFP 0x0004
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#define DEVICE_PIPEA_LFP 0x0008
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#define DEVICE_PIPEA_CRT2 0x0010
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#define DEVICE_PIPEA_TV2 0x0020
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#define DEVICE_PIPEA_EFP2 0x0040
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#define DEVICE_PIPEA_LFP2 0x0080
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#define DEVICE_PIPEB_CRT 0x0100
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#define DEVICE_PIPEB_TV 0x0200
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#define DEVICE_PIPEB_EFP 0x0400
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#define DEVICE_PIPEB_LFP 0x0800
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#define DEVICE_PIPEB_CRT2 0x1000
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#define DEVICE_PIPEB_TV2 0x2000
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#define DEVICE_PIPEB_EFP2 0x4000
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#define DEVICE_PIPEB_LFP2 0x8000
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//;-----------------------------------------------------------------------;
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//; H8/3334 SMC COMMANDS EQUATES ;
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//;-----------------------------------------------------------------------;
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//; Command Val Format in byte order/describtion
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//; Host commands
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#define SMC_READ_BYTE 0x001 // WR: Cmd,High adr & Low adr >> RD: Data
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#define SMC_WRITE_BYTE 0x002 // WR: Cmd,High adr, Low adr & Data
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#define SMC_MODIFY_BYTE 0x003 // WR: Cmd,High adr, Low adr, AND_mask & OR_mask
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#define SMC_ENABLE_SMI_NOTIFY 0x004 // WR: Cmd
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#define SMC_DISABLE_SMI_NOTIFY 0x005 // WR: Cmd
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#define SMC_QUERY_SYSTEM_STATUS 0x006 // WR: Cmd >> RD:Data
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#define SMC_FAN_STS_BIT 0x080
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#define SMC_HWTHTL_STS_BIT 0x040
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#define SMC_DOCK_STS_BIT 0x020
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#define SMC_AC_STS_BIT 0x010
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#define SMC_THRM_STS_BIT 0x00F
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#define SMC_SELF_TEST 0x007 // SMC Self Test
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#define SMC_DISABLE_WRITE 0x008 // Disable Write Byte
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#define SMC_GET_MODE 0x009 // Not documented, returns
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// byte0/1/2 'KSC' &
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// byte3.6 0 THRM limits not locked yet
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// byte3.5 0 THRM limits not locked yet
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// byte3.0 0/1 SMC in SMI/ACPI mode
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#define SMC_GET_SWITCH_STATUS 0x00A // Get Switches status.
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#define SMC_GET_EC_DTT_DEVICES 0x00B // Returns 2 bytes of information about whether sensor/fan/etc participants were Detected
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#define SMC_ENABLE_ACPI_MODE 0x0AA // Enable ACPI mode
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#define SMC_DISABLE_ACPI_MODE 0x0AB // Disable ACPI mode
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// Power Plane control Commands
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#define SMC_SUSPEND_EC 0x020 // Suspend EC ???
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#define SMC_RESUME_EC 0x021 // Resume EC ???
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#define SMC_POWER_OFF_SYSTEM 0x022 // Turn System Power Off
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#define SMC_ENABLE_POWER_SWITCH 0x023 // Enable Power Switch
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#define SMC_DISABLE_POWER_SWITCH 0x024 // Disable Power Switch
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#define SMC_ENABLE_SMRTPOWER_SWITCH 0x025 // Enable Smart Power Switch
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#define SMC_DISABLE_SMRTPOWER_SWITCH 0x026 // Disable Smart Power Switch
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#define EC_POWER_FEATURES_CMD 0x027 // This is the command for setting EC Power features.
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#define EC_LOW_POWER_EXIT_CMD 0x02D // This is the command for EC Low Power Exit.
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#define SMC_PSEUDO_G3_CMD 0x02E // EC Command to specify Pseudo G3 Enabled/Disabled State
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#define EC_DEBUG_LOW_POWER_ENABLE 0x01 // [0] - Low power mode, when set, the EC idles its CPU core and powers down all unnecessary modules to achieve the lowest possible power consumption for CS.
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#define EC_DEBUG_LED_DISABLE 0x02 // [1] - When set all LEDs controlled by the EC are turned off to save power in CS
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#define EC_DEBUG_BASE_PCS_PWR_POLICY 0x04 // [2] - When set the EC turns off role reversal and does not supply power to the base.
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#define SMC_ENABLE_DEEP_SLEEP 0x028 // Enable Deep Sleep for SMC ???
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//; Battery control commands
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#define SMC_GET_BATT_STATUS 0x030 // Get Battery Status
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#define SMC_GET_BATT_CHARGE_STATUS 0x031 // Get Battery State Of Charge
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#define SMC_GET_BATT_TIME_EMPTY 0x032 // Get Battery Time To Empty
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#define SMC_GET_BATT_TIME_FULL 0x033 // Get Battery Time To Full
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#define SMC_GET_BATT_IN_USE 0x034 // Get Battery In Use
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#define SMC_GET_BATT_TYPE 0x035 // Get Battery Type
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#define SMC_BATT_DISCHARGE 0x036 // Set Battery To Discharge
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#define SMC_BATT_CHARGE 0x037 // Set Battery To Charge
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#define SMC_BATT_STOP_CHARGE 0x038 // Set Battery To Stop Charging
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#define SMC_SET_BATT_CONDITION 0x039 // Set Battery To Condition
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#define SMC_SET_BATT_THRESH 0x03A // Set Battery Thresholds
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//; Peripheral control commands
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#define SMC_GET_BACKLIGHT 0x040 // Get Back-light Brightness
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#define SMC_SET_BACKLIGHT 0x041 // Set Back-light Brightness
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#define SMC_USB_POWER_ON 0x044 // USB Power On
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#define SMC_USB_POWER_OFF 0x045 // USB Power Off
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#define SMC_LAN_POWER_ON 0x046 // Enable onBoard LAN
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//; Extended Thermal Management
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#define SMC_SET_ETM_COMMAND 0x4B // Enable Extended Thermal Management
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//; PECI Related commands
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#define SMC_SET_PECI_INJECTED_TEMP 0x04D // Set PECI Injected Temp
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//; Thermal handling commands
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#define SMC_GET_CURRENT_TEMP 0x050 // Read Current CPU temp
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#define SMC_SET_TEMP_RANGES 0x051 // Set Thermal table
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#define SMC_LOCK_TEMP_RANGES 0x052 // Lock Thermal table
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#define SMC_GET_CURRENT_CORE_TEMP 0x053 // Read Current CPU Core temp
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#define SMC_SET_THERMAL_THRESH 0x057 // Set Thermal Threshold.
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#define SMC_SET_SHUTDOWN_TEMP 0x058 // Set Shutdown Temperature.
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#define SMC_SET_THROTTLE_TEMP 0x059 // Set Throttle Temperature.
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#define SMC_SET_QC_THERM_OFFSET 0x05D
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#define SMC_FAIL_SAFE_FAN_CTRL 0x01C // Set temp and fan % when OS is hung
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//; SMC Dispatcher Commands
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#define SMC_QUERY_SMI 0x070 // Query SMI event
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#define SMC_TIMER_SMI 0x071 // SMI Timer Service
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//; ACPI Embedded controller commands
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#define SMC_READ_EC 0x080 // Read EC
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#define SMC_WRITE_EC 0x081 // Write EC
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#define SMC_LOCK_EC 0x082 // Lock EC for burst use
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#define SMC_UNLOCK_EC 0x083 // Unlock EC from burst use
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#define SMC_QUERY_EC 0x084 // Query EC event
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//; SMBus commands
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#define SMC_WRITE_SMBUS 0x0A0 // Write SMBus
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#define SMC_READ_SMBUS 0x0A1 // Read SMBus
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#define SMC_SET_CPU_FAN_CONTROL 0x0FE // CPU FAN Control
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//;-----------------------------------------------------------------------;
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//; SMI EVENT NOTIFICATIONS EQUATES ;
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//;-----------------------------------------------------------------------;
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//; KBC Notification
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#define SMC_KBC_HOTKEY 0x020 // KBC hotkey pressed
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//; Power Plane events
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#define SMC_AC_INSERTED 0x030 // AC power inserted
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#define SMC_AC_REMOVED 0x031 // AC power removed
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#define SMC_POWER_BTN_PRESSED 0x032 // Power switch pressed
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//; Battery events
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#define SMC_BATT0_INSERTED 0x040 // Battery0 inserted
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#define SMC_BATT0_REMOVED 0x042 // Battery0 removed
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#define SMC_BATT0_LOW 0x044 // Battery0 low
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#define SMC_BATT0_CRITICAL 0x046 // Battery0 critical
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#define SMC_BATT0_FAILED 0x048 // Battery0 failure
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#define SMC_BATT1_INSERTED 0x041 // Battery1 inserted
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#define SMC_BATT1_REMOVED 0x043 // Battery1 removed
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#define SMC_BATT1_LOW 0x045 // Battery1 low
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#define SMC_BATT1_CRITICAL 0x047 // Battery1 critical
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#define SMC_BATT1_FAILED 0x049 // Battery1 failure
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//; Peripheral device events
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#define SMC_USB_DEV_INSERTED 0x050 // USB device inserted
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#define SMC_USB_DEV_REMOVED 0x051 // USB device removed
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#define SMC_BAY_FLOPPY_INSERTED 0x055 // Floppy inserted into device bay
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#define SMC_BAY_CDROM_INSERTED 0x056 // CD-ROM inserted into device bay
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#define SMC_BAY_HD_INSERTED 0x057 // Hard disk inserted into device bay
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#define SMC_BAY_BATT_INSERTED 0x058 // Battery inserted into device bay
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//; Thermal events
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#define SMC_THRM_NORMAL 0x060 // Normal CPU temp. (no STCLK#)
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#define SMC_THRM_THTL1 0x061 // Stage1 CPU temp. (thr. 12.5%)
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#define SMC_THRM_THTL2 0x062 // Stage2 CPU temp. (thr. 25%)
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#define SMC_THRM_THTL3 0x063 // Stage3 CPU temp. (thr. 37.5%)
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#define SMC_THRM_THTL4 0x064 // Stage4 CPU temp. (thr. 50%)
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#define SMC_THRM_THTL5 0x065 // Stage5 CPU temp. (thr. 62.5%)
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#define SMC_THRM_THTL6 0x066 // Stage6 CPU temp. (thr. 75.5%)
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#define SMC_THRM_THTL7 0x067 // Stage7 CPU temp. (thr. 87.5%)
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#define SMC_THRM_THTL8 0x068 // Stage8 CPU temp. (Stop clock)
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#define SMC_THRM_THTL9 0x069 // Stage9 CPU temp. (Stop clock)
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//; Docking events
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#define SMC_DOCK_COMPLETE 0x070 // Docking completed
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#define SMC_UNDOCK_COMPLETE 0x071 // Undocking completed
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#define SMC_UNDOCK_REQUEST 0x072 // Undock requested
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//; SMC Dispatcher events
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#define SMC_TIMER_SMI_WAKE 0x080 // Internal timer Wake-up
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//; SMBUS event notification
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#define SMC_SMBUS_COMPLETE 0x091 // SMBus transaction done
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#define SMC_SMBUS_ERROR 0x092 // SMBus Error
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#define SMC_SMBUS_ALERT 0x093 // SMBus Alarm
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//; SMC Revision & ID
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#define SMC_READ_REVISION 0x090 // ReadRevision from EC firmware.
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#define SMC_READ_PLATFORMID 0x092 // ReadPlatformID.
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#define SMC_5Fh 0x05F // Not in the KSCCMFRF.TXT file.
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//;-----------------------------------------------------------------------;
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#define SMC_DEEPSX_CMD 0x29
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#define SMC_TURBOCTRL_TESTMODE_ENABLE 0x63
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#define SMC_TURBOCTRL_TESTMODE_DISABLE 0x64
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#define SMC_FAB_ID 0x0D
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#define SMC_SYSTEM_POWER_OFF 0x22
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#define SMC_LAN_ON 0x46
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#define SMC_LAN_OFF 0x47
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#define SMC_SET_CTEMP 0x58
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#define SMC_SMI_HOTKEY 0x72
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#define SMC_SMI_INJECT 0xBA
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#define SMC_SMI_DISABLE 0xBC
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#define SMC_SMI_ENABLE 0xBD
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#define SMC_ACPI_ENABLE 0xAA
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#define SMC_ACPI_DISABLE 0xAB
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#define SMC_ALS_ENABLE 0x0E
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#define SMC_HK_ESC 0x01 // ESC
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#define SMC_HK_1 0x02 // 1 !
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#define SMC_HK_2 0x03 // 2 @
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#define SMC_HK_3 0x04 // 3 #
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#define SMC_HK_4 0x05 // 4 $
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#define SMC_HK_5 0x06 // 5 %
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#define SMC_HK_6 0x07 // 6 ^
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#define SMC_HK_7 0x08 // 7 &
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#define SMC_HK_8 0x09 // 8 *
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#define SMC_HK_9 0x0A // 9 (
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#define SMC_HK_0 0x0B // 0 )
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#define SMC_HK_MINUS 0x0C // - _
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#define SMC_HK_ADD 0x0D // = +
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#define SMC_HK_F1 0x3B // F1
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#define SMC_HK_F2 0x3C // F2
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#define SMC_HK_F3 0x3D // F3
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#define SMC_HK_F4 0x3E // F4
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#define SMC_HK_F5 0x3F // F5
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#define SMC_HK_F6 0x40 // F6
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#define SMC_HK_F7 0x41 // F7
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#define SMC_HK_F8 0x42 // F8
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#define SMC_HK_F9 0x43 // F9
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#define SMC_HK_F10 0x44 // F10
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#define SMC_HK_F11 0x57 // F11
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#define SMC_HK_F12 0x58 // F12
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#endif
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