alder_lake_bios/Intel/AlderLake/AlderLakePlatSamplePkg/Features/Cmos/Include/CmosMap.equ

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;@file
;
;@copyright
; INTEL CONFIDENTIAL
; Copyright 2009 - 2017 Intel Corporation.
;
; The source code contained or described herein and all documents related to the
; source code ("Material") are owned by Intel Corporation or its suppliers or
; licensors. Title to the Material remains with Intel Corporation or its suppliers
; and licensors. The Material may contain trade secrets and proprietary and
; confidential information of Intel Corporation and its suppliers and licensors,
; and is protected by worldwide copyright and trade secret laws and treaty
; provisions. No part of the Material may be used, copied, reproduced, modified,
; published, uploaded, posted, transmitted, distributed, or disclosed in any way
; without Intel's prior express written permission.
;
; No license under any patent, copyright, trade secret or other intellectual
; property right is granted to or conferred upon you by disclosure or delivery
; of the Materials, either expressly, by implication, inducement, estoppel or
; otherwise. Any license under such intellectual property rights must be
; express and approved by Intel in writing.
;
; Unless otherwise agreed by Intel in writing, you may not remove or alter
; this notice or any other notice embedded in Materials by Intel or
; Intel's suppliers or licensors in any way.
;
; This file contains a 'Sample Driver' and is licensed as such under the terms
; of your license agreement with Intel or your vendor. This file may be modified
; by the user, subject to the additional terms of the license agreement.
;
;@par Specification Reference:
;;
CMOS_LCDPANELTYPE_REG equ 061h
CMOS_LCDPANELSCALING_REG equ 062h
CMOS_IGDBOOTTYPE_REG equ 063h
CMOS_BACKLIGHT_REG equ 064h
CMOS_LFP_PANEL_COLOR_DEPTH_REG equ 065h
CMOS_EDP_ACTIVE_LFP_CONFIG_REG equ 066h
CMOS_PRIMARY_DISPLAY_REG equ 067h
CMOS_IGD_DISPLAY_PIPE_B_REG equ 068h
CMOS_BRIGHTNESS_REG equ 069h
CMOS_DISP_DDI_REG equ 06Ch
CMOS_ADDR_PORT equ 070h
Q_SV_SV_BOARD_REG equ 091h ;re-use CMOS_FFS_NV_HASH00_DATA_REG as HASH expected only executed during FFS Entry and Exit.
;
; SV:RestricedBegin
;
CMOS_SV_REG_D0 equ 0D0h
CMOS_SV_REG_D1 equ 0D1h
CMOS_SV_REG_D2 equ 0D2h
CMOS_SV_REG_D3 equ 0D3h
CMOS_SV_REG_D4 equ 0D4h
CMOS_SV_REG_D5 equ 0D5h
CMOS_SV_REG_D6 equ 0D6h
CMOS_SV_REG_D7 equ 0D7h
CMOS_SV_REG_D8 equ 0D8h
CMOS_SV_REG_D9 equ 0D9h
CMOS_SV_REG_DA equ 0DAh
CMOS_SV_REG_DB equ 0DBh
CMOS_SV_REG_DC equ 0DCh
CMOS_SV_REG_DD equ 0DDh
CMOS_SV_REG_DE equ 0DEh
CMOS_SV_REG_DF equ 0DFh
CMOS_SV_REG_F0 equ 0F0h
CMOS_SV_REG_F1 equ 0F1h
CMOS_SV_REG_F2 equ 0F2h
;
; SV:RestricedBegin
;