71 lines
3.0 KiB
Plaintext
71 lines
3.0 KiB
Plaintext
;@file
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;
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;@copyright
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; INTEL CONFIDENTIAL
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; Copyright 2009 - 2017 Intel Corporation.
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;
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; The source code contained or described herein and all documents related to the
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; source code ("Material") are owned by Intel Corporation or its suppliers or
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; licensors. Title to the Material remains with Intel Corporation or its suppliers
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; and licensors. The Material may contain trade secrets and proprietary and
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; confidential information of Intel Corporation and its suppliers and licensors,
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; and is protected by worldwide copyright and trade secret laws and treaty
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; provisions. No part of the Material may be used, copied, reproduced, modified,
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; published, uploaded, posted, transmitted, distributed, or disclosed in any way
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; without Intel's prior express written permission.
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;
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; No license under any patent, copyright, trade secret or other intellectual
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; property right is granted to or conferred upon you by disclosure or delivery
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; of the Materials, either expressly, by implication, inducement, estoppel or
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; otherwise. Any license under such intellectual property rights must be
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; express and approved by Intel in writing.
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;
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; Unless otherwise agreed by Intel in writing, you may not remove or alter
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; this notice or any other notice embedded in Materials by Intel or
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; Intel's suppliers or licensors in any way.
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;
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; This file contains a 'Sample Driver' and is licensed as such under the terms
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; of your license agreement with Intel or your vendor. This file may be modified
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; by the user, subject to the additional terms of the license agreement.
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;
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;@par Specification Reference:
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;;
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CMOS_LCDPANELTYPE_REG equ 061h
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CMOS_LCDPANELSCALING_REG equ 062h
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CMOS_IGDBOOTTYPE_REG equ 063h
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CMOS_BACKLIGHT_REG equ 064h
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CMOS_LFP_PANEL_COLOR_DEPTH_REG equ 065h
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CMOS_EDP_ACTIVE_LFP_CONFIG_REG equ 066h
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CMOS_PRIMARY_DISPLAY_REG equ 067h
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CMOS_IGD_DISPLAY_PIPE_B_REG equ 068h
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CMOS_BRIGHTNESS_REG equ 069h
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CMOS_DISP_DDI_REG equ 06Ch
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CMOS_ADDR_PORT equ 070h
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Q_SV_SV_BOARD_REG equ 091h ;re-use CMOS_FFS_NV_HASH00_DATA_REG as HASH expected only executed during FFS Entry and Exit.
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;
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; SV:RestricedBegin
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;
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CMOS_SV_REG_D0 equ 0D0h
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CMOS_SV_REG_D1 equ 0D1h
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CMOS_SV_REG_D2 equ 0D2h
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CMOS_SV_REG_D3 equ 0D3h
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CMOS_SV_REG_D4 equ 0D4h
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CMOS_SV_REG_D5 equ 0D5h
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CMOS_SV_REG_D6 equ 0D6h
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CMOS_SV_REG_D7 equ 0D7h
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CMOS_SV_REG_D8 equ 0D8h
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CMOS_SV_REG_D9 equ 0D9h
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CMOS_SV_REG_DA equ 0DAh
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CMOS_SV_REG_DB equ 0DBh
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CMOS_SV_REG_DC equ 0DCh
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CMOS_SV_REG_DD equ 0DDh
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CMOS_SV_REG_DE equ 0DEh
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CMOS_SV_REG_DF equ 0DFh
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CMOS_SV_REG_F0 equ 0F0h
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CMOS_SV_REG_F1 equ 0F1h
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CMOS_SV_REG_F2 equ 0F2h
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;
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; SV:RestricedBegin
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;
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