361 lines
12 KiB
C
361 lines
12 KiB
C
/** @file
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Discrete USB4 host router PCI routines.
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2021 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains a 'Sample Driver' and is licensed as such under the terms
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of your license agreement with Intel or your vendor. This file may be modified
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by the user, subject to the additional terms of the license agreement.
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@par Specification Reference:
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**/
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#include <Uefi.h>
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#include <Library/BaseLib.h>
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#include <Library/DebugLib.h>
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#include <Library/PciSegmentLib.h>
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#include <Library/Usb4HrSrvLib.h>
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#include "Usb4DhrPci.h"
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/**
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Dump PCI registers of USB4 host router
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@param[in] HrInfo - USB4 host router information
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**/
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VOID
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Dusb4HrPciDump (
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PUSB4_HR_INFO HrInfo
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)
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{
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UINT64 DevAddr;
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PCI_DEV_BDF *Bdf;
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if (HrInfo != NULL) {
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DEBUG ((DEBUG_INFO, "Discrete USB4 Host Router PCI Information:\n"));
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DEBUG ((DEBUG_INFO, "Root Port:\n"));
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Bdf = &(HrInfo->Rp.Bdf);
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DevAddr = PCI_SEGMENT_LIB_ADDRESS (0, Bdf->Bus, Bdf->Dev, Bdf->Func, 0);
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HrSrvDumpPciDevRegs (DevAddr);
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DEBUG ((DEBUG_INFO, "Upstream Port:\n"));
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Bdf = &(HrInfo->UsPort.Bdf);
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DevAddr = PCI_SEGMENT_LIB_ADDRESS (0, Bdf->Bus, Bdf->Dev, Bdf->Func, 0);
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HrSrvDumpPciDevRegs (DevAddr);
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DEBUG ((DEBUG_INFO, "Downstream Port:\n"));
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Bdf = &(HrInfo->DsPort.Bdf);
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DevAddr = PCI_SEGMENT_LIB_ADDRESS (0, Bdf->Bus, Bdf->Dev, Bdf->Func, 0);
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HrSrvDumpPciDevRegs (DevAddr);
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DEBUG ((DEBUG_INFO, "NHI Device:\n"));
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Bdf = &(HrInfo->NhiBdf);
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DevAddr = PCI_SEGMENT_LIB_ADDRESS (0, Bdf->Bus, Bdf->Dev, Bdf->Func, 0);
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HrSrvDumpPciDevRegs (DevAddr);
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}
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}
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/**
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Dump discrete USB4 host router information.
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@param[in] Usb4HrInst - Pointer to USB4 host router instance.
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**/
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VOID
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Dusb4HrDump (
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IN USB4_HR_INSTANCE *Usb4HrInst
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)
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{
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PCI_DEV_BDF *Bdf;
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PUSB4_HR_INFO HrInfo;
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if (Usb4HrInst != NULL) {
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HrInfo = &(Usb4HrInst->HrInfo);
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DEBUG ((DEBUG_INFO, "Discrete USB4 Host Router Info:\n"));
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DEBUG ((DEBUG_INFO, " MbCmdReg = 0x%x, MbStatusReg = 0x%x\n", HrInfo->MbCmdReg, HrInfo->MbStatusReg));
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Bdf = &(HrInfo->MailboxBdf);
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DEBUG ((DEBUG_INFO, " Mailbox B/D/F = (%x, %x, %x)\n", Bdf->Bus, Bdf->Dev, Bdf->Func));
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Bdf = &(HrInfo->NhiBdf);
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DEBUG ((DEBUG_INFO, " NHI B/D/F = (%x, %x, %x)\n", Bdf->Bus, Bdf->Dev, Bdf->Func));
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DEBUG ((DEBUG_INFO, " Iommu DmaBuf base = 0x%0x, size = %d\n", HrInfo->PeiDmaBufBase, HrInfo->PeiDmaBufSize));
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DEBUG ((DEBUG_INFO, " Rp B/D/F = (%x, %x, %x)\n, Pri %x Sec %x Sub %x MemBase 0x%x\n",
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HrInfo->Rp.Bdf.Bus, HrInfo->Rp.Bdf.Dev, HrInfo->Rp.Bdf.Func,
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HrInfo->Rp.PriBus, HrInfo->Rp.SecBus, HrInfo->Rp.SubBus, HrInfo->Rp.MemBase
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));
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DEBUG ((DEBUG_INFO, " Us B/D/F = (%x, %x, %x)\n, Pri %x Sec %x Sub %x MemBase 0x%x\n",
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HrInfo->UsPort.Bdf.Bus, HrInfo->UsPort.Bdf.Dev, HrInfo->UsPort.Bdf.Func,
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HrInfo->UsPort.PriBus, HrInfo->UsPort.SecBus, HrInfo->UsPort.SubBus, HrInfo->UsPort.MemBase
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));
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DEBUG ((DEBUG_INFO, " Ds B/D/F = (%x, %x, %x)\n, Pri %x Sec %x Sub %x MemBase 0x%x\n",
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HrInfo->DsPort.Bdf.Bus, HrInfo->DsPort.Bdf.Dev, HrInfo->DsPort.Bdf.Func,
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HrInfo->DsPort.PriBus, HrInfo->DsPort.SecBus, HrInfo->DsPort.SubBus, HrInfo->DsPort.MemBase
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));
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}
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}
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/**
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Initialize PCI configuration space of discrete USB4 host router.
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@param[in] Usb4HrInst - Pointer to USB4 host router instance.
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@retval EFI_SUCCESS - PCI initialization success.
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@retval EFI_INVALID_PARAMETER - Invalid parameter.
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@retval EFI_NOT_FOUND - Device is not present.
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@retval EFI_UNSUPPORTED - Can't initialize PCI configuration space of USB4 host router.
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**/
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EFI_STATUS
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Dusb4HrPciInit (
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IN USB4_HR_INSTANCE *Usb4HrInst
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)
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{
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EFI_STATUS Status;
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UINT64 DevAddr;
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UINT16 BaseLimit;
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PPCI_BRIDGE_INFO Bridge;
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PPCI_DEV_BDF NhiBdf;
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DEBUG ((DEBUG_INFO, "Dusb4HrPciInit entry\n"));
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if (Usb4HrInst == NULL) {
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DEBUG ((DEBUG_ERROR, "Dusb4HrPciInit: Invalid parameter\n"));
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Status = EFI_INVALID_PARAMETER;
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goto Exit;
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}
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BaseLimit = (UINT16)(Usb4HrInst->MmioBase >> 16);
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//
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// Init Host Router Root Port
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//
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Bridge = &(Usb4HrInst->HrInfo.Rp);
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DevAddr = PCI_SEGMENT_LIB_ADDRESS (0, Bridge->Bdf.Bus, Bridge->Bdf.Dev, Bridge->Bdf.Func, 0);
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Status = HrSrvPciBridgeInit (DevAddr, BaseLimit, Bridge->PriBus, Bridge->SecBus, Bridge->SubBus);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "Dusb4HrPciInit: Fail to initialize Root Port, %r\n", Status));
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goto Exit;
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}
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//
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// Init Host Router US bridge
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//
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Bridge = &(Usb4HrInst->HrInfo.UsPort);
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DevAddr = PCI_SEGMENT_LIB_ADDRESS (0, Bridge->Bdf.Bus, Bridge->Bdf.Dev, Bridge->Bdf.Func, 0);
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Status = HrSrvPciBridgeInit (DevAddr, BaseLimit, Bridge->PriBus, Bridge->SecBus, Bridge->SubBus);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "Dusb4HrPciInit: Fail to initialize Upstream Port, %r\n", Status));
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goto Exit;
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}
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//
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// Init Host Router DS bridge
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//
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Bridge = &(Usb4HrInst->HrInfo.DsPort);
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DevAddr = PCI_SEGMENT_LIB_ADDRESS (0, Bridge->Bdf.Bus, Bridge->Bdf.Dev, Bridge->Bdf.Func, 0);
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Status = HrSrvPciBridgeInit (DevAddr, BaseLimit, Bridge->PriBus, Bridge->SecBus, Bridge->SubBus);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "Dusb4HrPciInit: Fail to initialize Downstream Port, %r\n", Status));
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goto Exit;
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}
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//
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// Init NHI device
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//
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NhiBdf = &(Usb4HrInst->HrInfo.NhiBdf);
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DevAddr = PCI_SEGMENT_LIB_ADDRESS (0, NhiBdf->Bus, NhiBdf->Dev, NhiBdf->Func, 0);
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Status = HrSrvPciDevInit (DevAddr, Usb4HrInst->MmioBase);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "Dusb4HrPciInit: Fail to initialize NHI, %r\n", Status));
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goto Exit;
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}
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Usb4HrInst->PciInitDone = TRUE;
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Dusb4HrDump (Usb4HrInst);
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Dusb4HrPciDump (&(Usb4HrInst->HrInfo));
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Exit:
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DEBUG ((DEBUG_INFO, "Dusb4HrPciInit exit\n"));
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return Status;
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}
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/**
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Un-Initialize PCI configuration space of discrete USB4 host router.
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@param[in] Usb4HrInst - Pointer to USB4 host router instance.
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**/
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VOID
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Dusb4HrPciUnInit (
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IN USB4_HR_INSTANCE *Usb4HrInst
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)
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{
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EFI_STATUS Status;
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UINT64 DevAddr;
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PCI_BRIDGE_INFO *Bridge;
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PCI_DEV_BDF *NhiBdf;
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DEBUG ((DEBUG_INFO, "Dusb4HrPciUnInit entry\n"));
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if (Usb4HrInst == NULL) {
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DEBUG ((DEBUG_ERROR, "Dusb4HrPciUnInit: Invalid parameter\n"));
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goto Exit;
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}
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if (Usb4HrInst->PciInitDone) {
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//
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// Un-Init NHI device
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//
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NhiBdf = &(Usb4HrInst->HrInfo.NhiBdf);
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DevAddr = PCI_SEGMENT_LIB_ADDRESS (0,NhiBdf->Bus, NhiBdf->Dev, NhiBdf->Func, 0);
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Status = HrSrvPciDevUninit (DevAddr);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "Dusb4HrPciUnInit: Fail to un-initialize NHI\n"));
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}
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//
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// Un-Init Host Router DS bridge
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//
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Bridge = &(Usb4HrInst->HrInfo.DsPort);
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DevAddr = PCI_SEGMENT_LIB_ADDRESS (0, Bridge->Bdf.Bus, Bridge->Bdf.Dev, Bridge->Bdf.Func, 0);
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Status = HrSrvPciBridgeUninit (DevAddr);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "Dusb4HrPciUnInit: Fail to un-initialize Downstream Port\n"));
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}
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//
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// Un-Init Host Router US bridge
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//
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Bridge = &(Usb4HrInst->HrInfo.UsPort);
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DevAddr = PCI_SEGMENT_LIB_ADDRESS (0, Bridge->Bdf.Bus, Bridge->Bdf.Dev, Bridge->Bdf.Func, 0);
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Status = HrSrvPciBridgeUninit (DevAddr);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "Dusb4HrPciUnInit: Fail to un-initialize Upstream Port\n"));
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}
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//
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// Init Host Router Root Port
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//
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Bridge = &(Usb4HrInst->HrInfo.Rp);
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DevAddr = PCI_SEGMENT_LIB_ADDRESS (0, Bridge->Bdf.Bus, Bridge->Bdf.Dev, Bridge->Bdf.Func, 0);
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Status = HrSrvPciBridgeUninit (DevAddr);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "Dusb4HrPciUnInit: Fail to un-initialize Root Port\n"));
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}
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Usb4HrInst->PciInitDone = FALSE;
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}
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Exit:
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DEBUG ((DEBUG_INFO, "Dusb4HrPciUnInit exit\n"));
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}
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/**
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Query PCI information of discrete USB4 host router.
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This function should be called after PCI enumeration.
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@param[in, out] Usb4Hr - Pointer to USB4 host router instance.
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@retval EFI_SUCCESS - Query PCI information successfully.
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@retval EFI_NOT_FOUND - Discrete USB4 host router is not found.
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@retval EFI_UNSUPPORTED - Fail to query PCI information.
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@retval EFI_INVALID_PARAMETER - Invalid parameter.
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**/
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EFI_STATUS
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Dusb4HrPciQuery (
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IN OUT USB4_HR_INSTANCE *Usb4Hr
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)
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{
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EFI_STATUS Status;
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PCI_DEV_BDF *NhiBdf;
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UINT64 DevAddr;
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DEBUG ((DEBUG_INFO, "Dusb4HrPciQuery entry\n"));
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if (Usb4Hr == NULL) {
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DEBUG ((DEBUG_ERROR, "Dusb4HrPciQuery: Null Usb4Hr\n"));
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Status = EFI_INVALID_PARAMETER;
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goto Exit;
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}
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Status = HrSrvPciBridgeQuery (&(Usb4Hr->HrInfo.Rp));
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "Dusb4HrPciQuery: Fail to query discrete USB4 HR RP, %r\n", Status));
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goto Exit;
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}
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//
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// Update upstream port bus number and query the new bridge info since the PCI resources have been re-assigned.
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//
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Usb4Hr->HrInfo.UsPort.Bdf.Bus = Usb4Hr->HrInfo.Rp.SecBus;
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Status = HrSrvPciBridgeQuery (&(Usb4Hr->HrInfo.UsPort));
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "Dusb4HrPciQuery: Fail to query discrete USB4 HR upstream port, %r\n", Status));
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goto Exit;
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}
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//
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// Update downstream port bus number and query the new bridge info since the PCI resources have been re-assigned.
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//
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Usb4Hr->HrInfo.DsPort.Bdf.Bus = Usb4Hr->HrInfo.UsPort.SecBus;
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Status = HrSrvPciBridgeQuery (&(Usb4Hr->HrInfo.DsPort));
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "Dusb4HrPciQuery: Fail to query discrete USB4 HR downstream port, %r\n", Status));
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goto Exit;
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}
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//
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// Update NHI device bus number since the PCI resources have been re-assigned.
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//
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NhiBdf = &(Usb4Hr->HrInfo.NhiBdf);
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NhiBdf->Bus = Usb4Hr->HrInfo.DsPort.SecBus;
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//
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// Query PCI I/O protocol of host router.
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//
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Status = HrSrvPciQueryIoProtocol (NhiBdf->Bus, NhiBdf->Dev, NhiBdf->Func, &(Usb4Hr->PciIo));
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "Dusb4HrPciQuery: Query PCI I/O protocol failure, %r\n", Status));
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Status = EFI_UNSUPPORTED;
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goto Exit;
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}
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//
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// Query MMIO space for the programming interface of Tx/Rx Ring access.
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//
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DevAddr = PCI_SEGMENT_LIB_ADDRESS (
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0,
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(UINT32)NhiBdf->Bus,
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(UINT32)NhiBdf->Dev,
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(UINT32)NhiBdf->Func,
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0
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);
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Status = HrSrvPciQueryMmio (DevAddr, &(Usb4Hr->MmioBase));
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "Dusb4HrPciQuery: Query MMIO failure, %r\n", Status));
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Status = EFI_UNSUPPORTED;
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goto Exit;
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}
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Exit:
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DEBUG ((DEBUG_INFO, "Dusb4HrPciQuery exit\n"));
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return Status;
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} |