278 lines
26 KiB
C
278 lines
26 KiB
C
/** @file
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This file contains various definitions for IHV HSTI implementation
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including STATUS string definitions
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2015 - 2021 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains 'Framework Code' and is licensed as such under the terms
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of your license agreement with Intel or your vendor. This file may not be
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modified, except as allowed by additional terms of your license agreement.
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@par Specification
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**/
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#ifndef __HSTI_FEATURE_BIT_1_1A_H__
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#define __HSTI_FEATURE_BIT_1_1A_H__
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#define HSTI_SECURITY_FEATURE_SIZE 3
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typedef enum {
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P2sbEpMask5RemAccMaskBits29To26UnexpSts = BIT0,
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P2sbEpMask7RemAccMaskBits31To30UnexpSts = BIT1,
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P2sbLockMaskBitUnexpSts = BIT2
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} SMM_HSTI_UNEXP_STATUS_DATA;
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#define HSTI_STATUS L" Status "
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#define HSTI_UNEXP_STATUS L" Unexpected Status "
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#define HSTI_PLATFORM_SECURITY_SPECIFICATION L" Platform Security Specification"
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#define HSTI_BOOTGUARD_CONFIGURATION L" - Boot Guard Configuration -"
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#define HSTI_SPI_FLASH_CONFIGURATION L" - SPI Flash Configuration -"
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#define HSTI_PCH_SECURITY_CONFIGURATION L" - PCH Security Configuration -"
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#define HSTI_BIOS_GUARD_SECURITY_CONFIGURATION L" - BIOS Guard Security Configuration -"
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#define HSTI_MEASURED_BOOT_CONFIGURATION L" - Measured Boot Configuration -"
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#define HSTI_INTEGRATED_DEVICE_DMA_PROTECTION L" - Integrated Device DMA Protection -"
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#define HSTI_DEBUG_INTERFACE_SECURITY_CONFIGURATION L" - Debug Interface Security Configuration -"
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#define HSTI_CPU_SECURITY_CONFIGURATION L" - CPU Security Configuration -"
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#define HSTI_MEMORY_MAP_SECURITY_CONFIGURATION L" - Memory Map Security Configuration -"
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#define HSTI_PROCESSOR_GRAPHICS_SECURITY_CONFIGURATION L" - Processor Graphics Security Configuration -"
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#define HSTI_PROCESSOR_SPD_SECURITY_CONFIGURATION L" - SPD Security Configuration -"
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#define HSTI_PCH_SMM_SECURITY_CONFIGURATION L" - Secure PCH SMM Security Configuration - "
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#define HSTI_BYTE0_HARDWARE_ROOTED_BOOT_INTEGRITY BIT0
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#define HSTI_BYTE0_HARDWARE_ROOTED_BOOT_INTEGRITY_UNEXP_STATUS_CODE_1 L"0x00000001"
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#define HSTI_BYTE0_HARDWARE_ROOTED_BOOT_INTEGRITY_UNEXP_STATUS_STRING_1 L" Boot Guard configured without Verified Boot\r\n"
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#define HSTI_BYTE0_HARDWARE_ROOTED_BOOT_INTEGRITY_UNEXP_STATUS_CODE_2 L"0x00000002"
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#define HSTI_BYTE0_HARDWARE_ROOTED_BOOT_INTEGRITY_UNEXP_STATUS_STRING_2 L" Boot Guard disabled\r\n"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION BIT1
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_CODE_1 L"0x00010001"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_STRING_1 L" SPI Flash not write protected\r\n"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_CODE_2 L"0x00010002"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_STRING_2 L" SPI Flash descriptor overridden\r\n"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_CODE_3 L"0x00010003"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_STRING_3 L" SPI Controller configuration unlocked\r\n"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_CODE_4 L"0x00010004"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_STRING_4 L" SPI Controller BIOS Interface unlocked\r\n"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_CODE_5 L"0x00010005"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_STRING_5 L" Top Swap enabled\r\n"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_CODE_6 L"0x00010006"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_STRING_6 L" SPI Vendor Specific Component Capabilities unlocked\r\n"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_CODE_8 L"0x00010008"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_STRING_8 L" ME FW not in Normal Working State\r\n"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_CODE_9 L"0x00010009"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_STRING_9 L" Flash Descriptor Invalid\r\n"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_CODE_A L"0x0001000A"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_STRING_A L" SPI Region Access Rights Invalid\r\n"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_CODE_D L"0x0001000D"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_STRING_D L" Global SMI not enabled and locked\r\n"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_CODE_E L"0x0001000E"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_STRING_E L" TCO SMI not enabled and locked\r\n"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_CODE_F L"0x0001000F"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_STRING_F L" Allowed WriteStatus SPI OPCODE configuration incorrect\r\n"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_CODE_10 L"0x00010010"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_STRING_10 L" Extended BIOS Decode Region is incorrectly Configured\r\n"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_CODE_11 L"0x00010011"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_STRING_11 L" Extended BIOS Decode Region limit is unlocked\r\n"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_CODE_12 L"0x00010012"
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#define HSTI_BYTE0_BOOT_FIRMWARE_MEDIA_PROTECTION_UNEXP_STATUS_STRING_12 L" Extended BIOS Decode Region base is unlocked\r\n"
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#define HSTI_BYTE0_SIGNED_FIRMWARE_UPDATE BIT2
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#define HSTI_BYTE0_SIGNED_FIRMWARE_UPDATE_UNEXP_STATUS_CODE_1 L"0x00020001"
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#define HSTI_BYTE0_SIGNED_FIRMWARE_UPDATE_UNEXP_STATUS_STRING_1 L" BIOS Guard unsupported\r\n"
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#define HSTI_BYTE0_SIGNED_FIRMWARE_UPDATE_UNEXP_STATUS_CODE_2 L"0x00020002"
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#define HSTI_BYTE0_SIGNED_FIRMWARE_UPDATE_UNEXP_STATUS_STRING_2 L" BIOS Guard configuration unlocked\r\n"
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#define HSTI_BYTE0_SIGNED_FIRMWARE_UPDATE_UNEXP_STATUS_CODE_3 L"0x00020001"
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#define HSTI_BYTE0_SIGNED_FIRMWARE_UPDATE_UNEXP_STATUS_STRING_3 L" BIOS Guard disabled\r\n"
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#define HSTI_BYTE0_MEASURED_BOOT_ENFORCEMENT BIT3
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#define HSTI_BYTE0_MEASURED_BOOT_ENFORCEMENT_UNEXP_STATUS_CODE_1 L"0x00030001"
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#define HSTI_BYTE0_MEASURED_BOOT_ENFORCEMENT_UNEXP_STATUS_STRING_1 L" Chipset supports FW TPM, however no TPM enabled\r\n"
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#define HSTI_BYTE0_MEASURED_BOOT_ENFORCEMENT_UNEXP_STATUS_CODE_2 L"0x00030002"
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#define HSTI_BYTE0_MEASURED_BOOT_ENFORCEMENT_UNEXP_STATUS_STRING_2 L" PCR[7] is not initialized\r\n"
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#define HSTI_BYTE0_MEASURED_BOOT_ENFORCEMENT_UNEXP_STATUS_CODE_3 L"0x00030003"
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#define HSTI_BYTE0_MEASURED_BOOT_ENFORCEMENT_UNEXP_STATUS_STRING_3 L" Event Log is not published or invalid\r\n"
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#define HSTI_BYTE0_MEASURED_BOOT_ENFORCEMENT_UNEXP_STATUS_CODE_4 L"0x00030004"
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#define HSTI_BYTE0_MEASURED_BOOT_ENFORCEMENT_UNEXP_STATUS_STRING_4 L" Platform Auth accessible via 0x00000000\r\n"
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#define HSTI_BYTE0_MEASURED_BOOT_ENFORCEMENT_UNEXP_STATUS_CODE_5 L"0x00030005"
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#define HSTI_BYTE0_MEASURED_BOOT_ENFORCEMENT_UNEXP_STATUS_STRING_5 L" Unable to test Platform Auth accessible via 0x00000000 - Authorization Size = 0\r\n"
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#define HSTI_BYTE0_MEASURED_BOOT_ENFORCEMENT_UNEXP_STATUS_CODE_6 L"0x00030006"
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#define HSTI_BYTE0_MEASURED_BOOT_ENFORCEMENT_UNEXP_STATUS_STRING_6 L" PCR(s) not found - no Event Log(s) published\r\n"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION BIT4
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_CODE_1 L"0x00040001"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_STRING_1 L" Bus Mastering Enabled for non-boot, integrated device - VTd Feature is not enabled in the CPU SKU\r\n"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_CODE_2 L"0x00040002"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_STRING_2 L" Bus Mastering Enabled for non-boot, integrated device - VTd1 is not enabled\r\n"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_CODE_3 L"0x00040003"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_STRING_3 L" Bus Mastering Enabled for non-boot, integrated device - VTd1 Region Address is not configured\r\n"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_CODE_4 L"0x00040004"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_STRING_4 L" Bus Mastering Enabled for non-boot, integrated device - VTd2 is not enabled\r\n"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_CODE_5 L"0x00040005"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_STRING_5 L" Bus Mastering Enabled for non-boot, integrated device - VTd2 Region Address is not configured\r\n"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_CODE_6 L"0x00040006"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_STRING_6 L" Bus Mastering Enabled for non-boot, integrated device - VTd3 is not enabled \r\n"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_CODE_7 L"0x00040007"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_STRING_7 L" Bus Mastering Enabled for non-boot, integrated device - VTd3 Region Address is not configured\r\n"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_CODE_8 L"0x00040008"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_STRING_8 L" Bus Mastering Enabled for non-boot, integrated device - VTd4 is not enabled \r\n"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_CODE_9 L"0x00040009"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_STRING_9 L" Bus Mastering Enabled for non-boot, integrated device - VTd4 Region Address is not configured\r\n"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_CODE_A L"0x0004000A"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_STRING_A L" Bus Mastering Enabled for non-boot, integrated device - VTd5 is not enabled\r\n"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_CODE_B L"0x0004000B"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_STRING_B L" Bus Mastering Enabled for non-boot, integrated device - VTd5 Region Address is not configured\r\n"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_CODE_C L"0x0004000C"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_STRING_C L" Bus Mastering Enabled for non-boot, integrated device - VTd6 is not enabled\r\n"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_CODE_D L"0x0004000D"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_STRING_D L" Bus Mastering Enabled for non-boot, integrated device - VTd6 Region Address is not configured\r\n"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_CODE_12 L"0x00040012"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_STRING_12 L" Bus Mastering Enabled for non-boot, integrated device - VTd9 is not enabled\r\n"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_CODE_13 L"0x00040013"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_STRING_13 L" Bus Mastering Enabled for non-boot, integrated device - VTd9 Region Address is not configured\r\n"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_CODE_10 L"0x00040010"
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#define HSTI_BYTE0_INTEGRATED_DEVICE_DMA_PROTECTION_UNEXP_STATUS_STRING_10 L" Bus Mastering Enabled for non-boot, integrated device - VTd Feature is enabled in the CPU SKU but disabled in the Platform\r\n"
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#define HSTI_BYTE0_DEBUG_INTERFACE_SECURITY_CONFIGURATION BIT5
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#define HSTI_BYTE0_DEBUG_INTERFACE_SECURITY_UNEXP_STATUS_CODE_1 L"0x00050001"
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#define HSTI_BYTE0_DEBUG_INTERFACE_SECURITY_UNEXP_STATUS_STRING_1 L" Debug MSR enabled\r\n"
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#define HSTI_BYTE0_DEBUG_INTERFACE_SECURITY_UNEXP_STATUS_CODE_2 L"0x00050002"
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#define HSTI_BYTE0_DEBUG_INTERFACE_SECURITY_UNEXP_STATUS_STRING_2 L" Debug interface unlocked\r\n"
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#define HSTI_BYTE0_DEBUG_INTERFACE_SECURITY_UNEXP_STATUS_CODE_3 L"0x00050003"
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#define HSTI_BYTE0_DEBUG_INTERFACE_SECURITY_UNEXP_STATUS_STRING_3 L" OPI Debug interface unlocked\r\n"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION BIT6
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_CODE_1 L"0x00060001"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_STRING_1 L" Minimum uCode patch revision not met\r\n"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_CODE_2 L"0x00060002"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_STRING_2 L" Pre-production silicon in use\r\n"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_CODE_3 L"0x00060003"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_STRING_3 L" VMX & Senter feature configuration unlocked\r\n"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_CODE_4 L"0x00060004"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_STRING_4 L" SMM Code Fetch feature configuration unlocked\r\n"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_CODE_5 L"0x00060005"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_STRING_5 L" AES-NI Feature configuration unlocked\r\n"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_CODE_6 L"0x00060006"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_STRING_6 L" FIT table not present\r\n"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_CODE_7 L"0x00060007"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_STRING_7 L" Microcode Range Registers improperly configured or unlocked\r\n"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_CODE_8 L"0x00060008"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_STRING_8 L" SMM Configuration Unlocked\r\n"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_CODE_9 L"0x00060009"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_STRING_9 L" TSEG not naturally aligned\r\n"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_CODE_A L"0x0006000A"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_STRING_A L" Improper SMRR configuration\r\n"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_CODE_B L"0x0006000B"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_STRING_B L" SMM Code Fetch outside SMRAM detection feature is disabled\r\n"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_CODE_C L"0x0006000C"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_STRING_C L" BIOS DONE MSR is not set\r\n"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_CODE_D L"0x0006000D"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_STRING_D L" Intel TXT configuration unlocked\r\n"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_CODE_E L"0x0006000E"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_STRING_E L" Processor Reserved Memory Range Register is Supported but Disabled\r\n"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_CODE_F L"0x0006000F"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_STRING_F L" Volume Management Device is Unlocked\r\n"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_CODE_10 L"0x00060010"
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#define HSTI_BYTE0_SECURE_CPU_CONFIGURATION_UNEXP_STATUS_STRING_10 L" TME bit is Unlocked\r\n"
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#define HSTI_BYTE1_SECURE_MEMORY_MAP_CONFIGURATION BIT0
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#define HSTI_BYTE1_SECURE_MEMORY_MAP_CONFIGURATION_UNEXP_STATUS_CODE_1 L"0x00080001"
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#define HSTI_BYTE1_SECURE_MEMORY_MAP_CONFIGURATION_UNEXP_STATUS_STRING_1 L" Memory BAR configuration unlocked\r\n"
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#define HSTI_BYTE1_SECURE_MEMORY_MAP_CONFIGURATION_UNEXP_STATUS_CODE_2 L"0x00080002"
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#define HSTI_BYTE1_SECURE_MEMORY_MAP_CONFIGURATION_UNEXP_STATUS_STRING_2 L" Fixed MMIO regions overlap\r\n"
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#define HSTI_BYTE1_SECURE_MEMORY_MAP_CONFIGURATION_UNEXP_STATUS_CODE_3 L"0x00080003"
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#define HSTI_BYTE1_SECURE_MEMORY_MAP_CONFIGURATION_UNEXP_STATUS_STRING_3 L" Non lockable MMIO ranges overlap other critical regions\r\n"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION BIT1
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_CODE_1 L"0x00090001"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_STRING_1 L" Graphics configuration unlocked\r\n"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_CODE_2 L"0x00090002"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_STRING_2 L" Invalid Graphics Memory Alignment\r\n"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_CODE_3 L"0x00090003"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_STRING_3 L" Reserved Check failed\r\n"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_CODE_4 L"0x00090004"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_STRING_4 L" WOPCM BASE Consistency Check failed\r\n"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_CODE_5 L"0x00090005"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_STRING_5 L" DSM Consistency Check failed\r\n"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_CODE_6 L"0x00090006"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_STRING_6 L" GSM Consistency Check failed\r\n"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_CODE_7 L"0x00090007"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_STRING_7 L" GGC Consistency Check failed\r\n"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_CODE_8 L"0x00090008"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_STRING_8 L" TOLUD Consistency Check failed\r\n"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_CODE_9 L"0x00090009"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_STRING_9 L" TOUUD Consistency Check failed\r\n"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_CODE_A L"0x0009000A"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_STRING_A L" TSEG Consistency Check failed\r\n"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_CODE_B L"0x0009000B"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_STRING_B L" PAVP Lock bit is not Locked\r\n"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_CODE_C L"0x0009000C"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_STRING_C L" DSM Lock bit is not Locked\r\n"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_CODE_D L"0x0009000D"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_STRING_D L" GSM Lock bit is not Locked\r\n"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_CODE_E L"0x0009000E"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_STRING_E L" GGC Lock bit is not Locked\r\n"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_CODE_F L"0x0009000F"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_STRING_F L" TOLUD Lock bit is not Locked\r\n"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_CODE_10 L"0x00090010"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_STRING_10 L" TOUUD Lock bit is not Locked\r\n"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_CODE_11 L"0x00090011"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_STRING_11 L" TSEG Lock bit is not Locked\r\n"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_CODE_12 L"0x00090012"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_STRING_12 L" RC6 Lock bit is not Locked\r\n"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_CODE_13 L"0x00090013"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_STRING_13 L" DSM Valid bit is not set\r\n"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_CODE_14 L"0x00090014"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_STRING_14 L" GSM Valid bit is not set\r\n"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_CODE_15 L"0x00090015"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_STRING_15 L" WOPCM Range Valid bits are not set\r\n"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_CODE_16 L"0x00090016"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_STRING_16 L" RC6 Range Valid bits are not set\r\n"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_CODE_17 L"0x00090017"
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#define HSTI_BYTE1_SECURE_INTEGRATED_GRAPHICS_CONFIGURATION_UNEXP_STATUS_STRING_17 L" Doorbell Range Valid bits are not set\r\n"
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#define HSTI_BYTE1_SECURE_PCH_CONFIGURATION BIT2
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#define HSTI_BYTE1_SECURE_PCH_CONFIGURATION_UNEXP_STATUS_CODE_1 L"0x000A0001"
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#define HSTI_BYTE1_SECURE_PCH_CONFIGURATION_UNEXP_STATUS_STRING_1 L" Thermal Configuration unlocked\r\n"
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#define HSTI_BYTE1_SECURE_PCH_CONFIGURATION_UNEXP_STATUS_CODE_2 L"0x000A0002"
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#define HSTI_BYTE1_SECURE_PCH_CONFIGURATION_UNEXP_STATUS_STRING_2 L" BAR's unlocked\r\n"
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#define HSTI_BYTE1_SECURE_PCH_CONFIGURATION_UNEXP_STATUS_CODE_3 L"0x000A0003"
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#define HSTI_BYTE1_SECURE_PCH_CONFIGURATION_UNEXP_STATUS_STRING_3 L" Reserved Check failure\r\n"
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#define HSTI_BYTE1_SECURE_PCH_CONFIGURATION_UNEXP_STATUS_CODE_4 L"0x000A0004"
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#define HSTI_BYTE1_SECURE_PCH_CONFIGURATION_UNEXP_STATUS_STRING_4 L" SPD not write protected\r\n"
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#define HSTI_BYTE1_SECURE_PCH_CONFIGURATION_UNEXP_STATUS_CODE_5 L"0x000A0005"
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#define HSTI_BYTE1_SECURE_PCH_CONFIGURATION_UNEXP_STATUS_STRING_5 L" ACS ECH Root Port is not Configured\r\n"
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#define HSTI_BYTE1_SECURE_PCH_CONFIGURATION_UNEXP_STATUS_CODE_6 L"0x000A0006"
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#define HSTI_BYTE1_SECURE_PCH_CONFIGURATION_UNEXP_STATUS_STRING_6 L" VR CONFIG Bit is Unlocked\r\n"
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// HSTI IHV PCH P2SB SMM
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#define HSTI_BYTE1_SECURE_PCH_SMM_CONFIGURATION_UNEXP_STATUS_CODE_1 L"0x000A0010"
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#define HSTI_BYTE1_SECURE_PCH_SMM_CONFIGURATION_UNEXP_STATUS_STRING_1 L" P2SB EPMASK5 Remove Access Mask is not Configured\r\n"
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#define HSTI_BYTE1_SECURE_PCH_SMM_CONFIGURATION_UNEXP_STATUS_CODE_2 L"0x000A0020"
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#define HSTI_BYTE1_SECURE_PCH_SMM_CONFIGURATION_UNEXP_STATUS_STRING_2 L" P2SB EPMASK7 Remove Access Mask is not Configured\r\n"
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#define HSTI_BYTE1_SECURE_PCH_SMM_CONFIGURATION_UNEXP_STATUS_CODE_3 L"0x000A0030"
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#define HSTI_BYTE1_SECURE_PCH_SMM_CONFIGURATION_UNEXP_STATUS_STRING_3 L" P2SB Mask Bit is Unlocked\r\n"
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#endif
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