189 lines
4.1 KiB
C
189 lines
4.1 KiB
C
/** @file
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Platform Nv RAM Hook Library Header Definition which will oprovide the absraction
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to the different NVRAM types like eMMC, ECRAM, secondary SPI part etc.
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@copyright
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INTEL CONFIDENTIAL
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Copyright (c) 2017 - 2019 Intel Corporation. All rights reserved
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains a 'Sample Driver' and is licensed as such under the terms
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of your license agreement with Intel or your vendor. This file may be modified
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by the user, subject to the additional terms of the license agreement.
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@par Specification Reference:
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**/
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#ifndef _PLATFORM_NVRAM_HOOK_LIB_H_
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#define _PLATFORM_NVRAM_HOOK_LIB_H_
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#ifndef DEFAULT_VALUE
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#define DEFAULT_VALUE 0
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#endif
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/**
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Test to see if Checksum is bad.
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@retval TRUE - Checksum content is bad
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FALSE - Checksum content is good
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**/
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BOOLEAN
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IsChecksumBad (
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VOID
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);
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/**
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Clear Diagnostic Status.
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**/
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VOID
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ClearDiagnosticStatus (
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VOID
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);
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/**
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Check to reset setup variable and Clear CMOS 0E when CMOS content is bad
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@retval Flag to Reset Setup variable : TRUE - When CMOS content is bad
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FALSE - Otherwise
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**/
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BOOLEAN
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NeedResetBoardDefaultVariableHob(
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VOID
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);
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/**
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Load CMOS default on RTC battery failure.
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**/
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VOID
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SecondaryNvRamInit(
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VOID
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);
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/**
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Get Boot Flag Status.
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@retval Value of current boot status
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**/
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UINT8
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GetFastBootFlagStatus(
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VOID
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);
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/**
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Update Boot Flag Status.
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@param [in] BootStatus Current Boot value which to be updated.
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**/
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VOID
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UpdateFastBootFlagStatus(
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UINT8 BootStatus
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);
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/**
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Get RTC 3 Address.
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@retval Current value of RTC 3 Address
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**/
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UINT8
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GetRtc3Address(
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VOID
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);
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/**
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Get Post Code Break for Port 80 and 81
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@param [out] *Port80 Pointer to return value of post code 80
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@param [out] *Port81 Pointer to return value of post code 81
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**/
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VOID
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GetPostCodeBreak(
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UINT8 *Port80,
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UINT8 *Port81
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);
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/**
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Get TXT Alias Check Request and Reset it.
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@retval TXT Alias Check Request
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**/
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UINT8
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GetTxtAliasCheckAndReset(
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VOID
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);
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/**
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Save the TXT Alias Check Request.
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@param [in] ACheckRequest Request of TXT Alias Check.
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**/
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VOID
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SaveTxtAliasCheck(
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UINT8 ACheckRequest
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);
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/**
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Save the CPU Ratio.
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@param [in] CpuRatio The Cpu ratio value to be saved.
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**/
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VOID
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SaveCpuRatio(
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UINT8 CpuRatio
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);
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/**
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Set the BCLK Ramp Flag.
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@param [in] BclkRampFlag The BCLK Ramp Flag to be set.
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**/
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VOID
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SetBclkRampFlag(
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UINT8 BclkRampFlag
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);
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/**
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Get TBT Host Router Status.
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CMOS_TBTHR_PRESENT_ON_RESUME: Bits 0-3 is for DTBT and Bits 4-7 is for ITBT (HIA0/1/2/Reserved)
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@retval Current value of TBT Host Router Status
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**/
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UINT8
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GetTbtHostRouterStatus(
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VOID
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);
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/**
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Save TBT Host Router Status.
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CMOS_TBTHR_PRESENT_ON_RESUME: Bits 0-3 is for DTBT and Bits 4-7 is for ITBT (HIA0/1/2/Reserved)
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@param [in] TbtHrStatus The TBT Host Router Status to be udpated.
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**/
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VOID
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SaveTbtHostRouterStatus(
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UINT8 TbtHrStatus
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);
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#endif // _PLATFORM_NVRAM_HOOK_LIB_H_
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