271 lines
6.5 KiB
C
271 lines
6.5 KiB
C
/** @file
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SIO chip specific implementation.
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2010 - 2017 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains 'Framework Code' and is licensed as such under the terms
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of your license agreement with Intel or your vendor. This file may not be
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modified, except as allowed by additional terms of your license agreement.
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@par Specification Reference:
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**/
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#ifndef _SIO_H_
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#define _SIO_H_
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#include "Register.h"
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#define COM1_ADDRESS 0x03F8
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#define COM1_IRQ_BIT BIT4
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#define HWMON_BASE_ADDRESS 0x0290 // HWMON uses +5 and +6.
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#define HWMON_INDEX_ADDRESS (HWMON_BASE_ADDRESS + 5)
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#define HWMON_DATA_ADDRESS (HWMON_BASE_ADDRESS + 6)
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//#define NCT6776F_HWMON_PROTOCOL_GUID \
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// { 0x1c20e600, 0x2814, 0x4e22, { 0x9e, 0x96, 0x14, 0xe0, 0x46, 0x72, 0xf4, 0xd4 }};
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typedef struct {
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UINT8 Register;
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UINT8 Value;
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} HWMON_REGISTER_PAIR;
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EFI_STATUS
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EFIAPI
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Nct6776fHwMonStart (
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VOID
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);
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EFI_STATUS
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EFIAPI
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Nct6776fHwMonSetBankValues (
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IN HWMON_REGISTER_PAIR *RegisterPair,
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IN UINT8 Bank,
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IN UINT8 RegisterCount
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);
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EFI_STATUS
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EFIAPI
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Nct6776fHwMonReadRegister (
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IN UINT8 Register,
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OUT UINT8 *Value
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);
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typedef
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EFI_STATUS
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(EFIAPI *NCT6776F_HWMON_START) (
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VOID
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);
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typedef
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EFI_STATUS
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(EFIAPI *NCT6776F_HWMON_SET_BANK_VALUES) (
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IN HWMON_REGISTER_PAIR *RegisterPair,
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IN UINT8 Bank,
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IN UINT8 RegisterCount
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);
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typedef
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EFI_STATUS
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(EFIAPI *NCT6776F_HWMON_READ_REGISTER) (
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IN UINT8 Register,
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OUT UINT8 *Value
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);
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typedef struct _NCT6776F_HWMON_PROTOCOL {
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NCT6776F_HWMON_START StartMonitor;
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NCT6776F_HWMON_SET_BANK_VALUES SetMonitorBankValues;
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NCT6776F_HWMON_READ_REGISTER ReadMonitorRegister;
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} NCT6776F_HWMON_PROTOCOL;
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typedef
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UINT8
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(EFIAPI *LOCAL_IO_WRITE8) (
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IN UINTN Port,
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IN UINT8 Value
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);
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#define RESOURCE_IO BIT0
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#define RESOURCE_IRQ BIT1
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#define RESOURCE_DMA BIT2
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#define RESOURCE_MEM BIT3
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#pragma pack(1)
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typedef struct {
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EFI_ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR Io;
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EFI_ACPI_IRQ_NOFLAG_DESCRIPTOR Irq;
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EFI_ACPI_END_TAG_DESCRIPTOR End;
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} ACPI_SIO_RESOURCES_IO_IRQ;
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typedef struct {
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EFI_ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR Io;
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EFI_ACPI_END_TAG_DESCRIPTOR End;
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} ACPI_SIO_RESOURCES_IO;
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#pragma pack()
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typedef struct {
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UINT32 HID;
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UINT32 UID;
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} EFI_SIO_ACPI_DEVICE_ID;
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typedef struct {
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EFI_SIO_ACPI_DEVICE_ID Device;
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UINT8 DeviceId;
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UINT8 ResourceMask;
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ACPI_RESOURCE_HEADER_PTR Resources;
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ACPI_RESOURCE_HEADER_PTR PossibleResources;
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} DEVICE_INFO;
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/**
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Initialize the SIO chip and save for S3.
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**/
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VOID
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SioInitAndSaveS3 (
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VOID
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);
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/**
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Return the supported devices.
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@param[out] Devices Pointer to pointer of EFI_SIO_ACPI_DEVICE_ID.
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Caller is responsible to free the buffer.
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@param[out] Count Pointer to UINTN holding the device count.
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**/
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VOID
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DeviceGetList (
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OUT EFI_SIO_ACPI_DEVICE_ID **Devices,
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OUT UINTN *Count
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);
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/**
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Program the SIO chip to enable the specified device using the default resource.
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@param[in] Device Pointer to EFI_SIO_ACPI_DEVICE_ID.
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**/
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VOID
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DeviceEnable (
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IN EFI_SIO_ACPI_DEVICE_ID *Device
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);
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/**
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Get the possible ACPI resources for specified device.
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@param[in] Device Pointer to EFI_SIO_ACPI_DEVICE_ID.
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@param[out] Resources Pointer to ACPI_RESOURCE_HEADER_PTR.
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@retval EFI_SUCCESS The resources are returned successfully.
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**/
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EFI_STATUS
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DevicePossibleResources (
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IN EFI_SIO_ACPI_DEVICE_ID *Device,
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OUT ACPI_RESOURCE_HEADER_PTR *Resources
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);
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/**
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Set the ACPI resources for specified device.
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The SIO chip is programmed to use the new resources and the
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resources setting are saved. The function assumes the resources
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are valid.
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@param[in] Device Pointer to EFI_SIO_ACPI_DEVICE_ID.
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@param[in] Resources ACPI_RESOURCE_HEADER_PTR.
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@retval EFI_SUCCESS The resources are set successfully.
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**/
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EFI_STATUS
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DeviceSetResources (
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IN EFI_SIO_ACPI_DEVICE_ID *Device,
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IN ACPI_RESOURCE_HEADER_PTR Resources
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);
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/**
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Get the ACPI resources for specified device.
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@param[in] Device Pointer to EFI_SIO_ACPI_DEVICE_ID.
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@param[out] Resources Pointer to ACPI_RESOURCE_HEADER_PTR.
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@retval EFI_SUCCESS The resources are returned successfully.
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**/
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EFI_STATUS
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DeviceGetResources (
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IN EFI_SIO_ACPI_DEVICE_ID *Device,
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OUT ACPI_RESOURCE_HEADER_PTR *Resources
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);
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/**
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Program the SIO chip to enter the configure mode.
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**/
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VOID
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EnterConfigMode (
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VOID
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);
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/**
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Program the SIO chip to exit the configure mode.
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**/
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VOID
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ExitConfigMode (
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VOID
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);
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/**
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Perform a 8-bit I/O write to SIO register.
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@param[in] Index The register index.
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@param[in] Data The value to write to register.
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**/
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VOID
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WriteRegister (
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IN UINT8 Index,
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IN UINT8 Data
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);
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/**
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Perform a 8-bit I/O read from SIO register.
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@param[in] Index The register index.
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@retval Value The value written to the register.
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**/
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UINT8
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ReadRegister (
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IN UINT8 Index
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);
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#endif // _SIO_H_
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