312 lines
9.9 KiB
C
312 lines
9.9 KiB
C
/** @file
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This header file contains processors power management definitions.
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@copyright
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INTEL CONFIDENTIAL
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Copyright 1999 - 2021 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains an 'Intel Peripheral Driver' and is uniquely identified as
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"Intel Reference Module" and is licensed for Intel CPUs and chipsets under
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the terms of your license agreement with Intel or your vendor. This file may
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be modified by the user, subject to additional terms of the license agreement.
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@par Specification Reference:
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**/
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#ifndef _POWER_MANAGEMENT_H_
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#define _POWER_MANAGEMENT_H_
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#include <Uefi.h>
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#include <IndustryStandard/Acpi.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Library/BaseLib.h>
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#include <Library/DebugLib.h>
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#include <Library/IoLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/S3BootScriptLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/HobLib.h>
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#include <Protocol/AcpiTable.h>
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#include <Protocol/MpService.h>
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#include <Protocol/FirmwareVolume2.h>
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#include <Protocol/CpuNvsArea.h>
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#include <Library/CpuPlatformLib.h>
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#include <PowerMgmtNvsStruct.h>
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#include <Library/AslUpdateLib.h>
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#include <Library/PciSegmentLib.h>
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#include <CpuInitDataHob.h>
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#include <Library/TimerLib.h>
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#include <Library/CpuMailboxLib.h>
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#include <Protocol/BiosGuardNvsArea.h>
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#include <Library/MsrFruLib.h>
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#define FADT_C3_LATENCY 57
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#define FADT_C3_LATENCY_DISABLED 1001
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#define NATIVE_PSTATE_LATENCY 10
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#define PSTATE_BM_LATENCY 10
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#define EFI_FIELD_OFFSET(TYPE,Field) ((UINTN)(&(((TYPE *) 0)->Field)))
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//
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// Global variables
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//
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extern EFI_GUID gCpuAcpiTableStorageGuid;
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extern CPU_NVS_AREA_PROTOCOL *gCpuNvsAreaProtocol; ///< CPU Nvs Protocol
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extern BIOSGUARD_NVS_AREA_PROTOCOL *gBiosGuardNvsAreaProtocol; ///< Bios Guard GlobalNvs Protocol
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//
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// Globals to support updating ACPI Tables
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//
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extern EFI_ACPI_TABLE_PROTOCOL *mAcpiTable;
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extern EFI_ACPI_DESCRIPTION_HEADER *mCpu0IstTable;
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extern EFI_ACPI_DESCRIPTION_HEADER *mApIstTable;
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extern EFI_ACPI_DESCRIPTION_HEADER *mCpu0CstTable;
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extern EFI_ACPI_DESCRIPTION_HEADER *mApCstTable;
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extern EFI_ACPI_DESCRIPTION_HEADER *mCpuSsdtTable;
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extern EFI_ACPI_DESCRIPTION_HEADER *mCpu0TstTable;
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extern EFI_ACPI_DESCRIPTION_HEADER *mApTstTable;
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extern EFI_ACPI_DESCRIPTION_HEADER *mItbmTable;
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extern EFI_ACPI_DESCRIPTION_HEADER *mItbmSciTable;
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extern EFI_ACPI_DESCRIPTION_HEADER *mCpu0HwpTable;
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extern EFI_ACPI_DESCRIPTION_HEADER *mApHwpTable;
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extern EFI_ACPI_DESCRIPTION_HEADER *mHwpLvtTable;
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extern EFI_ACPI_DESCRIPTION_HEADER *mCpu0PsdTable;
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extern EFI_ACPI_DESCRIPTION_HEADER *mApPsdTable;
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extern CPU_INIT_DATA_HOB *mCpuInitDataHob;
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///
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/// ASL SSDT structure layout
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///
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#pragma pack(1)
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typedef struct {
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UINT8 NameOp; ///< First opcode is a NameOp.
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UINT32 NameString; ///< 'TDSS' ; Name of object.
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UINT8 PackageOp; ///< db 12h ; Sixth OpCode is PackageOp.
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UINT16 PackageLen; ///< dw 0h ; Seventh/Eighth OpCode is PackageLength.
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UINT8 PackageEntryNum; ///< db 0Ch ; Ninth OpCode is number of package entries.
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UINT8 StringPrefix1; ///< 0Dh
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UINT64 Cpu0IstStr; ///< 00h
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UINT8 StringNull1; ///< 00h
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UINT8 DwordPrefix1a; ///< 0Ch
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UINT32 Cpu0IstAddr; ///< 00h
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UINT8 DwordPrefix1b; ///< 0Ch
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UINT32 Cpu0IstLen; ///< 00h
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UINT8 StringPrefix2; ///< 0Dh
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UINT64 Cpu1IstStr; ///< 00h
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UINT8 StringNull2; ///< 00h
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UINT8 DwordPrefix2a; ///< 0Ch
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UINT32 ApIstAddr; ///< 00h
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UINT8 DwordPrefix2b; ///< 0Ch
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UINT32 ApIstLen; ///< 00h
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UINT8 StringPrefix3; ///< 0Dh
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UINT64 Cpu0CstStr; ///< 00h
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UINT8 StringNull3; ///< 00h
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UINT8 DwordPrefix3a; ///< 0Ch
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UINT32 Cpu0CstAddr; ///< 00h
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UINT8 DwordPrefix3b; ///< 0Ch
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UINT32 Cpu0CstLen; ///< 00h
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UINT8 StringPrefix4; ///< 0Dh
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UINT64 ApCstStr; ///< 00h
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UINT8 StringNull4; ///< 00h
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UINT8 DwordPrefix4a; ///< 0Ch
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UINT32 ApCstAddr; ///< 00h
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UINT8 DwordPrefix4b; ///< 0Ch
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UINT32 ApCstLen; ///< 00h
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UINT8 StringPrefix5; ///< 0Dh
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UINT64 Cpu0HwpStr; ///< 00h
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UINT8 StringNull5; ///< 00h
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UINT8 DwordPrefix5a; ///< 0Ch
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UINT32 Cpu0HwpAddr; ///< 00h
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UINT8 DwordPrefix5b; ///< 0Ch
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UINT32 Cpu0HwpLen; ///< 00h
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UINT8 StringPrefix6; ///< 0Dh
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UINT64 ApHwpStr; ///< 00h
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UINT8 StringNull6; ///< 00h
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UINT8 DwordPrefix6a; ///< 0Ch
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UINT32 ApHwpAddr; ///< 00h
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UINT8 DwordPrefix6b; ///< 0Ch
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UINT32 ApHwpLen; ///< 00h
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UINT8 StringPrefix7; ///< 0Dh
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UINT64 HwpLvtStr; ///< 00h
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UINT8 StringNull7; ///< 00h
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UINT8 DwordPrefix7a; ///< 0Ch
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UINT32 HwpLvtAddr; ///< 00h
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UINT8 DwordPrefix7b; ///< 0Ch
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UINT32 HwpLvtLen; ///< 00h
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UINT8 StringPrefix8; ///< 0Dh
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UINT64 Cpu0PsdStr; ///< 00h
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UINT8 StringNull8; ///< 00h
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UINT8 DwordPrefix8a; ///< 0Ch
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UINT32 Cpu0PsdAddr; ///< 00h
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UINT8 DwordPrefix8b; ///< 0Ch
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UINT32 Cpu0PsdLen; ///< 00h
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UINT8 StringPrefix9; ///< 0Dh
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UINT64 Cpu1PsdStr; ///< 00h
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UINT8 StringNull9; ///< 00h
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UINT8 DwordPrefix9a; ///< 0Ch
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UINT32 ApPsdAddr; ///< 00h
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UINT8 DwordPrefix9b; ///< 0Ch
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UINT32 ApPsdLen; ///< 00h
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} SSDT_LAYOUT;
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#pragma pack()
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//
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// ASL PSS package structure layout
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//
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#pragma pack (1)
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typedef struct {
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UINT8 NameOp; // 12h ;First opcode is a NameOp.
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UINT8 PackageLead; // 20h ;First opcode is a NameOp.
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UINT8 NumEntries; // 06h ;First opcode is a NameOp.
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UINT8 DwordPrefix1; // 0Ch
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UINT32 CoreFrequency; // 00h
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UINT8 DwordPrefix2; // 0Ch
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UINT32 Power; // 00h
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UINT8 DwordPrefix3; // 0Ch
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UINT32 TransLatency; // 00h
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UINT8 DwordPrefix4; // 0Ch
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UINT32 BmLatency; // 00h
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UINT8 DwordPrefix5; // 0Ch
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UINT32 Control; // 00h
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UINT8 DwordPrefix6; // 0Ch
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UINT32 Status; // 00h
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} PSS_PACKAGE_LAYOUT;
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#pragma pack()
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//
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// FVID Table Information
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// Default FVID table
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// One header field plus states
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//
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extern UINT16 mNumberOfStates;
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extern FVID_TABLE *mFvidPointer;
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//
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// Function prototypes
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//
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/**
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This will perform Miscellaneous Power Management related programming.
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**/
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VOID
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InitMiscFeatures (
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VOID
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);
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/**
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Patch the native _PSS package with the EIST values
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Uses ratio/VID values from the FVID table to fix up the control values in the _PSS.
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(1) Find _PSS package:
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(1.1) Find the _PR_CPU0 scope.
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(1.2) Save a pointer to the package length.
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(1.3) Find the _PSS AML name object.
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(2) Resize the _PSS package.
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(3) Fix up the _PSS package entries
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(3.1) Check Turbo mode support.
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(3.2) Check Dynamic FSB support.
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(4) Fix up the Processor block and \_PR_CPU0 Scope length.
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(5) Update SSDT Header with new length.
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@retval EFI_SUCCESS
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@retval EFI_NOT_FOUND - If _PR_.CPU0 scope is not foud in the ACPI tables
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**/
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EFI_STATUS
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AcpiPatchPss (
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VOID
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);
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/**
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Locate the CPU ACPI tables data file and read ACPI SSDT tables.
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Publish the appropriate SSDT based on current configuration and capabilities.
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@param[in] This Pointer to the protocol instance
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@retval EFI_SUCCESS - on success
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@retval Appropiate failure code on error
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**/
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EFI_STATUS
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InitCpuAcpiTable (
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VOID
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);
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/**
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Initialize the power management support.
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This function will do boot time configuration:
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Install into SMRAM/SMM
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Detect HW capabilities and SW configuration
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Initialize HW and software state (primarily MSR and ACPI tables)
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Install SMI handlers for runtime interfacess
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@param[in] ImageHandle Pointer to the loaded image protocol for this driver
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@param[in] SystemTable Pointer to the EFI System Table
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@retval EFI_SUCCESS The driver installed/initialized correctly.
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@retval Driver will ASSERT in debug builds on error. PPM functionality is considered critical for mobile systems.
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**/
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EFI_STATUS
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EFIAPI
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InitPowerManagement (
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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);
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/**
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Initializes the CPU power management global variable.
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This must be called prior to any of the functions being used.
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**/
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VOID
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InitPowerManagementGlobalVariables (
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VOID
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);
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/**
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Initialize the platform power management based on hardware capabilities
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and user configuration settings.
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This includes creating FVID table, updating ACPI tables,
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and updating processor and chipset hardware configuration.
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This should be called prior to any Px, Cx, Tx activity.
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@retval EFI_SUCCESS - on success
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@retval Appropiate failure code on error
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**/
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EFI_STATUS
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InitPpmDxe (
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VOID
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);
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/**
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Patch the native _CPC package with the lowest of highest performance values
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@retval EFI_SUCCESS
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**/
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EFI_STATUS
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AcpiPatchCpc (
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VOID
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);
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#endif
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