622 lines
22 KiB
C
622 lines
22 KiB
C
/** @file
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Source file for FSP Init PEI module
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2012 - 2021 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains an 'Intel Peripheral Driver' and is uniquely identified as
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"Intel Reference Module" and is licensed for Intel CPUs and chipsets under
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the terms of your license agreement with Intel or your vendor. This file may
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be modified by the user, subject to additional terms of the license agreement.
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@par Specification
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**/
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#include "FspInit.h"
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#include <Library/PcdLib.h>
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#include <Ppi/SecPlatformInformation.h>
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#include <Ppi/PeiSiDefaultPolicy.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Register/CommonMsr.h>
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#include <Library/MeTypeLib.h>
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#include <Library/FspSwitchStackLib.h>
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#include <Ppi/GraphicsPlatformPolicyPpi.h>
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#include <GraphicsDataHob.h>
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extern EDKII_PEI_MP_SERVICES2_PPI mMpServices2WrapperPpi;
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EDKII_PEI_MP_SERVICES2_PPI *mCpuMp2Ppi = NULL;
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FSP_GLOBAL_DATA *mFspGlobalData = NULL;
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EFI_STATUS
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FspInitOnPciEnumerationComplete (
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IN EFI_PEI_SERVICES **PeiServices,
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IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
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IN VOID *Ppi
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);
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EFI_STATUS
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FspApiModePolicyInitUpdateDone (
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IN EFI_PEI_SERVICES **PeiServices,
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IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
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IN VOID *Ppi
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);
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EFI_PEI_PPI_DESCRIPTOR mFspReadyToInstallMp = {
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(EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
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&gPeiReadyToInstallMpPpiGuid,
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NULL
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};
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EFI_SEC_PLATFORM_INFORMATION2_PPI mFspSecPlatformInformation2 = {
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FspSecPlatformInformation2
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};
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EFI_PEI_PPI_DESCRIPTOR mFspPeiSecPlatformInformation2 = {
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(EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
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&gEfiSecPlatformInformation2PpiGuid,
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&mFspSecPlatformInformation2
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};
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STATIC
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EFI_PEI_NOTIFY_DESCRIPTOR mOnPciEnumerationCompleteNotifyList[] = {
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{
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(EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
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&gEfiPciEnumerationCompleteProtocolGuid,
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FspInitOnPciEnumerationComplete
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}
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};
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EFI_PEI_PPI_DESCRIPTOR mS3SmmInitDonePpi = {
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(EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
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&gEdkiiS3SmmInitDoneGuid,
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NULL
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};
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EFI_PEI_NOTIFY_DESCRIPTOR mOnDefaultPolicyInitNotifyList[] = {
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{
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(EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
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&gSiDefaultPolicyInitPpiGuid,
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FspApiModePolicyInitUpdateDone
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}
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};
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EFI_STATUS
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EFIAPI
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GetVbtData (
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OUT EFI_PHYSICAL_ADDRESS *VbtAddress,
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OUT UINT32 *VbtSize
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)
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{
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GFX_DATA_HOB *GfxDataHob;
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GfxDataHob = (GFX_DATA_HOB *) GetFirstGuidHob (&gGraphicsDataHobGuid);
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if (GfxDataHob != NULL) {
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*VbtAddress = GfxDataHob->GraphicsConfigPtr;
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*VbtSize = GfxDataHob->VbtSize;
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} else {
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DEBUG ((EFI_D_ERROR, "Gfx Data Hob not found\n"));
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return EFI_NOT_FOUND;
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}
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return EFI_SUCCESS;
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}
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EFI_STATUS
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EFIAPI
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GetPeiPlatformLidStatus (
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OUT LID_STATUS *CurrentLidStatus
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)
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{
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GFX_DATA_HOB *GfxDataHob;
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GfxDataHob = (GFX_DATA_HOB *) GetFirstGuidHob (&gGraphicsDataHobGuid);
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if (GfxDataHob != NULL) {
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*CurrentLidStatus = GfxDataHob->LidStatus;
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} else {
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DEBUG ((EFI_D_ERROR, "Gfx Data Hob not found\n"));
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return EFI_NOT_FOUND;
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}
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return EFI_SUCCESS;
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}
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PEI_GRAPHICS_PLATFORM_POLICY_PPI mPeiGraphicsPlatform = {
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PEI_GRAPHICS_PLATFORM_POLICY_REVISION,
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GetPeiPlatformLidStatus,
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GetVbtData
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};
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EFI_PEI_PPI_DESCRIPTOR mPeiGfxPpiDescriptor = {
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(EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
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&gPeiGraphicsPlatformPpiGuid,
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&mPeiGraphicsPlatform
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};
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EFI_STATUS
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EFIAPI
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TcssPeiInitDoneNotify (
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IN EFI_PEI_SERVICES **PeiServices,
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IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
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IN VOID *Ppi
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)
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{
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SetFspApiReturnStatus (EFI_SUCCESS);
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Pei2LoaderSwitchStack ();
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return EFI_SUCCESS;
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}
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STATIC
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EFI_PEI_NOTIFY_DESCRIPTOR mTcssPeiInitDonePpiNotifyList = {
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(EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
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&gTcssPeiInitDonePpiGuid,
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TcssPeiInitDoneNotify
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};
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/**
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This routine is used to get Sec Platform Information Record Pointer.
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@param[in] PeiServices Pointer to the PEI services table
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@retval GetSecPlatformInformation2 - The pointer of Sec Platform Information Record Pointer.
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**/
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EFI_SEC_PLATFORM_INFORMATION_RECORD2 *
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GetSecPlatformInformationInfoInFormat2 (
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IN EFI_PEI_SERVICES **PeiServices
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)
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{
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EFI_STATUS Status;
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UINT64 InformationSize;
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EFI_SEC_PLATFORM_INFORMATION_PPI *SecPlatformInformationPpi;
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EFI_SEC_PLATFORM_INFORMATION_RECORD *SecPlatformInformation = NULL;
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EFI_SEC_PLATFORM_INFORMATION_RECORD2 *SecPlatformInformation2;
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//
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// Get BIST information from Sec Platform Information
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//
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Status = PeiServicesLocatePpi (
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&gEfiSecPlatformInformationPpiGuid, // GUID
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0, // Instance
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NULL, // EFI_PEI_PPI_DESCRIPTOR
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(VOID **) &SecPlatformInformationPpi // PPI
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);
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DEBUG ((DEBUG_INFO, "LocatePpi SecPlatformInformationPpi Status - %r\n", Status));
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if (EFI_ERROR(Status)) {
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return NULL;
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}
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InformationSize = 0;
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Status = SecPlatformInformationPpi->PlatformInformation (
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(CONST EFI_PEI_SERVICES **) PeiServices,
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&InformationSize,
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SecPlatformInformation
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);
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ASSERT (Status == EFI_BUFFER_TOO_SMALL);
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if (Status != EFI_BUFFER_TOO_SMALL) {
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return NULL;
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}
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SecPlatformInformation = AllocatePool((UINTN)InformationSize);
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ASSERT (SecPlatformInformation != NULL);
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if (SecPlatformInformation == NULL) {
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return NULL;
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}
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//
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// Retrieve BIST data from SecPlatform
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//
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Status = SecPlatformInformationPpi->PlatformInformation (
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(CONST EFI_PEI_SERVICES**) PeiServices,
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&InformationSize,
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SecPlatformInformation
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);
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DEBUG ((DEBUG_INFO, "FSP SecPlatformInformation2Ppi->PlatformInformation Status - %r\n", Status));
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ASSERT_EFI_ERROR (Status);
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if (EFI_ERROR (Status)) {
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return NULL;
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}
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SecPlatformInformation2 = AllocatePool (sizeof (EFI_SEC_PLATFORM_INFORMATION_RECORD2));
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ASSERT (SecPlatformInformation2 != NULL);
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if (SecPlatformInformation2 == NULL) {
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return NULL;
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}
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SecPlatformInformation2->NumberOfCpus = 1;
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SecPlatformInformation2->CpuInstance[0].CpuLocation = 0;
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SecPlatformInformation2->CpuInstance[0].InfoRecord.x64HealthFlags.Uint32 = SecPlatformInformation->x64HealthFlags.Uint32;
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FreePool(SecPlatformInformation);
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return SecPlatformInformation2;
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}
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#ifdef _MSC_VER
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#pragma warning (push)
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#pragma warning (disable : 4090)
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#endif
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/**
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Implementation of the FspPlatformInformation2 service in EFI_SEC_PLATFORM_INFORMATION2_PPI.
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@param PeiServices The pointer to the PEI Services Table.
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@param StructureSize The pointer to the variable describing size of the input buffer.
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@param PlatformInformationRecord2 The pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD2.
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@retval EFI_SUCCESS The data was successfully returned.
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@retval EFI_BUFFER_TOO_SMALL The buffer was too small. The current buffer size needed to
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hold the record is returned in StructureSize.
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**/
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EFI_STATUS
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EFIAPI
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FspSecPlatformInformation2 (
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IN CONST EFI_PEI_SERVICES **PeiServices,
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IN OUT UINT64 *StructureSize,
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OUT EFI_SEC_PLATFORM_INFORMATION_RECORD2 *PlatformInformationRecord2
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)
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{
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if (GetFspGlobalDataPointer()->FspMode == FSP_IN_API_MODE) {
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FSP_S_CONFIG *FspsConfigUpd;
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UINTN InformationDataSize;
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EFI_SEC_PLATFORM_INFORMATION_RECORD2 *PlatformInformationRecord2temp;
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FspsConfigUpd = &((FSPS_UPD *) GetFspSiliconInitUpdDataPointer())->FspsConfig;
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PlatformInformationRecord2temp = (EFI_SEC_PLATFORM_INFORMATION_RECORD2 *)FspsConfigUpd->CpuBistData;
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InformationDataSize = sizeof (EFI_SEC_PLATFORM_INFORMATION_RECORD2) + sizeof (EFI_SEC_PLATFORM_INFORMATION_CPU) * (PlatformInformationRecord2temp->NumberOfCpus - 1);
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if (*StructureSize < InformationDataSize) {
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*StructureSize = InformationDataSize;
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return EFI_BUFFER_TOO_SMALL;
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}
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CopyMem((EFI_SEC_PLATFORM_INFORMATION_RECORD2 *) PlatformInformationRecord2, (VOID*) FspsConfigUpd->CpuBistData, InformationDataSize);
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} else {
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UINTN InformationDataSize;
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EFI_SEC_PLATFORM_INFORMATION_RECORD2 *SecPlatformInformation2;
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SecPlatformInformation2 = NULL;
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SecPlatformInformation2 = GetSecPlatformInformationInfoInFormat2 ((EFI_PEI_SERVICES **) PeiServices);
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ASSERT (SecPlatformInformation2 != NULL);
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if (SecPlatformInformation2 != NULL) {
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InformationDataSize = sizeof (EFI_SEC_PLATFORM_INFORMATION_RECORD2) + sizeof (EFI_SEC_PLATFORM_INFORMATION_CPU) * (SecPlatformInformation2->NumberOfCpus - 1);
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if (*StructureSize < InformationDataSize) {
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*StructureSize = InformationDataSize;
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return EFI_BUFFER_TOO_SMALL;
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}
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CopyMem ((VOID *) PlatformInformationRecord2, (VOID *) SecPlatformInformation2, InformationDataSize);
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}
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}
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DEBUG_CODE_BEGIN ();
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EFI_STATUS Status;
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FSP_M_CONFIG *FspmConfigUpd;
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UINTN Index;
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UINTN BistResetPolicy;
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CPU_CONFIG_LIB_PREMEM_CONFIG *CpuConfigLibPreMemConfig;
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SI_PREMEM_POLICY_PPI *SiPreMemPolicyPpi;
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if (GetFspGlobalDataPointer()->FspMode == FSP_IN_API_MODE) {
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FspmConfigUpd = &((FSPM_UPD *) GetFspMemoryInitUpdDataPointer())->FspmConfig;
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BistResetPolicy = FspmConfigUpd->BistOnReset;
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} else {
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Status = PeiServicesLocatePpi (&gSiPreMemPolicyPpiGuid, 0, NULL, (VOID **) &SiPreMemPolicyPpi);
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ASSERT_EFI_ERROR (Status);
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Status = GetConfigBlock ((VOID *) SiPreMemPolicyPpi, &gCpuConfigLibPreMemConfigGuid, (VOID *) &CpuConfigLibPreMemConfig);
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ASSERT_EFI_ERROR (Status);
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BistResetPolicy = CpuConfigLibPreMemConfig->BistOnReset;
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}
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DEBUG ((DEBUG_INFO, "BIST On Reset Policy - %x\n", BistResetPolicy));
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DEBUG ((DEBUG_INFO, "BIST From PPI NumberOfCpus - %x\n\n", PlatformInformationRecord2->NumberOfCpus));
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for (Index = 0; Index < PlatformInformationRecord2->NumberOfCpus; Index++) {
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DEBUG ((DEBUG_INFO, "BIST From PPI IA32HealthFlags Instance(%x)- %x\n", Index, PlatformInformationRecord2->CpuInstance[Index].InfoRecord.x64HealthFlags.Uint32));
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DEBUG ((DEBUG_INFO, "BIST From PPI CpuLocation Instance(%x) - %x\n", Index, PlatformInformationRecord2->CpuInstance[Index].CpuLocation));
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}
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DEBUG_CODE_END ();
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return EFI_SUCCESS;
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}
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#ifdef _MSC_VER
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#pragma warning (pop)
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#endif
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/**
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This function gets registered as a callback
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@param[in] PeiServices An indirect pointer to the EFI_PEI_SERVICES table published by the PEI Foundation
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@param[in] NotifyDescriptor Address of the notification descriptor data structure.
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@param[in] Ppi Address of the PPI that was installed.
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@retval EFI_SUCCESS The function completed successfully
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@retval EFI_OUT_OF_RESOURCES No enough buffer to allocate
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**/
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EFI_STATUS
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FspInitOnPciEnumerationComplete (
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IN EFI_PEI_SERVICES **PeiServices,
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IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
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IN VOID *Ppi
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)
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{
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DEBUG ((DEBUG_INFO | DEBUG_INIT, "FSP S3 SMM INIT DONE ...\n"));
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PeiServicesInstallPpi (&mS3SmmInitDonePpi);
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return EFI_SUCCESS;
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}
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/**
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Update SiPolicy from UPD in FSP API mode.
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It's get called when gSiDefaultPolicyInitPpiGuid PPI is installed.
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@param[in] PeiServices An indirect pointer to the EFI_PEI_SERVICES table published by the PEI Foundation
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@param[in] NotifyDescriptor Address of the notification descriptor data structure.
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@param[in] Ppi Address of the PPI that was installed.
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@retval EFI_SUCCESS The function completed successfully
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@retval EFI_OUT_OF_RESOURCES No enough buffer to allocate
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**/
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EFI_STATUS
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FspApiModePolicyInitUpdateDone (
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IN EFI_PEI_SERVICES **PeiServices,
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IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
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IN VOID *Ppi
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)
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{
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EFI_STATUS Status;
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FSPS_UPD *FspsUpd;
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SI_POLICY_PPI *SiPolicyPpi;
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PEI_SI_DEFAULT_POLICY_INIT_PPI *PeiSiDefaultPolicyInitPpi;
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DEBUG ((DEBUG_INFO, "Updating SiPolicy according to FSPS_UPD...\n"));
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FspsUpd = GetFspSiliconInitUpdDataPointer ();
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//
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// Locate Policy init PPI to install default silicon policy
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//
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Status = PeiServicesLocatePpi (
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&gSiDefaultPolicyInitPpiGuid,
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0,
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NULL,
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(VOID **) &PeiSiDefaultPolicyInitPpi
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);
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ASSERT_EFI_ERROR (Status);
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if (PeiSiDefaultPolicyInitPpi != NULL) {
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Status = PeiSiDefaultPolicyInitPpi->PeiPolicyInit ();
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ASSERT_EFI_ERROR (Status);
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if (Status == EFI_SUCCESS) {
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Status = PeiServicesLocatePpi (
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&gSiPolicyPpiGuid,
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0,
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NULL,
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(VOID **) &SiPolicyPpi
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);
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ASSERT_EFI_ERROR (Status);
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if ((Status == EFI_SUCCESS) && (SiPolicyPpi != NULL)) {
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FspUpdatePeiPchPolicy (SiPolicyPpi, FspsUpd);
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FspUpdatePeiCpuPolicy (SiPolicyPpi, FspsUpd);
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//
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// Update Security Policy before install CpuPolicyPpi
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//
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FspUpdatePeiSecurityPolicy (SiPolicyPpi, FspsUpd);
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FspUpdatePeiMePolicy (SiPolicyPpi, FspsUpd);
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FspUpdatePeiSaPolicy (SiPolicyPpi, FspsUpd);
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#if FixedPcdGetBool(PcdAmtEnable) == 1
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if (MeTypeIsClient ()) {
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FspUpdatePeiAmtPolicy (SiPolicyPpi, FspsUpd);
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}
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#endif
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FspUpdatePeiTbtPolicy (SiPolicyPpi, FspsUpd);
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FspUpdatePeiSiPolicy (SiPolicyPpi, FspsUpd);
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}
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}
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}
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//
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// In FSP API mode, no policy update from boot loader so FSP should install
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// PolicyReady PPI to trigger silicon initialization OnPolicy callbacks.
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//
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Status = SiInstallPolicyReadyPpi ();
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ASSERT_EFI_ERROR (Status);
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return EFI_SUCCESS;
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}
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/**
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FSP Init PEI module entry point
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@param[in] FileHandle Not used.
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@param[in] PeiServices General purpose services available to every PEIM.
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@retval EFI_SUCCESS The function completes successfully
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@retval EFI_OUT_OF_RESOURCES Insufficient resources to create database
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**/
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EFI_STATUS
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EFIAPI
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FspInitEntryPoint (
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IN EFI_PEI_FILE_HANDLE FileHandle,
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IN CONST EFI_PEI_SERVICES **PeiServices
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)
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{
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EFI_STATUS Status;
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FSPS_UPD *FspsUpd;
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FSP_INFO_HEADER *FspInfoHeader;
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UINT32 MaxLogicProcessors;
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EFI_PEI_PPI_DESCRIPTOR *PpiDescriptor;
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EDKII_PEI_MP_SERVICES2_PPI *CpuMp2Ppi;
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EFI_BOOT_MODE BootMode;
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MSR_CORE_THREAD_COUNT_REGISTER MsrCoreThreadCount;
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GFX_DATA_HOB *GfxDataHob;
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//
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// Silicon code will produce Default Policy Init PPI in PrePolicy phase,
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// different owners will consume this PPI to create policy.
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// -----------------------------------------------------------------------
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// |Task |Owner for API |Owner for Dispatch|
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// -----------------------------------------------------------------------
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// |Consume Default Policy Init PPI to | FSP | Boot loader |
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// |create default policy. | | |
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// -----------------------------------------------------------------------
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// |Update policy as needed. | FSP by UPD | Boot loader |
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// -----------------------------------------------------------------------
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// |Install PolicyReady PPI to start | FSP | Boot loader |
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// |silicon OnPolicy callbacks. | | |
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// -----------------------------------------------------------------------
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//
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if (GetFspGlobalDataPointer()->FspMode == FSP_IN_API_MODE) {
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|
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FspInfoHeader = GetFspInfoHeaderFromApiContext ();
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SetFspInfoHeader (FspInfoHeader);
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MaxLogicProcessors = 1;
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|
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FspsUpd = (FSPS_UPD *) GetFspApiParameter ();
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if (FspsUpd == NULL) {
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//
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// Use the UpdRegion as default
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//
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FspsUpd = (FSPS_UPD *) (FspInfoHeader->ImageBase + FspInfoHeader->CfgRegionOffset);
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}
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SetFspUpdDataPointer(FspsUpd);
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SetFspSiliconInitUpdDataPointer (FspsUpd);
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|
|
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DEBUG_CODE_BEGIN ();
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|
UINT32 Index;
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DEBUG ((DEBUG_INFO, "Dumping FSPS_UPD - Size: 0x%8X", sizeof(FSPS_UPD)));
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|
for (Index = 0; Index < sizeof (FSPS_UPD); ++Index) {
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|
if (Index % 0x10 == 0) {
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|
DEBUG ((DEBUG_INFO, "\n0x%8X:", Index));
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|
}
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DEBUG ((DEBUG_INFO, " 0x%02X", *(((UINT8 *)FspsUpd) + Index)));
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|
}
|
|
DEBUG ((DEBUG_INFO, "\n"));
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|
DEBUG_CODE_END ();
|
|
|
|
//
|
|
// If FSP UPD SkipMpInit is enabled, PcdCpuMaxLogicalProcessorNumber is to 1. When set to 1, driver CpuMpPei doesn't start APs.
|
|
//
|
|
|
|
if (FspsUpd->FspsConfig.SkipMpInit) {
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|
PcdSet32S (PcdCpuMaxLogicalProcessorNumber, MaxLogicProcessors);
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|
} else {
|
|
///
|
|
/// Set PcdCpuMaxLogicalProcessorNumber to max number of logical processors enabled
|
|
/// Read MSR_CORE_THREAD_COUNT (0x35) to check the total active Threads
|
|
///
|
|
MsrCoreThreadCount.Uint64 = AsmReadMsr64 (MSR_CORE_THREAD_COUNT);
|
|
DEBUG ((DEBUG_INFO, "MaxLogicProcessors = %d\n", MsrCoreThreadCount.Bits.Threadcount));
|
|
PcdSet32S (PcdCpuMaxLogicalProcessorNumber, (UINT32) MsrCoreThreadCount.Bits.Threadcount);
|
|
}
|
|
|
|
GfxDataHob = (GFX_DATA_HOB *) GetFirstGuidHob (&gGraphicsDataHobGuid);
|
|
if (GfxDataHob != NULL) {
|
|
DEBUG ((DEBUG_INFO, "Update LidStatus, VbtData to Hob\n"));
|
|
GfxDataHob->LidStatus = FspsUpd->FspsConfig.LidStatus;
|
|
GfxDataHob->GraphicsConfigPtr = FspsUpd->FspsConfig.GraphicsConfigPtr;
|
|
GfxDataHob->VbtSize = FspsUpd->FspsConfig.VbtSize;
|
|
}
|
|
|
|
//
|
|
// For FSP API mode, Install PEI_GRAPHICS_PLATFORM_POLICY_PPI.
|
|
//
|
|
Status = PeiServicesInstallPpi (&mPeiGfxPpiDescriptor);
|
|
ASSERT_EFI_ERROR (Status);
|
|
|
|
//
|
|
// Install an instance of SecPlatformInformation2 with BIST data
|
|
//
|
|
if (FspsUpd->FspsConfig.CpuBistData) {
|
|
Status = PeiServicesInstallPpi (&mFspPeiSecPlatformInformation2);
|
|
ASSERT_EFI_ERROR (Status);
|
|
}
|
|
|
|
//
|
|
// Wrapper can use CpuMpPpi to transfer PPI to FSP, we use it to install MP service. (optional)
|
|
// Otherwise, CpuMpPei will be dispatched when gPeiReadyToInstallMpPpiGuid is installed.
|
|
//
|
|
if (FspsUpd->FspsConfig.CpuMpPpi) {
|
|
mCpuMp2Ppi = (VOID *) FspsUpd->FspsConfig.CpuMpPpi;
|
|
mFspGlobalData = GetFspGlobalDataPointer();
|
|
|
|
PpiDescriptor = AllocatePool (sizeof (EFI_PEI_PPI_DESCRIPTOR));
|
|
if (PpiDescriptor != NULL) {
|
|
PpiDescriptor->Flags = EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;
|
|
PpiDescriptor->Ppi = (VOID *) &mMpServices2WrapperPpi;
|
|
PpiDescriptor->Guid = &gEdkiiPeiMpServices2PpiGuid;
|
|
Status = PeiServicesInstallPpi (PpiDescriptor);
|
|
}
|
|
} else {
|
|
Status = PeiServicesInstallPpi (&mFspReadyToInstallMp);
|
|
ASSERT_EFI_ERROR (Status);
|
|
}
|
|
|
|
Status = PeiServicesGetBootMode (&BootMode);
|
|
ASSERT_EFI_ERROR (Status);
|
|
|
|
if (BootMode == BOOT_ON_S3_RESUME) {
|
|
Status = PeiServicesNotifyPpi (mOnPciEnumerationCompleteNotifyList);
|
|
ASSERT_EFI_ERROR (Status);
|
|
}
|
|
|
|
if (FspsUpd->FspsArchUpd.EnableMultiPhaseSiliconInit) {
|
|
Status = PeiServicesNotifyPpi (&mTcssPeiInitDonePpiNotifyList);
|
|
ASSERT_EFI_ERROR (Status);
|
|
}
|
|
|
|
Status = PeiServicesNotifyPpi (mOnDefaultPolicyInitNotifyList);
|
|
ASSERT_EFI_ERROR (Status);
|
|
} else {
|
|
//
|
|
// If gEdkiiPeiMpServices2PpiGuid is not installed in bootloader, install it in FSP.
|
|
//
|
|
Status = PeiServicesLocatePpi (
|
|
&gEdkiiPeiMpServices2PpiGuid,
|
|
0,
|
|
NULL,
|
|
(VOID **)&CpuMp2Ppi
|
|
);
|
|
if (EFI_ERROR (Status)) {
|
|
Status = PeiServicesInstallPpi (&mFspReadyToInstallMp);
|
|
ASSERT_EFI_ERROR (Status);
|
|
}
|
|
}
|
|
|
|
//
|
|
// Installs the Report Status Code PPI
|
|
//
|
|
InstallMonoStatusCode (FileHandle, PeiServices);
|
|
|
|
DEBUG ((DEBUG_INFO, "SI PEI Policy Initialization Done in Post-Memory\n"));
|
|
|
|
return Status;
|
|
}
|