95 lines
4.0 KiB
C
95 lines
4.0 KiB
C
/** @file
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Source file for FSP PCD Init PEI module
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2016 - 2020 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains an 'Intel Peripheral Driver' and is uniquely identified as
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"Intel Reference Module" and is licensed for Intel CPUs and chipsets under
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the terms of your license agreement with Intel or your vendor. This file may
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be modified by the user, subject to additional terms of the license agreement.
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@par Specification
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**/
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#include <Library/PeiServicesLib.h>
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#include <Library/IoLib.h>
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#include <Library/PcdLib.h>
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#include <Library/DebugLib.h>
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#define PCIEX_BAR_REG 0x80000060 // B0:D0:F0:R60
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#define PCIEX_BAR_EN_MASK 0x1
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#define PCIEX_BAR_LENGTH_MASK 0xE
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#define PCIEX_BAR_ADDR_MASK 0x7FFC000000
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/**
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FSP PCD Init PEI module entry point
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@param[in] FileHandle Not used.
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@param[in] PeiServices General purpose services available to every PEIM.
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@retval EFI_SUCCESS The function completes successfully
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@retval EFI_OUT_OF_RESOURCES Insufficient resources to create database
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**/
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EFI_STATUS
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EFIAPI
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FspPcdInitEntryPoint (
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IN EFI_PEI_FILE_HANDLE FileHandle,
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IN CONST EFI_PEI_SERVICES **PeiServices
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)
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{
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UINT64 PciExBarRegValue;
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UINT8 BarLength;
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BOOLEAN InterruptState;
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InterruptState = SaveAndDisableInterrupts ();
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IoWrite32(0xCF8, PCIEX_BAR_REG);
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PciExBarRegValue = IoRead32(0xCFC);
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SetInterruptState (InterruptState);
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if ((PciExBarRegValue & PCIEX_BAR_EN_MASK) == 1) {
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PcdSetEx64S (&gSiPkgTokenSpaceGuid, PcdSiPciExpressBaseAddress, (PciExBarRegValue & PCIEX_BAR_ADDR_MASK));
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BarLength = (UINT8) (PciExBarRegValue & PCIEX_BAR_LENGTH_MASK);
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BarLength = BarLength >> 1;
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if (BarLength == 0) {
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PcdSetEx32S (&gSiPkgTokenSpaceGuid, PcdPciExpressRegionLength, SIZE_256MB);
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} else if (BarLength == 1) {
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PcdSetEx32S (&gSiPkgTokenSpaceGuid, PcdPciExpressRegionLength, SIZE_128MB);
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} else if (BarLength == 2) {
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PcdSetEx32S (&gSiPkgTokenSpaceGuid, PcdPciExpressRegionLength, SIZE_64MB);
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} else if (BarLength == 3) {
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PcdSetEx32S (&gSiPkgTokenSpaceGuid, PcdPciExpressRegionLength, SIZE_512MB);
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} else if (BarLength == 4) {
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PcdSetEx32S (&gSiPkgTokenSpaceGuid, PcdPciExpressRegionLength, SIZE_1GB);
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} else if (BarLength == 5) {
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PcdSetEx32S (&gSiPkgTokenSpaceGuid, PcdPciExpressRegionLength, SIZE_2GB);
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}
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DEBUG ((DEBUG_INFO, "FspPcdInitEntryPoint() - Updating PcdPciExpressRegionLength to 0x%x & PcdPciExpressBaseAddress to 0x%x\n",
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PcdGet32(PcdPciExpressRegionLength), PcdGet64(PcdSiPciExpressBaseAddress)));
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} else {
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DEBUG ((DEBUG_INFO, "FspPcdInitEntryPoint() - ERROR PciExpressBaseAddress not programmed\n" ));
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ASSERT ((PciExBarRegValue & PCIEX_BAR_EN_MASK) == 1);
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}
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return EFI_SUCCESS;
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}
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