67 lines
2.7 KiB
C
67 lines
2.7 KiB
C
/** @file
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Lpc policy
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2015 - 2020 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains an 'Intel Peripheral Driver' and is uniquely identified as
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"Intel Reference Module" and is licensed for Intel CPUs and chipsets under
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the terms of your license agreement with Intel or your vendor. This file may
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be modified by the user, subject to additional terms of the license agreement.
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@par Specification Reference:
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**/
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#ifndef _LPC_CONFIG_H_
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#define _LPC_CONFIG_H_
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#define PCH_LPC_PREMEM_CONFIG_REVISION 1
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extern EFI_GUID gLpcPreMemConfigGuid;
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#pragma pack (push,1)
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/**
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This structure contains the policies which are related to LPC.
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**/
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typedef struct {
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CONFIG_BLOCK_HEADER Header; ///< Config Block Header
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/**
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Enhance the port 8xh decoding.
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Original LPC only decodes one byte of port 80h, with this enhancement LPC can decode word or dword of port 80h-83h.
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@note: this will occupy one LPC generic IO range register. While this is enabled, read from port 80h always return 0x00.
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0: Disable, <b>1: Enable</b>
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**/
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UINT32 EnhancePort8xhDecoding : 1;
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/**
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Hardware Autonomous Enable.
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When enabled, LPC will automatically engage power gating when it has reached its idle condition.
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0: Disable, <b>1: Enable</b>
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**/
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UINT32 LpcPmHAE : 1;
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UINT32 RsvdBits : 30; ///< Reserved bits
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} PCH_LPC_PREMEM_CONFIG;
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#pragma pack (pop)
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#endif // _LPC_CONFIG_H_
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