alder_lake_bios/Intel/AlderLake/ClientOneSiliconPkg/Include/ConfigBlock/Ieh/IehConfig.h

65 lines
2.3 KiB
C

/** @file
Integrated Error Handler policy.
@copyright
INTEL CONFIDENTIAL
Copyright 2018 - 2021 Intel Corporation.
The source code contained or described herein and all documents related to the
source code ("Material") are owned by Intel Corporation or its suppliers or
licensors. Title to the Material remains with Intel Corporation or its suppliers
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confidential information of Intel Corporation and its suppliers and licensors,
and is protected by worldwide copyright and trade secret laws and treaty
provisions. No part of the Material may be used, copied, reproduced, modified,
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of the Materials, either expressly, by implication, inducement, estoppel or
otherwise. Any license under such intellectual property rights must be
express and approved by Intel in writing.
Unless otherwise agreed by Intel in writing, you may not remove or alter
this notice or any other notice embedded in Materials by Intel or
Intel's suppliers or licensors in any way.
This file contains an 'Intel Peripheral Driver' and is uniquely identified as
"Intel Reference Module" and is licensed for Intel CPUs and chipsets under
the terms of your license agreement with Intel or your vendor. This file may
be modified by the user, subject to additional terms of the license agreement.
@par Specification Reference:
**/
#ifndef _IEH_CONFIG_H_
#define _IEH_CONFIG_H_
#include <ConfigBlock.h>
#define IEH_MODE_BYPASS 0
#define IEH_MODE_ENABLE 1
#define IEH_CONFIG_REVISION 1
extern EFI_GUID gIehConfigGuid;
#pragma pack (push,1)
/**
The IEH_CONFIG block describes the expected configuration of the PCH
Integrated Error Handler.
**/
typedef struct {
CONFIG_BLOCK_HEADER Header; ///< Config Block Header
/**
IEH mode <b>0: Bypass Mode</b>; 1: Enable
**/
UINT32 Mode : 1;
UINT32 RsvdBits0 : 31; ///< Reserved bits
} IEH_CONFIG;
#pragma pack (pop)
#endif // _IEH_CONFIG_H_