95 lines
3.2 KiB
C
95 lines
3.2 KiB
C
/** @file
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IPU policy definitions
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2017 - 2020 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains an 'Intel Peripheral Driver' and is uniquely identified as
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"Intel Reference Module" and is licensed for Intel CPUs and chipsets under
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the terms of your license agreement with Intel or your vendor. This file may
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be modified by the user, subject to additional terms of the license agreement.
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@par Specification Reference:
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**/
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#ifndef _IPU_CONFIG_PREMEM_H_
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#define _IPU_CONFIG_PREMEM_H_
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#pragma pack(push, 1)
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#include <ConfigBlock.h>
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#define IPU_PREMEM_CONFIG_REVISION 4
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//
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// GPIO native features pins data
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//
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#define GPIO_IMGUCLK_NUMBER_OF_PINS 6
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//
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// Maximum CSI (Camera Serial Interface) Port
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//
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#define MAX_CSI_PORT 8
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// @todo file name will be changed to IpuConfig.h.
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extern EFI_GUID gIpuPreMemConfigGuid;
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/**
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IPU PreMem configuration\n
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<b>Revision 1</b>:
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- Initial version.
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<b>Revision 2</b>:
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- Change Bit-wise to Byte-wise.
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<b>Revision 3</b>:
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- Add LaneUsed and Speed of each Port configuration for Mcd10 support.
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<b>Revision 4</b>:
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- Change GPIO_IMGUCLK_NUMBER_OF_PINS to 6
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<b>Revision 5</b>:
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- Deprecate IpuImrConfiguration.
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**/
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typedef struct {
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CONFIG_BLOCK_HEADER Header; /// Config Block Header
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/**
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<b>(Test)</b> It enables the SA IPU Device if supported and not fused off.
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If FALSE, all other policies in this config block will be ignored.
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<b>1=TRUE</b>;
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0=FALSE.
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**/
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UINT8 IpuEnable;
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/**
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Deprecate
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**/
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UINT8 IpuImrConfiguration;
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/**
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It enable the IMGU CLKOUT.
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<b>TRUE</b>
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FALSE
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**/
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UINT8 ImguClkOutEn[GPIO_IMGUCLK_NUMBER_OF_PINS];
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UINT8 LaneUsed[MAX_CSI_PORT]; ///< Indicate laneUsed of each CSI port <b>0: Not configured</b>; 1: x1; 2:x2; 3:x3; 4:x4
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UINT8 CsiSpeed[MAX_CSI_PORT]; ///< Indicate speed of each CSI port <b>0: Sensor default</b>; 1: <416Mbps; 2:<1.5Gbps; 3:<2Gbps; 4:<2.5Gbps; 5:<4Gbps; 6>4Gbps
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} IPU_PREMEM_CONFIG;
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#pragma pack(pop)
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#endif // _IPU_PREMEM_CONFIG_H_
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