311 lines
10 KiB
C
311 lines
10 KiB
C
/** @file
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Header file for PchPcrLib.
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2014 - 2021 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains an 'Intel Peripheral Driver' and is uniquely identified as
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"Intel Reference Module" and is licensed for Intel CPUs and chipsets under
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the terms of your license agreement with Intel or your vendor. This file may
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be modified by the user, subject to additional terms of the license agreement.
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@par Specification Reference:
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**/
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#ifndef _PCH_PCR_LIB_H_
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#define _PCH_PCR_LIB_H_
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#include <PchReservedResources.h>
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/**
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Definition for PCR address
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The PCR address is used to the PCR MMIO programming
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SBREG_BAR_20BITADDRESS is configured by SoC
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SBREG_BAR_20BITADDRESS=1, the format has included 16b addressing.
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+---------------------------------------------------------------------------------------------+
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| Addr[63:28] | Addr[27:24] | Addr[23:16] | Addr[15:2] | Addr[1:0] |
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+----------------+-----------------------+-----------------+----------------------------------+
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| REG_BAR[63:28] | TargetRegister[19:16] | TargetPort[7:0] | TargetRegister[15:2] |
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+---------------------------------------------------------------------------------------------+
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SBREG_BAR_20BITADDRESS=0
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+---------------------------------------------------------------------------------------------+
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| Addr[63:24] | Addr[27:24] | Addr[23:16] | Addr[15:2] | Addr[1:0] |
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+----------------+-----------------------+-----------------+----------------------------------+
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| REG_BAR[63:24] | REG_BAR[27:24] | TargetPort[7:0] | TargetRegister[15:2] |
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+---------------------------------------------------------------------------------------------+
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**/
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#define PCH_PCR_ADDRESS(Pid, Offset) (PCH_PCR_BASE_ADDRESS | (UINT32) (((Offset) & 0x0F0000) << 8) | ((UINT8)(Pid) << 16) | (UINT16) ((Offset) & 0xFFFF))
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/**
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PCH PCR boot script accessing macro
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Those macros are only available for DXE phase.
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**/
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#define PCH_PCR_BOOT_SCRIPT_WRITE(Width, Pid, Offset, Count, Buffer) \
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S3BootScriptSaveMemWrite (Width, PCH_PCR_ADDRESS (Pid, Offset), Count, Buffer); \
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#define PCH_PCR_BOOT_SCRIPT_READ_WRITE(Width, Pid, Offset, DataOr, DataAnd) \
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S3BootScriptSaveMemReadWrite (Width, PCH_PCR_ADDRESS (Pid, Offset), DataOr, DataAnd); \
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#define PCH_PCR_BOOT_SCRIPT_READ(Width, Pid, Offset, BitMask, BitValue) \
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S3BootScriptSaveMemPoll (Width, PCH_PCR_ADDRESS (Pid, Offset), BitMask, BitValue, 1, 1);
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typedef UINT8 PCH_SBI_PID;
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/**
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Read PCR register.
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It returns PCR register and size in 4bytes.
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The Offset should not exceed 0xFFFF and must be aligned with size.
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@param[in] Pid Port ID
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@param[in] Offset Register offset of this Port ID
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@retval UINT32 PCR register value.
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**/
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UINT32
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PchPcrRead32 (
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IN PCH_SBI_PID Pid,
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IN UINT32 Offset
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);
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/**
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Read PCR register.
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It returns PCR register and size in 2bytes.
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The Offset should not exceed 0xFFFF and must be aligned with size.
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@param[in] Pid Port ID
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@param[in] Offset Register offset of this Port ID
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@retval UINT16 PCR register value.
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**/
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UINT16
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PchPcrRead16 (
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IN PCH_SBI_PID Pid,
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IN UINT32 Offset
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);
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/**
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Read PCR register.
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It returns PCR register and size in 1bytes.
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The Offset should not exceed 0xFFFF and must be aligned with size.
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@param[in] Pid Port ID
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@param[in] Offset Register offset of this Port ID
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@retval UINT8 PCR register value
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**/
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UINT8
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PchPcrRead8 (
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IN PCH_SBI_PID Pid,
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IN UINT32 Offset
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);
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/**
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Write PCR register.
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It programs PCR register and size in 4bytes.
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The Offset should not exceed 0xFFFF and must be aligned with size.
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@param[in] Pid Port ID
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@param[in] Offset Register offset of Port ID.
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@param[in] Data Input Data. Must be the same size as Size parameter.
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@retval UINT32 Value written to register
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**/
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UINT32
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PchPcrWrite32 (
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IN PCH_SBI_PID Pid,
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IN UINT32 Offset,
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IN UINT32 InData
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);
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/**
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Write PCR register.
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It programs PCR register and size in 2bytes.
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The Offset should not exceed 0xFFFF and must be aligned with size.
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@param[in] Pid Port ID
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@param[in] Offset Register offset of Port ID.
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@param[in] Data Input Data. Must be the same size as Size parameter.
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@retval UINT16 Value written to register
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**/
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UINT16
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PchPcrWrite16 (
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IN PCH_SBI_PID Pid,
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IN UINT32 Offset,
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IN UINT16 InData
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);
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/**
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Write PCR register.
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It programs PCR register and size in 1bytes.
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The Offset should not exceed 0xFFFF and must be aligned with size.
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@param[in] Pid Port ID
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@param[in] Offset Register offset of Port ID.
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@param[in] Data Input Data. Must be the same size as Size parameter.
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@retval UINT8 Value written to register
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**/
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UINT8
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PchPcrWrite8 (
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IN PCH_SBI_PID Pid,
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IN UINT32 Offset,
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IN UINT8 InData
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);
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/**
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Write PCR register.
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It programs PCR register and size in 4bytes.
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The Offset should not exceed 0xFFFF and must be aligned with size.
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@param[in] Pid Port ID
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@param[in] Offset Register offset of Port ID.
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@param[in] AndData AND Data. Must be the same size as Size parameter.
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@param[in] OrData OR Data. Must be the same size as Size parameter.
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@retval UINT32 Value written to register
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**/
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UINT32
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PchPcrAndThenOr32 (
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IN PCH_SBI_PID Pid,
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IN UINT32 Offset,
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IN UINT32 AndData,
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IN UINT32 OrData
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);
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/**
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Write PCR register and read back.
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The read back ensures the PCR cycle is completed before next operation.
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It programs PCR register and size in 4bytes.
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The Offset should not exceed 0xFFFF and must be aligned with size.
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@param[in] Pid Port ID
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@param[in] Offset Register offset of Port ID.
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@param[in] AndData AND Data. Must be the same size as Size parameter.
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@param[in] OrData OR Data. Must be the same size as Size parameter.
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@retval UINT32 Value read back from the register
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**/
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UINT32
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PchPcrAndThenOr32WithReadback (
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IN PCH_SBI_PID Pid,
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IN UINT32 Offset,
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IN UINT32 AndData,
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IN UINT32 OrData
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);
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/**
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Write PCR register.
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It programs PCR register and size in 2bytes.
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The Offset should not exceed 0xFFFF and must be aligned with size.
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@param[in] Pid Port ID
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@param[in] Offset Register offset of Port ID.
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@param[in] AndData AND Data. Must be the same size as Size parameter.
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@param[in] OrData OR Data. Must be the same size as Size parameter.
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@retval UINT16 Value written to register
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**/
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UINT16
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PchPcrAndThenOr16 (
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IN PCH_SBI_PID Pid,
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IN UINT32 Offset,
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IN UINT16 AndData,
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IN UINT16 OrData
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);
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/**
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Write PCR register.
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It programs PCR register and size in 1bytes.
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The Offset should not exceed 0xFFFF and must be aligned with size.
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@param[in] Pid Port ID
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@param[in] Offset Register offset of Port ID.
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@param[in] AndData AND Data. Must be the same size as Size parameter.
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@param[in] OrData OR Data. Must be the same size as Size parameter.
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@retval UINT8 Value written to register
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**/
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UINT8
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PchPcrAndThenOr8 (
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IN PCH_SBI_PID Pid,
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IN UINT32 Offset,
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IN UINT8 AndData,
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IN UINT8 OrData
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);
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typedef enum {
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PchIpDmi = 1,
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PchIpIclk,
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} PCH_IP_PID_ENUM;
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#define PCH_INVALID_PID 0
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/**
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Get PCH IP PID number
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@param[in] IpEnum PCH IP in PCH_IP_PID_ENUM
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@retval 0 PID of this IP is not supported
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!0 PID of the IP.
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**/
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PCH_SBI_PID
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PchPcrGetPid (
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PCH_IP_PID_ENUM IpEnum
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);
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typedef enum {
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PchSelectSolDevice,
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PchSelectHeci1Device,
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PchSelectHeci2Device,
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PchSelectHeci3Device,
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PchSelectHeci4Device,
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PchSelectIderDevice,
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PchSelectMax,
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} PCH_DEVICE_SELECTION;
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/**
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Configure device interrupts
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@param[in] DeviceSel Device to be configured
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@param[in] InterruptPin Interrupt Pin to set
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@retval EFI_STATUS Operation Status
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@retval EFI_INVALID_PARAMETER Wrong DeviceSel parameter
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@retval EFI_DEVICE_ERROR Not able to write data
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*/
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EFI_STATUS
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SetInterruptPin (
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IN PCH_DEVICE_SELECTION DeviceSel,
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IN UINT8 InterruptPin
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);
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#endif // _PCH_PCR_LIB_H_
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