381 lines
7.7 KiB
C
381 lines
7.7 KiB
C
/** @file
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SPI library header for abstraction of SPI HW registers accesses
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2018 - 2021 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains an 'Intel Peripheral Driver' and is uniquely identified as
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"Intel Reference Module" and is licensed for Intel CPUs and chipsets under
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the terms of your license agreement with Intel or your vendor. This file may
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be modified by the user, subject to additional terms of the license agreement.
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@par Specification Reference:
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**/
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#ifndef _SPI_ACCESS_LIB_H_
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#define _SPI_ACCESS_LIB_H_
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/**
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Returns SPI PCI Config Space base address
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@retval UINT64 SPI Config Space base address
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**/
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UINT64
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SpiGetPciCfgAddress (
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VOID
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);
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/**
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Returns SPI BAR0 value
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@retval UINT32 PCH SPI BAR0 value
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**/
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UINT32
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SpiGetBar0 (
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VOID
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);
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/**
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Returns SPI Device number
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@retval UINT8 PCH SPI Device number
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**/
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UINT8
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SpiDeviceNumber (
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VOID
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);
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/**
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Returns SPI Function number
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@retval UINT8 PCH SPI Function number
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**/
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UINT8
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SpiFunctionNumber (
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VOID
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);
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/**
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Returns descriptor signature
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@retval UINT32 Descriptor signature
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**/
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UINT32
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SpiGetDescriptorSignature (
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VOID
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);
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/**
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Returns supported features and R/W frequencies of Flash Component
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@retval UINT32 Flash Component features descriptor
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**/
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UINT32
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SpiGetFlashComponentDescription (
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VOID
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);
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/**
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Returns number of Flash Components
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@retval UINT32 Flash components number
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**/
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UINT32
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SpiGetFlashComponentsNumber (
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VOID
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);
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/**
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Returns total Flash size with regards to number of flash components
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@retval UINT32 Total Flash Memory size
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**/
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UINT32
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SpiGetTotalFlashSize (
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VOID
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);
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/**
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Checks if PCH SPI Controler is present and available
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@retval TRUE PCH SPI controller is avaialable
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@retval FALSE PCH SPI controller is not available
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**/
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BOOLEAN
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SpiIsControllerAvailable (
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VOID
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);
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/**
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Checks BIOS lock bits for proper value and checks if write protection is enabled
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Expected vales are: LE bit set, EISS bit set and WPD bit cleared
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@retval TRUE All protection bits are set correctly
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@retval FALSE Not all protection bits had exepcted values
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**/
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BOOLEAN
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SpiIsWriteProtectionEnabled (
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VOID
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);
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/**
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Returns Flash Descriptor Override Pin Strap status
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@retval TRUE Flash Descriptor override is enabled
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@retval FALSE Flash Descriptor override is disabled
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**/
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BOOLEAN
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SpiIsFlashDescriptorOverrideEnabled (
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VOID
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);
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/**
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Returns Flash Configuration Lock Down bit status
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@retval TRUE Flash Configuration Lock Down bit is set
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@retval FALSE Flash Configuration Lock Down bit is not set
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**/
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BOOLEAN
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SpiIsFlashConfigurationLockDownEnabled (
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VOID
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);
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/**
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Returns Top Swap functionality enable state
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@retval TRUE Top Swap is enabled
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@retval FALSE Top Swap is disabled
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**/
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BOOLEAN
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SpiIsTopSwapEnabled (
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VOID
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);
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/**
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Return Component Property Parameter Table for a given component number
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@param[in] ComponentNumber SPI Component number
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@param[out] CppTable Component Poperty Parameter Table value
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@retval TRUE Vendor Specific Component Capabilities Register value was read
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@reval FALSE Vendor Specific Component Capabilities Register value was not present
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**/
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BOOLEAN
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SpiGetComponentPropertyParameterTable (
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IN UINT8 ComponentNumber,
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OUT UINT32 *CppTable
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);
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/**
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Returns valid bit status in given Component Property Parameter Table
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@param[in] CppTable Component Poperty Parameter Table value
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@retval TRUE Valid bit is set
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@reval FALSE Valid bit is not set
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**/
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BOOLEAN
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SpiIsCppValidBitSet (
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IN UINT32 CppTable
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);
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/**
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Checks if Flash Descriptor is valid
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@retval TRUE Flash Descriptor is valid
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@retval FALSE Flash Descriptor is invalid
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**/
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BOOLEAN
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SpiIsFlashDescriptorValid (
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VOID
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);
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/**
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Returns BIOS Region Flash Write Access masked value
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@retval UINT32 Already masked BIOS Regsion Flash Write access
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**/
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UINT32
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SpiGetBiosRegionFlashWriteAccess (
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VOID
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);
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/**
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Returns masked BIOS Region Flash Read Access value
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@retval UINT32 Already masked BIOS Region Flash Read access
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**/
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UINT32
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SpiGetBiosRegionFlashReadAccess (
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VOID
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);
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/**
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Returns masked BIOS Host Read Access
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@retval UINT32 Already masked BIOS Host Read Access
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**/
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UINT32
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SpiGetMasterReadAccess (
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VOID
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);
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/**
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Returns masked BIOS Host Write Access
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@retval UINT32 Already masked BIOS Host Write Access
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**/
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UINT32
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SpiGetMasterWriteAccess (
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VOID
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);
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/**
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Returns GbE Region Access rights
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@retval UINT32 GbE Region access rights
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**/
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UINT32
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SpiGetGbeRegionAccess (
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VOID
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);
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/**
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Returns CSME region access rights
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@retval UINT32 CSME Region Access rights
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**/
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UINT32
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SpiGetCsmeRegionAccess (
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VOID
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);
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/**
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Returns EC region access right
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@retval UINT32 EC Region access rights
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**/
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UINT32
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SpiGetEcRegionAccess (
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VOID
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);
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/**
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Checks if Device Attached Flash (DAF) mode is active
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@retval TRUE SAF mode is active
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@retval FALSE SAF mode is not active
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**/
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BOOLEAN
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SpiIsSafModeActive (
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VOID
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);
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/**
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Checks validity of GbE region
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@retval TRUE GbE region is valid
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@retval FALSE GbE regios in invalid
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**/
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BOOLEAN
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SpiIsGbeRegionValid (
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VOID
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);
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/**
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Returns status of BIOS Interface Lockdown
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@retval TRUE BIOS Interface Lockdown is enabled
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@retval FALSE BIOS Interface Lockdown is disabled
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**/
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BOOLEAN
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SpiIsBiosInterfaceLockdownEnabled (
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VOID
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);
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/**
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Returns TRUE if BIOS Boot Strap is set to SPI
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@retval TRUE BIOS Boot strap is set to SPI
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@retval FALSE BIOS Boot strap is set to LPC/eSPI
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**/
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BOOLEAN
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SpiIsBiosBootFromSpi (
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VOID
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);
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/**
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Check SPI write status disable is set
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@retval TRUE Write status disable is set
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@retval FALSE Write status disable is not set
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**/
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BOOLEAN
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SpiIsWriteStatusDisable (
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VOID
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);
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/**
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Checks if Extended BIOS Region enable status
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@retval TRUE Extended BIOS Region access is enabled
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@retval FALSE Extended BIOS Region access is disabled
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**/
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BOOLEAN
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SpiIsExtendedBiosRegionEnabled (
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VOID
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);
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/**
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Gets the extended BIOS region base and limit addresses
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@param[out] UINT64 Extended BIOS Region Range Base address
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@param[out] UINT64 Extended BIOS Region Range Limit address
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**/
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VOID
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SpiGetExtendedBiosRegionRange (
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UINT64 *RangeBase,
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UINT64 *RangeLimit
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);
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/**
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Checks lock of exnteded BIOS Region base address
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@retval TRUE Extended BIOS Region base address is locked
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@retval FALSE Extended BIOS Region base address is unlocked
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**/
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BOOLEAN
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SpiIsExtendedBiosRegionBaseLocked (
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VOID
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);
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/**
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Clears BC_SYNC_SS.
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**/
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VOID
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SpiClearBcSyncSs(
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VOID
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);
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#endif // _SPI_ACCESS_LIB_H_
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