832 lines
21 KiB
Plaintext
832 lines
21 KiB
Plaintext
/**@file
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GPIO Common library
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2013 - 2021 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains an 'Intel Peripheral Driver' and is uniquely identified as
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"Intel Reference Module" and is licensed for Intel CPUs and chipsets under
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the terms of your license agreement with Intel or your vendor. This file may
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be modified by the user, subject to additional terms of the license agreement.
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@par Specification Reference:
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**/
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//
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// GPIO Access Library
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//
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Scope(\_SB)
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{
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//
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// Get GPIO register address
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// This is internal library function
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//
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Method(GADR, 0x2, NotSerialized)
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{
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//
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// Arg0 - GPIO Group index
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// Arg1 - GPIO register type, must match what is used by GINF method
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//
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//Local0 = GpioCommunityAddress
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Store( Add(GINF(Arg0,GPIO_COM_FIELD), SBRG), Local0)
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//Local1 = Register Offset
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Store(GINF(Arg0,Arg1), Local1)
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Return( Add (Local0, Local1))
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}
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//
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// Get GPIO absolute number for selected GpioPad
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//
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Method(GNUM, 0x1, NotSerialized)
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{
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//
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// Arg0 - GpioPad
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//
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// Local0 - Gpio pad number
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Store (GNMB(Arg0), Local0)
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// Local1 - Gpio group index for GpioPad
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Store (GGRP(Arg0), Local1)
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Return (Add(GINF(Local1,GPIO_DRIVER_PIN_BASE_NUMBER),Local0))
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}
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//
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// Get interrupt number for selected GpioPad
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//
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Method(INUM, 0x1, NotSerialized)
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{
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//
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// Arg0 - GpioPad
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//
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return (And(GPC1(Arg0),B_GPIO_PCR_INTSEL))
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}
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//
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// Get GPIO group index for GpioPad
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//
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Method(GGRP,1,serialized) {
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//
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// Arg0 - GpioPad
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//
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ShiftRight( And(Arg0,0x00FF0000), 16, Local0)
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return (Local0)
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}
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//
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// Get GPIO pin number for GpioPad
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//
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Method(GNMB,1,serialized) {
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//
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// Arg0 - GpioPad
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//
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return (And(Arg0,0x0000FFFF))
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}
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//
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// GEI0/1/2 and GED0/1/2 (part of PCH NVS) are objects for informing how GPIO groups are mapped to GPE0.
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// If Group is mapped to 1-Tier GPE information is also stored on what Group DW
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// is mapped to GPE_DWx. Because GPE_DWx register is 32 bits large if groups have more than
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// 32 pads only part of it can be mapped.
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//
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// GEIx - GroupIndex mapped to GPE0_DWx
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// GEDx - DoubleWorld part of Group: 0 - pins 31-0, 1 - pins 63-32, ...
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//
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//
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// Get GPE number for selected GpioPad
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//
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Method(GGPE, 0x1, NotSerialized)
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{
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//
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// Arg0 - GPIO pad
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//
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//Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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//Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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//Local2 - GPIO group DW
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Store(ShiftRight (Local1,5), Local2)
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If (IS_GPIO_GROUP_IN_2_TIER_GPE(Local0, Local2)) {
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//
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// Pads mapped to 2-tier GPE will all generate GPE_111
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//
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Return (0x6F)
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} Else {
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//
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// Get mapping for certain group, Local3 = GPE0_DWx
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//
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If (IS_GPIO_GROUP_MAPPED_TO_GPE_DWX(Local0, Local2, GEI0, GED0)) {
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Store(0, Local3)
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} ElseIf (IS_GPIO_GROUP_MAPPED_TO_GPE_DWX(Local0, Local2, GEI1, GED1)) {
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Store(1, Local3)
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} ElseIf (IS_GPIO_GROUP_MAPPED_TO_GPE_DWX(Local0, Local2, GEI2, GED2)) {
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Store(2, Local3)
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} Else {
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// Code should never get here
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BreakPoint
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Return (0)
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}
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//
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// For 1-tier GPE calculate GPE number
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// GPE number = Local1 + 32 * (Local3 - Local2)
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//
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Return (Add(Multiply(Subtract (Local3, Local2),32),Local1))
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}
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}
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//
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// Get Pad Configuration DW0 register value
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//
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Method(GPC0, 0x1, Serialized)
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{
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//
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// Arg0 - GPIO pad
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * S_GPIO_PCR_PADCFG)
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Store(GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),Local2)
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OperationRegion(PDW0, SystemMemory, Local2, 4)
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Field(PDW0, AnyAcc, NoLock, Preserve) {
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Offset(0x0),
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TEMP,32
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}
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Return(TEMP)
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}
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//
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// Set Pad Configuration DW0 register value
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//
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Method(SPC0, 0x2, Serialized)
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{
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//
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// Arg0 - GPIO pad
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// Arg1 - Value for DW0 register
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * S_GPIO_PCR_PADCFG)
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Store( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),Local2)
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OperationRegion(PDW0, SystemMemory, Local2, 4)
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Field(PDW0, AnyAcc, NoLock, Preserve) {
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Offset(0x0),
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TEMP,32
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}
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Store(Arg1,TEMP)
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}
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//
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// Get Pad Configuration DW1 register value
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//
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Method(GPC1, 0x1, Serialized)
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{
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//
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// Arg0 - GPIO pad
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * S_GPIO_PCR_PADCFG) + 0x4
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Store( Add( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),0x4),Local2)
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OperationRegion(PDW1, SystemMemory, Local2, 4)
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Field(PDW1, AnyAcc, NoLock, Preserve) {
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Offset(0x0),
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TEMP,32
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}
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Return(TEMP)
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}
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//
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// Set Pad Configuration DW1 register value
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//
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Method(SPC1, 0x2, Serialized)
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{
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//
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// Arg0 - GPIO pad
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// Arg1 - Value for DW1 register
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local0 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * S_GPIO_PCR_PADCFG) + 0x4
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Store( Add( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),0x4),Local2)
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OperationRegion(PDW1, SystemMemory, Local2, 4)
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Field(PDW1, AnyAcc, NoLock, Preserve) {
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Offset(0x0),
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TEMP,32
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}
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Store(Arg1,TEMP)
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}
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//
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// Set RX Override
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//
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Method(SRXO, 0x2, Serialized)
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{
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//
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// Arg0 - GPIO pad
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// Arg1 - 0=no override, 1=drive RX to 1 internally
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * S_GPIO_PCR_PADCFG)
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Store( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),Local2)
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OperationRegion(PDW0, SystemMemory, Local2, 4)
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Field(PDW0, AnyAcc, NoLock, Preserve) {
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Offset(0x0),
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,28,
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TEMP,1,
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,3
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}
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Store(Arg1,TEMP)
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}
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//
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// Get GPI Input Value
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//
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Method(GGIV, 0x1, Serialized)
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{
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//
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// Arg0 - GPIO pad
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * S_GPIO_PCR_PADCFG)
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Store( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),Local2)
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OperationRegion(PDW0, SystemMemory, Local2, 4)
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Field(PDW0, AnyAcc, NoLock, Preserve) {
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Offset(0x0),
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, 1,
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TEMP,1,
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, 30
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}
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Return(TEMP)
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}
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//
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// Get GPO Output Value
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//
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Method(GGOV, 0x1, Serialized)
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{
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//
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// Arg0 - GPIO pad
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * S_GPIO_PCR_PADCFG)
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Store( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),Local2)
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OperationRegion(PDW0, SystemMemory, Local2, 4)
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Field(PDW0, AnyAcc, NoLock, Preserve) {
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Offset(0x0),
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TEMP,1,
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, 31
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}
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Return(TEMP)
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}
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//
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// Set GPO Output Value
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//
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Method(SGOV, 0x2, Serialized)
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{
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//
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// Arg0 - GPIO pad
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// Arg1 - Value of GPIO Tx State
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * S_GPIO_PCR_PADCFG)
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Store( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),Local2)
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OperationRegion(PDW0, SystemMemory, Local2, 4)
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Field(PDW0, AnyAcc, NoLock, Preserve) {
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Offset(0x0),
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TEMP,1,
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, 31
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}
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Store(Arg1,TEMP)
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}
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//
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// Get GPI Input Invert Bit
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//
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Method(GGII, 0x1, Serialized)
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{
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//
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// Arg0 - GPIO pad
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * S_GPIO_PCR_PADCFG)
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Store( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),Local2)
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OperationRegion(PDW0, SystemMemory, Local2, 4)
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Field(PDW0, AnyAcc, NoLock, Preserve) {
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Offset(0x0),
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, 23,
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TEMP,1,
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, 8
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}
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Return(TEMP)
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}
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//
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// Set GPI Input Invert Bit
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//
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Method(SGII, 0x2, Serialized)
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{
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//
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// Arg0 - GPIO pad
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// Arg1 - Value of RXINV bit for selected pad
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * S_GPIO_PCR_PADCFG)
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Store( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),Local2)
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OperationRegion(PDW0, SystemMemory, Local2, 4)
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Field(PDW0, AnyAcc, NoLock, Preserve) {
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Offset(0x0),
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, 23,
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TEMP,1,
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, 8
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}
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Store(Arg1,TEMP)
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}
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//
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// Get GPIO Pad Mode
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//
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Method(GPMV, 0x1, Serialized)
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{
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//
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// Arg0 - GPIO pad
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * S_GPIO_PCR_PADCFG)
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Store( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),Local2)
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OperationRegion(PDW0, SystemMemory, Local2, 4)
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Field(PDW0, AnyAcc, NoLock, Preserve) {
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Offset(0x0),
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, 10,
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TEMP,3,
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, 19
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}
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Return(TEMP)
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}
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//
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// Set GPIO Pad Mode
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//
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Method(SPMV, 0x2, Serialized)
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{
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//
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// Arg0 - GPIO pad
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// Arg1 - Value for Pad Mode for selected pad
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * S_GPIO_PCR_PADCFG)
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Store( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),Local2)
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OperationRegion(PDW0, SystemMemory, Local2, 4)
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Field(PDW0, AnyAcc, NoLock, Preserve) {
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Offset(0x0),
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, 10,
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TEMP,3,
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, 19
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}
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Store(Arg1,TEMP)
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}
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//
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// Get GPIO Host Software Pad Ownership
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//
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Method(GHPO, 0x1, Serialized)
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{
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//
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// Arg0 - GPIO pad
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local3 - Register offset = HostSwOwnRegOffset + (GpioPadNumber >> 5)*0x4
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Add (GET_HOSTSW_OWN_REG_ADDRESS(Local0), Multiply (ShiftRight(Local1,5), 0x4), Local3)
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// Local4 - Pad bit position within register, Local4 = GpioPad & 0x1F = GpioPad % 32
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And (Local1, 0x1F, Local4)
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OperationRegion(PREG, SystemMemory, Local3, 4)
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Field(PREG, AnyAcc, NoLock, Preserve) {
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Offset(0x0),
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TEMP,32
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}
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// HostSwOwnValue = (TEMP >> Local4) & 0x1
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Return( And( ShiftRight(TEMP,Local4),0x1))
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}
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//
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// Set GPIO Host Software Pad Ownership
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//
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Method(SHPO, 0x2, Serialized)
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{
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//
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// Arg0 - GPIO pad
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// Arg1 - Value for GPIO Host Software Pad Ownership
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local3 - Register offset = HostSwOwnRegOffset + (GpioPadNumber >> 5)*0x4
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Add (GET_HOSTSW_OWN_REG_ADDRESS(Local0), Multiply (ShiftRight(Local1,5), 0x4), Local3)
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// Local4 - Pad bit position within register, Local4 = GpioPad & 0x1F = GpioPad % 32
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And (Local1, 0x1F, Local4)
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OperationRegion(PREG, SystemMemory, Local3, 4)
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Field(PREG, AnyAcc, NoLock, Preserve) {
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Offset(0x0),
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TEMP,32
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}
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If (Arg1) {
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//TEMP = TEMP | (1 << PadBitPosition)
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Or(TEMP, ShiftLeft(1,Local4), TEMP)
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} Else {
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//TEMP = TEMP & ~(1 << PadBitPosition)
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And(TEMP, Not(ShiftLeft(1,Local4)),TEMP)
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}
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}
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//
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// Get GPIO Pad Ownership
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//
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Method(GGPO, 0x1, Serialized)
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{
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//
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// Arg0 - GPIO pad
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//
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// Local0 - GPIO group index
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Store (GGRP(Arg0), Local0)
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// Local1 - GPIO pad number
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Store (GNMB(Arg0), Local1)
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// Local2 = PadOwnAddress + (PadNumber >> 3) * 0x4
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|
Store( Add( GET_PAD_OWN_REG_ADDRESS(Local0) , Multiply( ShiftRight(Local1,3),0x4)),Local2)
|
|
OperationRegion(PREG, SystemMemory, Local2, 4)
|
|
Field(PREG, AnyAcc, NoLock, Preserve) {
|
|
Offset(0x0),
|
|
TEMP,32
|
|
}
|
|
// PadOwnValue = (TEMP >> ((Local1 & 0x7) * 4)) & 0x3
|
|
Return( And( ShiftRight(TEMP,Multiply(And(Local1,0x7),0x4)),0x3))
|
|
}
|
|
|
|
//
|
|
// Set GPIO GPIRoutIOxAPIC value
|
|
//
|
|
Method(SGRA, 0x2, Serialized)
|
|
{
|
|
//
|
|
// Arg0 - GPIO pad
|
|
// Arg1 - Value for GPIRoutIOxAPIC
|
|
//
|
|
// Local0 - GPIO group index
|
|
Store (GGRP(Arg0), Local0)
|
|
// Local1 - GPIO pad number
|
|
Store (GNMB(Arg0), Local1)
|
|
|
|
// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * S_GPIO_PCR_PADCFG)
|
|
Store( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),Local2)
|
|
OperationRegion(PDW0, SystemMemory, Local2, 4)
|
|
Field(PDW0, AnyAcc, NoLock, Preserve) {
|
|
Offset(0x0),
|
|
, 20,
|
|
TEMP,1,
|
|
, 11
|
|
}
|
|
Store(Arg1,TEMP)
|
|
}
|
|
|
|
//
|
|
// Set GPIO weak pull-up/down value
|
|
//
|
|
Method(SGWP, 0x2, Serialized)
|
|
{
|
|
//
|
|
// Arg0 - GPIO pad
|
|
// Arg1 - Value for weak pull-up/down
|
|
//
|
|
// Local0 - GPIO group index
|
|
Store (GGRP(Arg0), Local0)
|
|
// Local1 - GPIO pad number
|
|
Store (GNMB(Arg0), Local1)
|
|
|
|
// Local2 = (GpioCommunityAddress + PadCfgOffset) + 0x4 + (GPIn * S_GPIO_PCR_PADCFG)
|
|
Store( Add( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),0x4),Local2)
|
|
OperationRegion(PDW0, SystemMemory, Local2, 4)
|
|
Field(PDW0, AnyAcc, NoLock, Preserve) {
|
|
Offset(0x0),
|
|
, 10,
|
|
TEMP,4,
|
|
, 18
|
|
}
|
|
Store(Arg1,TEMP)
|
|
}
|
|
|
|
//
|
|
// ISME and CAGS methods are used to properly handle 2-tier GPE
|
|
// Example:
|
|
/*
|
|
Method(_L6F, 0) // Method which is called for all 2-tier GPE, must be within _GPE scope
|
|
{
|
|
If (\_SB.ISME(GpioPad))
|
|
{
|
|
\_SB.DeviceXYZ.GPEH() // Custom function to handle GPE for certain GPIO pad
|
|
\_SB.CAGS(GpioPad) // Clear 2-Tier GPE status
|
|
}
|
|
}
|
|
*/
|
|
|
|
//
|
|
// Clear a particular GPE status for 2-tier
|
|
//
|
|
Method(CAGS, 0x1, Serialized) {
|
|
//
|
|
// Arg0 - GPIO pad
|
|
//
|
|
// Local0 - GPIO group index
|
|
Store (GGRP(Arg0), Local0)
|
|
// Local1 - GPIO pad number
|
|
Store (GNMB(Arg0), Local1)
|
|
//Local4 - GPIO group DW
|
|
Store(ShiftRight (Local1,5), Local4)
|
|
|
|
//Check if 2-tier
|
|
If (IS_GPIO_GROUP_IN_2_TIER_GPE(Local0, Local4)) {
|
|
//Get GPI_GPE_STS for GPP_x
|
|
Store (GET_GPE_STS_REG_ADDRESS(Local0), Local3)
|
|
If (LNotEqual(And(Local3,NO_REGISTER_FOR_PROPERTY), NO_REGISTER_FOR_PROPERTY)) {
|
|
OperationRegion(GPPX, SystemMemory, Add(Local3,Multiply(Local4,4)), 4)
|
|
Field(GPPX, AnyAcc, NoLock, Preserve) {
|
|
Offset(0x0),
|
|
STSX,32,
|
|
}
|
|
// Local2 - GpioPad bit mask within register
|
|
ShiftLeft(1, Mod(Local1,32), Local2)
|
|
// Clear GPIO status by writing 1b for a pad
|
|
Store(Local2, STSX)
|
|
}
|
|
}
|
|
}
|
|
|
|
//
|
|
// Check if GPIO pad was source of 2-Tier GPE event
|
|
//
|
|
Method(ISME, 0x1, Serialized) {
|
|
//
|
|
// Arg0 - GPIO pad
|
|
//
|
|
|
|
// Local0 - GPIO group index
|
|
Store (GGRP(Arg0), Local0)
|
|
// Local1 - GPIO pad number
|
|
Store (GNMB(Arg0), Local1)
|
|
//Local4 - GPIO group DW
|
|
Store(ShiftRight (Local1,5), Local4)
|
|
|
|
If (LNot(IS_GPIO_GROUP_IN_2_TIER_GPE(Local0,Local4))) {
|
|
Return(0)
|
|
}
|
|
|
|
If (LEqual(And(GET_GPE_STS_REG_ADDRESS(Local0),NO_REGISTER_FOR_PROPERTY), NO_REGISTER_FOR_PROPERTY)) {
|
|
Return(0)
|
|
}
|
|
|
|
// Local2 - Register offset = GpeStsRegOffset + GpioGroupDw*0x4
|
|
Add (GET_GPE_STS_REG_ADDRESS(Local0), Multiply (Local4, 0x4), Local2)
|
|
// Local3 - Pad bit position within register, Local3 = GpioPadNumber & 0x1F = GpioPadNumber % 32
|
|
And (Local1, 0x1F, Local3)
|
|
|
|
OperationRegion(GPPX, SystemMemory, Local2, 0x24)
|
|
Field(GPPX, AnyAcc, NoLock, Preserve) {
|
|
Offset(0x0),
|
|
STSX,32,
|
|
Offset(0x20),
|
|
GENX,32
|
|
}
|
|
|
|
//Return result of GPI_GPE_EN&GPI_GPE_STS for this pad
|
|
Return(And(ShiftRight(And(STSX,GENX),Local3),0x1))
|
|
}
|
|
|
|
//
|
|
// Do Interrupt Pin Isolation
|
|
// This method should be called before power gating external device
|
|
// which uses Gpio pad as an interrupt
|
|
//
|
|
Method(DIPI, 0x1, Serialized) {
|
|
//
|
|
// Arg0 - GPIO pad
|
|
//
|
|
// Local0 - GPIO group index
|
|
Store (GGRP(Arg0), Local0)
|
|
// Local1 - GPIO pad number
|
|
Store (GNMB(Arg0), Local1)
|
|
|
|
// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * S_GPIO_PCR_PADCFG)
|
|
Store( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),Local2)
|
|
OperationRegion(PDW0, SystemMemory, Local2, 4)
|
|
Field(PDW0, AnyAcc, NoLock, Preserve) {
|
|
Offset(0x0),
|
|
, 9,
|
|
RDIS,1,
|
|
, 15,
|
|
RCFG,2,
|
|
, 5
|
|
}
|
|
If(LNotEqual(RCFG,2)) {
|
|
// Save RxEvCfg state in RXEV object:
|
|
// RXEV[GroupIndex][PadNumber] = RCFG
|
|
Store(RCFG, Index( DeRefOf(Index(RXEV,Local0)), Local1))
|
|
// Set RxEvCfg to 2
|
|
Store(2,RCFG)
|
|
// Set GPIORxDis to 1
|
|
Store(1,RDIS)
|
|
}
|
|
}
|
|
|
|
//
|
|
// Undo Interrupt Pin Isolation
|
|
// This method should be called after un-power gating external device
|
|
// which uses Gpio pad as an interrupt
|
|
//
|
|
Method(UIPI, 0x1, Serialized) {
|
|
//
|
|
// Arg0 - GPIO pad
|
|
//
|
|
// Local0 - GPIO group index
|
|
Store (GGRP(Arg0), Local0)
|
|
// Local1 - GPIO pad number
|
|
Store (GNMB(Arg0), Local1)
|
|
|
|
// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * S_GPIO_PCR_PADCFG)
|
|
Store( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),Local2)
|
|
OperationRegion(PDW0, SystemMemory, Local2, 4)
|
|
Field(PDW0, AnyAcc, NoLock, Preserve) {
|
|
Offset(0x0),
|
|
, 9,
|
|
RDIS,1,
|
|
, 15,
|
|
RCFG,2,
|
|
, 5
|
|
}
|
|
// Get RxEvCfg original value from RXEV object
|
|
// Local3 = RXEV[GroupIndex][PadNumber]
|
|
Store( DeRefOf(Index( DeRefOf(Index (RXEV, Local0)), Local1)), Local3)
|
|
|
|
If(LNotEqual(Local3,2)) {
|
|
// Set GPIORxDis to 0
|
|
Store(0,RDIS)
|
|
// Set RxEvCfg to original value
|
|
Store(Local3,RCFG)
|
|
}
|
|
}
|
|
|
|
//
|
|
// RX Level/Edge Configuration
|
|
//
|
|
Method(GRXE, 0x2, Serialized) {
|
|
//
|
|
// Arg0 - GPIO pad
|
|
// Arg1 - RxEvCfg Value
|
|
// 0h = Level
|
|
// 1h = Edge
|
|
// 2h = Disable
|
|
// 3h = Either rising edge or failing edge
|
|
//
|
|
// Local0 - GPIO group index
|
|
Store (GGRP(Arg0), Local0)
|
|
// Local1 - GPIO pad number
|
|
Store (GNMB(Arg0), Local1)
|
|
|
|
// Local2 = (GpioCommunityAddress + PadCfgOffset) + (GPIn * S_GPIO_PCR_PADCFG)
|
|
Store( GET_GPIO_PAD_PADCFG_REG_ADDRESS(Local0,Local1),Local2)
|
|
OperationRegion(PDW0, SystemMemory, Local2, 4)
|
|
Field(PDW0, AnyAcc, NoLock, Preserve) {
|
|
Offset(0x0),
|
|
, 25,
|
|
RCFG,2,
|
|
, 5
|
|
}
|
|
// Set RxEvCfg
|
|
Store(Arg1, RCFG)
|
|
}
|
|
|
|
//
|
|
// Get Gpio Lock Config register value
|
|
//
|
|
Method(GLOC, 0x2, Serialized)
|
|
{
|
|
//
|
|
// Arg0 - GPIO pad
|
|
//
|
|
// Local0 - GPIO group index
|
|
Store (GGRP(Arg0), Local0)
|
|
// Local1 - GPIO pad number
|
|
Store (GNMB(Arg0), Local1)
|
|
|
|
// Local1 = (GpioCommunityAddress + PadLockCfgOffset)
|
|
Store(GET_LOCK_CONFIG_REG_ADDRESS(Local0), Local2)
|
|
OperationRegion(PREG, SystemMemory, Local2, 4)
|
|
Field(PREG, AnyAcc, NoLock, Preserve) {
|
|
Offset(0x0),
|
|
TEMP,32
|
|
}
|
|
// Gpio Lock Configuration = (TEMP >> Local1) & 0x1
|
|
Return( And( ShiftRight(TEMP,Local1),0x1))
|
|
}
|
|
|
|
//
|
|
// Get Gpio Lock Tx register value
|
|
//
|
|
Method(GLOT, 0x2, Serialized)
|
|
{
|
|
//
|
|
// Arg0 - GPIO pad
|
|
//
|
|
// Local0 - GPIO group index
|
|
Store (GGRP(Arg0), Local0)
|
|
// Local1 - GPIO pad number
|
|
Store (GNMB(Arg0), Local1)
|
|
|
|
// Local1 = (GpioCommunityAddress + PadLockCfgOffset)
|
|
Store(GET_LOCK_TX_REG_ADDRESS(Local0), Local2)
|
|
OperationRegion(PREG, SystemMemory, Local2, 4)
|
|
Field(PREG, AnyAcc, NoLock, Preserve) {
|
|
Offset(0x0),
|
|
TEMP,32
|
|
}
|
|
// Gpio Lock Configuration = (TEMP >> Local1) & 0x1
|
|
Return( And( ShiftRight(TEMP,Local1),0x1))
|
|
}
|
|
|
|
} |