132 lines
4.7 KiB
Plaintext
132 lines
4.7 KiB
Plaintext
/**@file
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Intel ACPI Reference Code for PCR
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2018 - 2021 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains an 'Intel Peripheral Driver' and is uniquely identified as
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"Intel Reference Module" and is licensed for Intel CPUs and chipsets under
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the terms of your license agreement with Intel or your vendor. This file may
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be modified by the user, subject to additional terms of the license agreement.
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@par Specification Reference:
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**/
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//
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// PCR Register Access Methods
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// Include this file into a device scope which implements private configuration register access.
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// Required variables:
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// SBRG - holds the value of the sideband MMIO base addres.
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//
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// SBREG_BAR_20BITADDRESS is configured by SoC
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//
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// SBREG_BAR_20BITADDRESS=1, the format has included 16b addressing.
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// +---------------------------------------------------------------------------------------------+
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// | Addr[63:28] | Addr[27:24] | Addr[23:16] | Addr[15:2] | Addr[1:0] |
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// +----------------+-----------------------+-----------------+----------------------------------+
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// | REG_BAR[63:28] | TargetRegister[19:16] | TargetPort[7:0] | TargetRegister[15:2] |
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// +---------------------------------------------------------------------------------------------+
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//
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// SBREG_BAR_20BITADDRESS=0
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// +---------------------------------------------------------------------------------------------+
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// | Addr[63:24] | Addr[27:24] | Addr[23:16] | Addr[15:2] | Addr[1:0] |
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// +----------------+-----------------------+-----------------+----------------------------------+
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// | REG_BAR[63:24] | REG_BAR[27:24] | TargetPort[7:0] | TargetRegister[15:2] |
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// +---------------------------------------------------------------------------------------------+
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//
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//
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// PCR Dword Read
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// arg0: PID
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// arg1: Offset
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//
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Method (PCRR, 2, Serialized) {
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And (arg1, 0xffff, Local1)
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ShiftLeft (And (arg1, 0x0f0000), 8, Local2)
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Add (ShiftLeft (arg0, 16), Local1, Local0)
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Add (Add (Local2, Local0), SBRG, Local0)
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OperationRegion (PCR0, SystemMemory, Local0, 0x4)
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Field(PCR0,DWordAcc,Lock,Preserve) {
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Offset(0x00),
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DAT0, 32
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} // End Field PCR0
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Return (DAT0)
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} // End Method PCRR
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//
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// PCR Dword Write
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// arg0: PID
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// arg1: Offset
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// arg2: write data
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//
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Method (PCRW, 3, Serialized) {
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And (arg1, 0xffff, Local1)
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ShiftLeft (And (arg1, 0x0f0000), 8, Local2)
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Add (ShiftLeft (arg0, 16), Local1, Local0)
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Add (Add (Local2, Local0), SBRG, Local0)
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OperationRegion (PCR0, SystemMemory, Local0, 0x4)
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Field(PCR0,DWordAcc,Lock,Preserve) {
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Offset(0x00),
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DAT0, 32
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} // End Field PCR0
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Store (arg2, DAT0)
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} // End Method PCRW
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//
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// PCR Dword Or
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// arg0: PID
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// arg1: Offset
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// arg2: Or data
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//
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Method (PCRO, 3, Serialized) {
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Store(PCRR(arg0,arg1),Local0) // Store PCR Read data in Local0
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Store(Or(Local0,arg2),Local1) // Or data
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PCRW(arg0,arg1,Local1) // Write data back
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}
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//
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// PCR Dword And
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// arg0: PID
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// arg1: Offset
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// arg2: And data
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//
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Method (PCRA, 3, Serialized) {
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Store(PCRR(arg0,arg1),Local0) // Store PCR Read data in Local0
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Store(And(Local0,arg2),Local1) // And data
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PCRW(arg0,arg1,Local1) // Write data back
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}
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//
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// PCR Dword AndThenOr
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// arg0: PID
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// arg1: Offset
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// arg2: And data
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// arg3: Or data
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//
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Method (PCAO, 4, Serialized) {
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Store(PCRR(arg0,arg1),Local0) // Store PCR Read data in Local0
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Store(Or(And(Local0,arg2),arg3),Local1) // AndThenOr
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PCRW(arg0,arg1,Local1) // Write data back
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}
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