65 lines
2.7 KiB
Plaintext
65 lines
2.7 KiB
Plaintext
/**@file
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Serial IO SPI Common ACPI
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2020 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains an 'Intel Peripheral Driver' and is uniquely identified as
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"Intel Reference Module" and is licensed for Intel CPUs and chipsets under
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the terms of your license agreement with Intel or your vendor. This file may
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be modified by the user, subject to additional terms of the license agreement.
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@par Specification Reference:
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**/
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#define SERIAL_IO_SPI_DISABLED 0
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#define SERIAL_IO_SPI_PCI 1
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#define SERIAL_IO_SPI_HIDDEN 2
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//
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// SPI Hidden Resource allocation
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// Returns resource buffer with memory ranges used but not explicitely claimed by the device
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//
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// @param[in] Arg0 Pci Config Base
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//
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// @retval Resource buffer with memory ranges
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//
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Method (SPIH, 1, Serialized) {
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OperationRegion (ICB1, SystemMemory, Arg0, Add(R_SERIAL_IO_CFG_BAR0_LOW, 16))
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Field (ICB1, AnyAcc, NoLock, Preserve) {
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Offset(R_SERIAL_IO_CFG_BAR0_LOW),
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BAR0, 64,
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BAR1, 64
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}
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Name (BUF0, ResourceTemplate () { Memory32Fixed (ReadWrite, 0, 0x1000, BFR0) })
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Name (BUF1, ResourceTemplate () { Memory32Fixed (ReadWrite, 0, 0x1000, BFR1) })
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CreateDWordField (BUF0, BFR0._BAS, ADR0)
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CreateDWordField (BUF1, BFR1._BAS, ADR1)
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Store (And (BAR0, 0xFFFFFFFFFFFFF000), ADR0) // BAR0
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Store (And (BAR1, 0xFFFFFFFFFFFFF000), ADR1) // BAR1 - PCI CFG SPACE
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ConcatenateResTemplate (BUF0, BUF1, Local0)
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Return (Local0)
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} // End SPIH
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