alder_lake_bios/Intel/AlderLake/ClientOneSiliconPkg/IpBlock/Tbt/IncludePrivate/ITbtNvsAreaDef.h

67 lines
3.6 KiB
C

//
// Automatically generated by GenNvs ver 2.4.6
// Please DO NOT modify !!!
//
/**@file
@copyright
INTEL CONFIDENTIAL
Copyright 2018 - 2019 Intel Corporation.
The source code contained or described herein and all documents related to the
source code ("Material") are owned by Intel Corporation or its suppliers or
licensors. Title to the Material remains with Intel Corporation or its suppliers
and licensors. The Material may contain trade secrets and proprietary and
confidential information of Intel Corporation and its suppliers and licensors,
and is protected by worldwide copyright and trade secret laws and treaty
provisions. No part of the Material may be used, copied, reproduced, modified,
published, uploaded, posted, transmitted, distributed, or disclosed in any way
without Intel's prior express written permission.
No license under any patent, copyright, trade secret or other intellectual
property right is granted to or conferred upon you by disclosure or delivery
of the Materials, either expressly, by implication, inducement, estoppel or
otherwise. Any license under such intellectual property rights must be
express and approved by Intel in writing.
Unless otherwise agreed by Intel in writing, you may not remove or alter
this notice or any other notice embedded in Materials by Intel or
Intel's suppliers or licensors in any way.
This file contains an 'Intel Peripheral Driver' and is uniquely identified as
"Intel Reference Module" and is licensed for Intel CPUs and chipsets under
the terms of your license agreement with Intel or your vendor. This file may
be modified by the user, subject to additional terms of the license agreement.
@par Specification Reference:
**/
//
// Define ITBT NVS Area operation region.
//
#ifndef _I_TBT_NVS_AREA_DEF_H_
#define _I_TBT_NVS_AREA_DEF_H_
#pragma pack (push,1)
typedef struct {
UINT8 IntegratedTbtSupport; ///< Offset 0 Enable/Disable Integrated TbtSupport
UINT8 IntegratedTbtDma0; ///< Offset 1 Integrated DMA0 is supported or not.
UINT8 IntegratedTbtDma1; ///< Offset 2 Integrated DMA1 is supported or not.
UINT8 CurrentIntegratedTbtRootPort; ///< Offset 3 Current Port that has plug event.
UINT8 ITbtPcieRootPortEn0; ///< Offset 4 ITbt Pcie Root Port 0 is enabled or not.
UINT8 ITbtPcieRootPortEn1; ///< Offset 5 ITbt Pcie Root Port 1 is enabled or not.
UINT8 ITbtPcieRootPortEn2; ///< Offset 6 ITbt Pcie Root Port 2 is enabled or not.
UINT8 ITbtPcieRootPortEn3; ///< Offset 7 ITbt Pcie Root Port 3 is enabled or not.
UINT8 OsNativeResourceBalance; ///< Offset 8 OS Native Resource Balance is enable or not.
UINT8 ITbtRtd3; ///< Offset 9 ITBT Rtd3
UINT16 ITbtRtd3ExitDelay; ///< Offset 10 ITBT Rtd3 exit delay, unit is ms
UINT8 ITbtImrValid; ///< Offset 12 ITBT IMR Valid
UINT16 ITbtForcePowerOnTimeoutInMs; ///< Offset 13 Timeout value for forcing power iTBT controller on every boot/reboot/Sx exit as a precondition for execution of following mailbox communication.
UINT16 ITbtConnectTopologyTimeoutInMs; ///< Offset 15 Timeout value while sending connect topology mailbox command
UINT8 ITbtVproDockSupport; ///< Offset 17 ITBT vPro Dock support
} ITBT_NVS_AREA;
#pragma pack(pop)
#endif