242 lines
8.0 KiB
Plaintext
242 lines
8.0 KiB
Plaintext
/**@file
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@copyright
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INTEL CONFIDENTIAL
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Copyright 1999 - 2021 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains an 'Intel Peripheral Driver' and is uniquely identified as
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"Intel Reference Module" and is licensed for Intel CPUs and chipsets under
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the terms of your license agreement with Intel or your vendor. This file may
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be modified by the user, subject to additional terms of the license agreement.
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@par Specification Reference:
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**/
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External(\_SB.PC00.HDAS.PS0X, MethodObj)
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External(\_SB.PC00.HDAS.PS3X, MethodObj)
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External(\_SB.PC00.HDAS.PPMS, MethodObj)
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External(\_SB.VMON, MethodObj)
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External(\_SB.VMOF, MethodObj)
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External(HIDW, MethodObj)
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External(HIWC, MethodObj)
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//
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// High Definition Audio Controller - Device 31, Function 3
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//
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Device(HDAS)
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{
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Name(_ADR, 0x001F0003)
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//
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// Define a Memory Region that will allow access to the HDA PCI Configuration Space
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//
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OperationRegion(HDAR, PCI_Config, 0x00, 0x100)
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Field(HDAR,WordAcc,NoLock,Preserve) {
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VDID,32, // 0x00, VID DID
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Offset(0x54), // R_HDA_CFG_PCS Power management conrol PCS
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,8,
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PMEE,1,
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,6,
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PMES,1
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}
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Name(_S0W, 3) // Device can wake itself from D3 in S0
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Method(_DSW, 3) {}
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Method(_PRW, 0) {
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//[-start-210617-STATHAM0002-modify]//
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#ifdef LCFC_SUPPORT
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Return(GPRW(0x6D, 3)) // can wakeup from S3 state
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#else
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Return(GPRW(0x6D, 4)) // can wakeup from S4 state
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#endif
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//[-end-210617-STATHAM0002-modify]//
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}
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Method(GPEH, 0) {
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If(LEqual(^VDID,0xFFFFFFFF))
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{
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Return
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}
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If(LEqual(PMES,1)) {
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Notify(\_SB.PC00.HDAS, 0x02)
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}
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}
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// D0 Method for HD-A Controller
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Method(_PS0, 0, Serialized)
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{
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\_SB.S023(0, 1)
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//
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// Call platform HDAS PS0 method if present
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//
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If(CondRefOf(\_SB.PC00.HDAS.PS0X)) {
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\_SB.PC00.HDAS.PS0X()
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}
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}
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// D3 Method for HD-A Controller
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Method(_PS3, 0, Serialized)
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{
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\_SB.S023(0, 0)
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//
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// Call platform HDAS PS3 method if present
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//
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If(CondRefOf(\_SB.PC00.HDAS.PS3X)) {
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\_SB.PC00.HDAS.PS3X()
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}
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}
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// NHLT Table memory descriptor, returned from _DSM
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Name(NBUF, ResourceTemplate () {
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// NHLT table address (_MIN = NHLT 64bit pointer, _MAX = _MIN + _LEN - 1) and length (_LEN)
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QWordMemory (ResourceConsumer, , MinNotFixed, MaxNotFixed, NonCacheable, ReadOnly,
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0x1, // AddressGranularity
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0x0000000000000000, // AddressMinimum _MIN
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0x0000000000000000, // AddressMaximum _MAX
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0x0,
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0x0, // RangeLength _LEN
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, , NHLT, AddressRangeACPI,)
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})
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Method(_INI) {
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// Update resource according to NVS
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// Set NHLT base address and length
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CreateQWordField(NBUF, ^NHLT._MIN, NBAS)
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CreateQWordField(NBUF, ^NHLT._MAX, NMAS)
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CreateQWordField(NBUF, ^NHLT._LEN, NLEN)
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Store(NHLA, NBAS)
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Add(NHLA, Subtract(NHLL, 1), NMAS)
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Store(NHLL, NLEN)
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}
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Name(_DSD, Package () {
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ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
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// Properties related to HDAS
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Package () {
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Package (2) {"nhlt-version","1.8-0"}
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}
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})
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Method(_DSM, 0x4, NotSerialized, 0, UnknownObj, {BuffObj, IntObj, IntObj, PkgObj}) {
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// Arg0 - UUID: A69F886E-6CEB-4594-A41F-7B5DCE24C553 (Buffer)
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// Arg1 - Revision ID: 0x01 (Integer)
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// Arg2 - Function Index: 0x0 - 0x3 and 0x6 (Integer) - See below for details.
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// Arg3 - Depends on Function Index - See below for details.
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// Return - Depends on Function Index - See below for details.
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if(PCIC(Arg0)) { return(PCID(Arg0,Arg1,Arg2,Arg3)) }
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// Verify UUID
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If (LEqual(Arg0, ToUUID ("A69F886E-6CEB-4594-A41F-7B5DCE24C553"))) {
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Switch(ToInteger(Arg2)) {
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// Function 0: Function Support Query
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// Arg2 - Function Index: 0x00 (Integer)
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// Arg3: Unused
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// Return: Bitmask of functions supported. (Buffer)
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Case(0) {
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// Supports function 0 - 3 and 6
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Return(Buffer(One) { 0x4F })
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}
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// Function 1: Query Non HD Audio Descriptor Table
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// Used by the Intel Offload Engine Driver to discover the
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// non HD Audio devices supported by the Audio DSP.
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// Arg2 - Function Index: 0x01 (Integer)
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// Arg3 - Unused
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// Return - ACPI Table describing the non HD Audio links and devices supported by the ADSP (ResourceBuffer)
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Case(1) {
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// NBUF - Memory Resource Descriptor buffer with address and length of NHLT
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Return(NBUF)
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}
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// Function 2: Query Feature Mask
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// Used by the Intel Offload Engine Driver to retrieve a bitmask
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// of features allowable on this platform.
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// Arg2 - Function Index: 0x02 (Integer)
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// Arg3: Unused
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// Return: Bitmask of supported features.
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Case (2) {
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// Bit 0 == '1', WoV is supported, Bit 0 == '0', WoV not supported
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// Bit 1 == '1', BT Sideband is supported, Bit 1 == '0', BT not supported
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// Bit 2 == '1', codec based VAD support allowable
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// Bit 3 - 4 Reserved
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// Bit 5 == '1', BT Intel HFP SCO is supported
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// Bit 6 == '1', BT Intel A2DP is supported
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// Bit 7 == '1', DSP based speech pre-processing disabled
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// Bit 8 == '1', Windows Voice Activation, Bit 8 == '0', Intel Wake on Voice
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// Bit 9 - 31 Reserved, shall be set to '0'
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// ADFM - NVS AudioDSP Feature Bit Mask updated from PchPolicy
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Return(ADFM)
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}
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// Function 3: Query Pre/Post Processing Module Support
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// Used by the Intel Offload Engine Driver to determine if a
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// specified PP Module is allowed to be supported on this platform
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// Arg2 - Function Index: 0x03 (Integer)
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// Arg3 - UUID: Specifies the UUID of the PP module to check (Buffer)
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// Return - TRUE if PP Module supported, else FALSE.
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Case (3) {
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If(CondRefOf(\_SB.PC00.HDAS.PPMS)) {
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// Call platform method PPMS to check if 3rd Party IP module with given GUID (Arg3) is supported
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Return(\_SB.PC00.HDAS.PPMS (Arg3))
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}
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Return(0) // Is not supported
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}
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Case (6) {
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Return (XTAL)
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}
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Default {
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// Function not supported (Arg2)
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Return(Buffer(One) { 0x00 })
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}
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} // Switch(Arg2) End
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} // If(Arg0, UUID) End
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//-------------------------------------------
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// HID Wake up Event solution
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//-------------------------------------------
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If(CondRefOf(HIWC)) {
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If(HIWC(Arg0)) {
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If(CondRefOf(HIDW)) {
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Return (HIDW(Arg0, Arg1, Arg2, Arg3))
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}
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}
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}
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// UUID not supported (Arg0)
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Return(Buffer() {0})
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} // _DSM End
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} // end "High Definition Audio Controller"
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