alder_lake_bios/Intel/AlderLake/ClientOneSiliconPkg/SystemAgent/Library/DxeSaPolicyLib/DxeSaPolicyLibrary.h

63 lines
2.4 KiB
C

/** @file
Header file for the DxeSaPolicy library.
@copyright
INTEL CONFIDENTIAL
Copyright 2014 - 2017 Intel Corporation.
The source code contained or described herein and all documents related to the
source code ("Material") are owned by Intel Corporation or its suppliers or
licensors. Title to the Material remains with Intel Corporation or its suppliers
and licensors. The Material may contain trade secrets and proprietary and
confidential information of Intel Corporation and its suppliers and licensors,
and is protected by worldwide copyright and trade secret laws and treaty
provisions. No part of the Material may be used, copied, reproduced, modified,
published, uploaded, posted, transmitted, distributed, or disclosed in any way
without Intel's prior express written permission.
No license under any patent, copyright, trade secret or other intellectual
property right is granted to or conferred upon you by disclosure or delivery
of the Materials, either expressly, by implication, inducement, estoppel or
otherwise. Any license under such intellectual property rights must be
express and approved by Intel in writing.
Unless otherwise agreed by Intel in writing, you may not remove or alter
this notice or any other notice embedded in Materials by Intel or
Intel's suppliers or licensors in any way.
This file contains an 'Intel Peripheral Driver' and is uniquely identified as
"Intel Reference Module" and is licensed for Intel CPUs and chipsets under
the terms of your license agreement with Intel or your vendor. This file may
be modified by the user, subject to additional terms of the license agreement.
@par Specification Reference:
**/
#ifndef _DXE_SA_POLICY_LIBRARY_H_
#define _DXE_SA_POLICY_LIBRARY_H_
#include <Uefi.h>
#include <Library/DebugLib.h>
#include <Library/UefiLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/ConfigBlockLib.h>
#include <CpuPcieConfigGen3.h>
#include <CpuPcieConfig.h>
#include <Protocol/SaPolicy.h>
#define WORD_FIELD_VALID_BIT BIT15
#define MAX_PCIE_ASPM_OVERRIDE 500
#define MAX_PCIE_LTR_OVERRIDE 500
///
/// DIMM SMBus addresses
///
#define DIMM_SMB_SPD_P0C0D0 0xA0
#define DIMM_SMB_SPD_P0C0D1 0xA2
#define DIMM_SMB_SPD_P0C1D0 0xA4
#define DIMM_SMB_SPD_P0C1D1 0xA6
#define DIMM_SMB_SPD_P0C0D2 0xA8
#define DIMM_SMB_SPD_P0C1D2 0xAA
#endif // _DXE_SA_POLICY_LIBRARY_H_