93 lines
2.8 KiB
C
93 lines
2.8 KiB
C
/** @file
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TBD
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2020 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains a 'Sample Driver' and is licensed as such under the terms
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of your license agreement with Intel or your vendor. This file may be modified
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by the user, subject to the additional terms of the license agreement.
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@par Specification Reference:
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**/
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#ifndef _SNDW_MIPI_CMD_H_
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#define _SNDW_MIPI_CMD_H_
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#define SNDW_CMD_DEFAULT 0
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enum SNDW_COMMAND_TYPE {
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SndwCmdPing = 0,
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SndwCmdReserved = 1,
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SndwCmdRead = 2,
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SndwCmdWrite = 3,
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SndwCmdInvalid = 4
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};
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typedef union {
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UINT32 Command;
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struct {
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UINT32 Reserved0 : 8;
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UINT32 SSync : 8;
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UINT32 Reserved1 : 1;
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UINT32 DSync : 4;
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UINT32 Reserved2 : 5;
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UINT32 Ssp : 1;
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UINT32 Reserved3 : 1;
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UINT32 OpCode : 3;
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UINT32 SspTag : 1;
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} TxPing;
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struct {
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UINT32 RegData : 8;
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UINT32 RegAddr : 16;
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UINT32 DeviceAddress : 4;
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UINT32 OpCode : 3;
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UINT32 SspTag : 1;
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} TxWrite;
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struct {
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UINT32 Reserved0 : 8;
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UINT32 RegAddr : 16;
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UINT32 DeviceAddress : 4;
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UINT32 OpCode : 3;
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UINT32 SspTag : 1;
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} TxRead;
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struct {
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UINT32 Reserved0 : 24;
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UINT32 DeviceAddress : 4;
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UINT32 OpCode : 3;
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UINT32 SspTag : 1;
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} Tx;
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struct {
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UINT32 Ack : 1;
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UINT32 Nak : 1;
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UINT32 Reserved0 : 2;
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UINT32 OpCode : 3;
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UINT32 Reserved1 : 1;
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UINT32 Data : 8;
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UINT32 Reserved2 : 16;
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} Rx;
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} SNDW_COMMAND;
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#endif
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