175 lines
6.5 KiB
C
175 lines
6.5 KiB
C
//*****************************************************************************
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//
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//
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// Copyright (c) 2012 - 2015, Hefei LCFC Information Technology Co.Ltd.
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// And/or its affiliates. All rights reserved.
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// Hefei LCFC Information Technology Co.Ltd. PROPRIETARY/CONFIDENTIAL.
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// Use is subject to license terms.
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//
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//******************************************************************************
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/*
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History:
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Date Name Version Change Notes
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*/
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#include <PiPei.h>
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#include <Pi/PiBootMode.h>
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#include <Library/DebugLib.h>
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#include <Library/PeiServicesLib.h>
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#include <Library/OemSvcLfcCardReaderCfg.h>
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#include <Library/OemSvcLfcGenesysLogicCardReaderCfg.h>
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//[start-211211-STORM1119-modify]
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#if defined(C770_SUPPORT)
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#include <Library/GpioLib.h>
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#define GPIO_VER2_LP_GPP_R6 0x09030006 //Board ID5
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#define GPIO_VER2_LP_GPP_R7 0x09030007 //Board ID6
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static GLOBAL_REMOVE_IF_UNREFERENCED GPIO_INIT_CONFIG YogaC770_GPIO_Table_early_initGLC[] =
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{
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{GPIO_VER2_LP_GPP_R6, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone, GpioLockDefault}},//Board ID5
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{GPIO_VER2_LP_GPP_R7, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone, GpioLockDefault}},//Board ID6
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};
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#endif
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//[end-211211-STORM1119-modify]
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PCI_REG_TABLE GL9750PciRegTable[] = {
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{ 0x800, 0xFFFFFFFE, 0x00000001 }, // Unlock write protect
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//[-start-211110-YUNLEI0153-modify]//
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{ 0x844, 0x7FFFFFFF, 0x80000000 },// Set the IDDQ function.
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//[-end-211110-YUNLEI0153-modify]//
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{ 0x848, 0xFFFF8FC7, 0x00006030 }, // Adjust L1 Exit Latency if to enable ASPM
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{ 0x848, 0xFFFFFFBF, 0x00000000 }, // Disable ASPM L0s
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{ 0x860, 0x0FFFFFFF, 0x00800000 }, // Ennable DFx for Modern Standby
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{ 0x878, 0xFDFFFFFF, 0x02000000 }, // Disable wake up system by card insertion or removal during S3/S4
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{ 0x87C, 0x00000000, LENOVO_GL9750_OIYL4_SSVID_SSID }, // Programing SSID/SVID
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{ 0x800, 0xFFFFFFFE, 0x00000000 }, // Lock write protect
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};
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//[start-211211-STORM1119-modify]
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#if defined(C770_SUPPORT)
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PCI_REG_TABLE GL9750PciRegTable_size14[] = {
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{ 0x800, 0xFFFFFFFE, 0x00000001 }, // Unlock write protect
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//[-start-211110-YUNLEI0153-modify]//
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// { 0x844, 0x7FFFFFFF, 0x80000000 },// Set the IDDQ function.
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//[-end-211110-YUNLEI0153-modify]//
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{ 0x848, 0xFFFF8FC7, 0x00006030 }, // Adjust L1 Exit Latency if to enable ASPM
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{ 0x848, 0xFFFFFFBF, 0x00000000 }, // Disable ASPM L0s
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{ 0x860, 0x0FFFFFFF, 0x00800000 }, // Ennable DFx for Modern Standby
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{ 0x878, 0xFDFFFFFF, 0x02000000 }, // Disable wake up system by card insertion or removal during S3/S4
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{ 0x87C, 0x00000000, LENOVO_GL9750_OIYL4_SSVID_SSID }, // Programing SSID/SVID
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{ 0x800, 0xFFFFFFFE, 0x00000000 }, // Lock write protect
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};
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EFI_STATUS
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LcfcGpioGetMachineSizeGLC(
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OUT UINT8 *MachineSize
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)
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{
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UINT32 BoardID5, BoardID6;
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UINT8 Data8 = 0;
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GpioGetInputValue(GPIO_VER2_LP_GPP_R6,&BoardID5);
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GpioGetInputValue(GPIO_VER2_LP_GPP_R7,&BoardID6);
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Data8 |= (UINT8)(BoardID6 << 0);
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Data8 |= (UINT8)(BoardID5 << 1);
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DEBUG ((DEBUG_INFO, "KEBIN dbg Machine Size = 0x%x\n",Data8));
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*MachineSize = Data8;
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DEBUG ((DEBUG_INFO, "KEBIN dbg2 MachineSize = 0x%x\n",*MachineSize));
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return EFI_SUCCESS;
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}
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#endif
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//[end-211211-STORM1119-modify]
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// this function will be executed right after end of pei (project speific code here)
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EFI_STATUS
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EFIAPI
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CheckAndProgramGenesysLogicCardReader (
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IN EFI_PEI_SERVICES **PeiServices,
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UINT8 BrgBusNum,
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UINT8 BrgDevNum,
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UINT8 BrgFunNum,
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UINT8 BusNum,
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UINTN MemBaseAddr,
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UINT16 VendorId,
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UINT16 DeviceId
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)
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{
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UINT32 Temp32;
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UINT8 Index;
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//[start-211211-STORM1119-modify]
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#if defined(C770_SUPPORT)
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UINT8 MachineSize = 0;
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#endif
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//[end-211211-STORM1119-modify]
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DEBUG((DEBUG_INFO, __FUNCTION__" Entry\n"));
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//
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// Determine device by Vendor ID and Device ID.
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//
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if ((VendorId != GenesysLogic_Card_Reader_VID) || (DeviceId != GenesysLogic_Card_Reader_DID)) {
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return EFI_UNSUPPORTED;
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}
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DEBUG ((DEBUG_INFO, "Find Genesys Logic Card Reader(B:%d/D:%d:/F:%d)\n", BusNum, 0, 0));
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//
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// Write Value To Crc Register
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//
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//[start-211211-STORM1119-modify]
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#if defined(C770_SUPPORT)
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GpioConfigurePads (2, YogaC770_GPIO_Table_early_initGLC);
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LcfcGpioGetMachineSizeGLC (&MachineSize);
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if(2 == MachineSize) {
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#endif
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//[end-211211-STORM1119-modify]
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for(Index = 0 ; Index < sizeof(GL9750PciRegTable)/sizeof(PCI_REG_TABLE) ; Index ++) {
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if(GL9750PciRegTable[Index].Offset == 0xFFFFFFFF) break;
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//
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// Get Current setting.
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//
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Temp32 = MmioRead32((UINTN) (MemBaseAddr+ GL9750PciRegTable[Index].Offset));
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DEBUG ((DEBUG_INFO, "Read Genesys Logic Card Reader Register Offset %.4X: %.8X\n", GL9750PciRegTable[Index].Offset, Temp32));
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//
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// Prepare OEM Setting.
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//
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Temp32 = (Temp32 & GL9750PciRegTable[Index].AndMask) | GL9750PciRegTable[Index].OrValue;
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//
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// Write OEM Setting.
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//
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MmioWrite32((UINTN) (MemBaseAddr + GL9750PciRegTable[Index].Offset), Temp32);
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DEBUG ((DEBUG_INFO, "Write Genesys Logic Card Reader Register Offset %.4X: %.8X\n", GL9750PciRegTable[Index].Offset, Temp32));
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}
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//[start-211211-STORM1119-modify]
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#if defined(C770_SUPPORT)
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} else {
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for(Index = 0 ; Index < sizeof(GL9750PciRegTable_size14)/sizeof(PCI_REG_TABLE) ; Index ++) {
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if(GL9750PciRegTable_size14[Index].Offset == 0xFFFFFFFF) break;
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//
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// Get Current setting.
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//
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Temp32 = MmioRead32((UINTN) (MemBaseAddr+ GL9750PciRegTable_size14[Index].Offset));
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DEBUG ((DEBUG_INFO, "Read Genesys Logic Card Reader Register Offset %.4X: %.8X\n", GL9750PciRegTable_size14[Index].Offset, Temp32));
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//
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// Prepare OEM Setting.
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//
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Temp32 = (Temp32 & GL9750PciRegTable_size14[Index].AndMask) | GL9750PciRegTable_size14[Index].OrValue;
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//
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// Write OEM Setting.
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//
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MmioWrite32((UINTN) (MemBaseAddr + GL9750PciRegTable_size14[Index].Offset), Temp32);
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DEBUG ((DEBUG_INFO, "Write Genesys Logic Card Reader Register Offset %.4X: %.8X\n", GL9750PciRegTable_size14[Index].Offset, Temp32));
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}
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}
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#endif
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//[end-211211-STORM1119-modify]
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DEBUG((DEBUG_INFO, __FUNCTION__" End\n"));
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return EFI_SUCCESS;
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}
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