236 lines
6.8 KiB
Plaintext
236 lines
6.8 KiB
Plaintext
/** @file
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ACPI RTD3 Hook SSDT Library for Generic Pcie Rp with End Point as Discrete Graphics Device.
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2020 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains a 'Sample Driver' and is licensed as such under the terms
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of your license agreement with Intel or your vendor. This file may be modified
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by the user, subject to the additional terms of the license agreement.
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@par Specification Reference:
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**/
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External(DGDS)
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External(\_SB.PC00.PEG1.PEGP.PEGB.PEGE.DEDP, DeviceObj)
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// DG Op Region
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OperationRegion (DGMR, SystemMemory, DGOP, 0x2000)
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Field (DGMR, AnyAcc, NoLock, Preserve)
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{
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//
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// OpRegion Header starts at 0x000
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//
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Offset (0x60),
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PCON, 32, // Platform Configuration start at 0x60h
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Offset(0x100),
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DRDY, 32, // Driver readiness (ACPI notification)
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CSTS, 32, // Notification status
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CEVT, 32, // Current event
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Offset(0x120),
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DIDL, 32, // Supported display device ID list
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DDL2, 32, // Allows for 8 devices
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DDL3, 32,
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DDL4, 32,
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DDL5, 32,
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DDL6, 32,
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DDL7, 32,
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DDL8, 32,
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CPDL, 32, // Currently present display list
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CPL2, 32, // Allows for 8 devices
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CPL3, 32,
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CPL4, 32,
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CPL5, 32,
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CPL6, 32,
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CPL7, 32,
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CPL8, 32,
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CADL, 32, // Currently active display list
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CAL2, 32, // Allows for 8 devices
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CAL3, 32,
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CAL4, 32,
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CAL5, 32,
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CAL6, 32,
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CAL7, 32,
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CAL8, 32,
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NADL, 32, // Next active display list
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NDL2, 32, // Allows for 8 devices
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NDL3, 32,
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NDL4, 32,
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NDL5, 32,
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NDL6, 32,
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NDL7, 32,
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NDL8, 32,
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ASLP, 32, // ASL sleep timeout
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TIDX, 32, // Toggle table index
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CHPD, 32, // Current hot plug enable indicator
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CLID, 32, // Current lid state indicator
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CDCK, 32, // Current docking state indicator
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SXSW, 32, // Display switch notify on resume
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EVTS, 32, // Events supported by ASL (diag only)
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CNOT, 32, // Current OS notifications (diag only)
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NRDY, 32,
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//
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//Extended DIDL list
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//
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DDL9, 32,
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DD10, 32,
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DD11, 32,
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DD12, 32,
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DD13, 32,
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DD14, 32,
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DD15, 32,
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//
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//Extended Currently attached Display Device List CPD2
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//
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CPL9, 32,
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CP10, 32,
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CP11, 32,
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CP12, 32,
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CP13, 32,
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CP14, 32,
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CP15, 32,
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Offset(0x300),
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, 32, // Driver readiness (power conservation)
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ASLC, 32, // ASLE interrupt command/status
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, 32, // Technology enabled indicator
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, 32, // Current ALS illuminance reading
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BCLP, 32, // Backlight brightness
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, 32, // Panel fitting state or request
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CBLV, 32, // Current brightness level
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BCLM, 320, // Backlight brightness level duty cycle mapping table
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Offset (0x3C6), // VRSR start at 0x3C6
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VRSR, 1,
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}
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// Get DG VRAMSR Enable Status
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// Check if BIOS supports VRAM self refersh and OS/driver enabled self refersh.
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// If VRAMSR is enable, OS/Device need to Self Refresh. So Device Core Power Can't be Removed.
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// So return 0 in this case to show Power Removal Request is denied.
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// If VRAMSR is disable then it is safe to Remove/Disable Power.
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// Input: VOID
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//
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// @return 1 if it is Safe to Remove/Disable Power. 0 Not allow for Power Removal.
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//
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Method (DVES, 0, Serialized) {
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// Check if DG is Supported or not.
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If(LEqual (DGBA, 0)) {
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// DG is not Supported. No need to check for Permission. Safe To remove Power.
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Return (1) // Core power Removal Request is Accepted
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}
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// BIOS supports VRAM self refersh and OS/driver enabled self refersh
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If (LAnd (LEqual (And(0x1800, PCON), 0x1800), VRSR)) {
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Return (0) // Core Power removal Request is denied.
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}
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// Either BIOS does not support self-refresh or OS/driver does not enabled self-refresh
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Return (1) // Core power Removal Request is Accepted
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}
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//
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// This method is to be called when a graphics device
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// notification is required (display switch hotkey, etc).
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// Arg0 = Current event type
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// Arg1 = Notification type
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//
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Method(DNOT, 2)
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{
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Store(Arg0, CEVT) // Set up the current event value
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Store(3, CSTS) // CSTS=BIOS dispatched an event
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If(LAnd(LEqual(CHPD, 0), LEqual(Arg1, 0))) // Do not re-enum if driver supports hotplug
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{
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//
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// Re-enumerate the DG Device for non-XP operating systems.
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//
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Notify(\_SB.PC00.PEG1.PEGP, Arg1)
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}
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Notify(\_SB.PC00.PEG1.PEGP,0x80)
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Return(0x0) // Return success
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}
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//
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// This method is to handle a lid event for DGPU LFP device.
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//
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Method(DLID, 1)
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{
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If (LEqual(Arg0,1))
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{
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Store(3,CLID)
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}
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Else
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{
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Store(Arg0, CLID)
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}
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if (DNOT(2, 0)) {
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Or (CLID, 0x80000000, CLID)
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Return (1) // Return Fail
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}
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Return (0) // Return Pass
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}
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//
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// This menthod is to called to set a brightness level for DGPU LFP device.
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//
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Method(DINT, 2)
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{
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If(LEqual(Arg0, 1)) // Arg0=1, so set the backlight brightness.
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{
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Store(Divide(Multiply(Arg1, 255), 100), BCLP) // Convert from percent to 0-255.
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Or(BCLP, 0x80000000, BCLP) // Set the valid bit.
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Store(2, ASLC) // Store "Backlight control event" to ASLC[31:1]
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}
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Return(0x0) // Return success
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}
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//
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// This method is to send backlight notifications to the DGPU LFP device
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//
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Method(HBRT, 1 , Serialized)
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{
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//
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// Send backlight notifications to the DGPU LFP device.
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//
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If(And(4,DGDS))
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{
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If(LEqual(Arg0,4))
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{
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Notify(\_SB.PC00.PEG1.PEGP.PEGB.PEGE.DEDP,0x87)
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}
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If(LEqual(Arg0,3))
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{
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Notify(\_SB.PC00.PEG1.PEGP.PEGB.PEGE.DEDP,0x86)
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}
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}
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} |