267 lines
6.9 KiB
Plaintext
267 lines
6.9 KiB
Plaintext
/** @file
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ACPI RTD3 SSDT table for PCIe WWAN
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Scope (\_SB.PCI0.RPXX)
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_S0W
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_DSW
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_PR0
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PXP
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_STA
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_ON
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_OFF
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_PR3
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Scope (\_SB.PCI0.RPXX.PXSX)
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_PS0 (for 5G only)
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_PS3 (for 5G only)
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_PRR
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MRST (in DSDT)
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_STA: Dummy
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_ON: Dummy
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_OFF: Dummy
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_RST: FULL_CARD_POWER_OFF# and RESET# Reset
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_DSM (in DSDT)
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Function 0: Support Functions Query
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Function 1: Reserved
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Function 2: RESET#-only Reset
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Function 3: Power
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2018 - 2021 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains a 'Sample Driver' and is licensed as such under the terms
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of your license agreement with Intel or your vendor. This file may be modified
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by the user, subject to the additional terms of the license agreement.
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@par Specification Reference:
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**/
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/// @details
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/// Code in this file uses following variables:
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/// SCLK: ICC Clock number - optional
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/// WAKG: WAKE GPIO pad - optional
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/// Below objects should be defined according to the format described in PinDriverLib.asl
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/// RSTG: reset pin definition - mandatory
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/// PWRG: power GPIO pad - optional
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/// WAKP: Flag to indicate that power gating must not be performed if WAKE is enabled - optional
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/// @defgroup pcie_scope PCIe Root Port Scope **/
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//
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// AcpiPinDriverLib imports(from DSDT in platform)
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//
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External(\PIN.STA, MethodObj)
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External(\PIN.ON, MethodObj)
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External(\PIN.OFF, MethodObj)
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//
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// GpioLib imports(DSDT)
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//
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External(\_SB.SHPO, MethodObj)
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//
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// HSIO lib imports
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//
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External(\_SB.PSD0, MethodObj)
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External(\_SB.PSD3, MethodObj)
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External(\WWMT)
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//
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// External decalarations for optional objects.
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// Defined by board specific code.
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//
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External(WAKG)
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External(PWRG)
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External(SCLK)
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External(WAKP)
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External(WWEN)
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External(TN2B) // PcdBoardWwanTOn2ResDelayMs
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External(TB2R) // PcdBoardWwanTOnRes2PerDelayMs
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External(TR2P) // PcdBoardWwanTOnPer2PdsDelayMs
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External(TR2B) // PcdBoardWwanPer2ResDelayMs
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External(TB2F) // PcdBoardWwanRes2OffDelayMs
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External(TFDI) // PcdBoardWwanTOffDisDelayMs
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// WAKE enable on PCIe device.
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Name(WKEN, 0)
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// Last OFF Timestamp (WOFF): The time stamp of the last power resource _OFF method evaluation
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Name(WOFF, 0)
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Name(OFEN, 1)
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Name(ONEN, 0)
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//
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// Method _S0W: Returns a value of 4 if D3cold is supported by the platform; returns 0 in all other cases
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//
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Method(_S0W, 0, Serialized) {
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//
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// WRTO - WWAN RTD3 Option
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// 3: D3/L2
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// 1: D0/L1.2
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// 0: Disabled
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//
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If (LEqual(WRTO, 3)) {
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Return(4)
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} Else {
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Return(0)
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}
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}
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//
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// _DSW (Device Sleep Wake)
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//
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// This control method can be used to enable or disable the device's ability to wake a
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// sleeping system.
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//
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// Arguments: (3)
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// Arg0 - An Integer that contains the device wake capability control
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// Arg1 - An Integer that contains the target system state (0-4)
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// Arg2 - An Integer that contains the target device state
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// Return Value:
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// None
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//
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Method(_DSW, 3) {
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// This method is used to enable/disable wake from PCIe (WKEN)
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If(Arg1) { // If entering Sx, need to disable WAKE# from generating runtime PME
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Store(0, WKEN)
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} Else { // If Staying in S0
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If(LAnd(Arg0, Arg2)) // Check if Exiting D0 and arming for wake
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{ // Set PME
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Store(1, WKEN)
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} Else { // Disable runtime PME, either because staying in D0 or disabling wake
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}
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}
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/** @defgroup pcie_dsw PCIE _DSW **/
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} // End _DSW
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If (LEqual(WWEN, 2)) {
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Include("Rtd3Pcie5GWwan.asl")
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} Else {
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Include("Rtd3Pcie4GWwan.asl")
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}
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// Returns the status of PCIe slot core power
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Method(PSTA, 0) {
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//
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// Detect power pin status
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//
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If(CondRefOf(PWRG)) {
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If(LNot(\PIN.STA(PWRG))) {
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Return(0)
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}
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}
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//
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// RESET# assertion is mandatory for PCIe RTD3
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// So if RESET# is asserted the whole slot is off
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//
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If(\PIN.STA(RSTG)) {
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Return(0)
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} Else {
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Return(1)
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}
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}
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// Turn on power to PCIe Slot
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// Since this method is also used by the remapped devices to turn on power to the slot
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// this method should not make any access to the PCie config space.
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Method(PON) {
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// Restore power to the modPHY
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\_SB.PSD0(SLOT)
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If(CondRefOf(WOFF)) {
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If(LNotEqual(WOFF, 0)) {
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// Turn ON Power for PCIe Slot
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If(CondRefOf(PWRG)) {
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\PIN.ON(PWRG)
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Sleep(PEP0)
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}
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// Drive BB Reset Pin high
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// Delay of 20ms to make it ensure modem is come out from Reset modem
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\PIN.OFF(BRST)
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Sleep(20)
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} Else {
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// As per PCIe M.2 Spec , clock Should be applied in 20 microsecond
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Stall(20)
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}
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} Else {
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// As per PCIe M.2 Spec , clock Should be applied in 20 microsecond
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Stall(20)
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}
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If(CondRefOf(SCLK)) {
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SPCO(SCLK, 1)
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}
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// PERST De-assertion should be greater than 100 ms
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If(CondRefOf(WOFF)) {
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If(LNotEqual(WOFF, 0)) {
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Sleep(100)
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}
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}
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// De-assert Reset Pin
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\PIN.OFF(RSTG)
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}
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// Turn off power to PCIe Slot
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// Since this method is also used by the remapped devices to turn off power to the slot
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// this method should not make any access to the PCIe config space.
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Method(POFF) {
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// Assert Reset Pin
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// Reset pin is mandatory for correct PCIe RTD3 flow
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\PIN.ON(RSTG)
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// Enable modPHY power gating
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// This must be done after the device has been put in reset
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\_SB.PSD3(SLOT)
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//
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// On RTD3 entry, BIOS will instruct the PMC to disable source clocks.
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// This is done through sending a PMC IPC command.
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//
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If(CondRefOf(SCLK)) {
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SPCO(SCLK, 0)
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Sleep(16)
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}
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}
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Method(_PR0) {
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If (LEqual(WWEN, 2)) {
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Return(Package(){PXP5})
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} Else {
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Return(Package(){PXP})
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}
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}
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If (LEqual(WRTO, 3)) {
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Method(_PR3) {
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If (LEqual(WWEN, 2)) {
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Return(Package(){PXP5})
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} Else {
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Return(Package(){PXP})
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}
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}
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}
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