835 lines
34 KiB
Plaintext
835 lines
34 KiB
Plaintext
## @file
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#
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#******************************************************************************
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#* Copyright 2021 Insyde Software Corp. All Rights Reserved.
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#*
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#* You may not reproduce, distribute, publish, display, perform, modify, adapt,
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#* transmit, broadcast, present, recite, release, license or otherwise exploit
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#* any part of this publication in any form, by any means, without the prior
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#* written permission of Insyde Software Corp.
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#*
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#******************************************************************************
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## @file
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# Board description file initializes configuration (PCD) settings for the project.
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#
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# @copyright
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# INTEL CONFIDENTIAL
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# Copyright 2020 - 2021 Intel Corporation.
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#
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# The source code contained or described herein and all documents related to the
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# source code ("Material") are owned by Intel Corporation or its suppliers or
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# licensors. Title to the Material remains with Intel Corporation or its suppliers
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# and licensors. The Material may contain trade secrets and proprietary and
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# confidential information of Intel Corporation and its suppliers and licensors,
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# and is protected by worldwide copyright and trade secret laws and treaty
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# provisions. No part of the Material may be used, copied, reproduced, modified,
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# published, uploaded, posted, transmitted, distributed, or disclosed in any way
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# without Intel's prior express written permission.
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#
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# No license under any patent, copyright, trade secret or other intellectual
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# property right is granted to or conferred upon you by disclosure or delivery
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# of the Materials, either expressly, by implication, inducement, estoppel or
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# otherwise. Any license under such intellectual property rights must be
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# express and approved by Intel in writing.
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#
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# Unless otherwise agreed by Intel in writing, you may not remove or alter
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# this notice or any other notice embedded in Materials by Intel or
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# Intel's suppliers or licensors in any way.
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#
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# This file contains a 'Sample Driver' and is licensed as such under the terms
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# of your license agreement with Intel or your vendor. This file may be modified
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# by the user, subject to the additional terms of the license agreement.
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#
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# @par Specification
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##
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[Packages]
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Usb3DebugFeaturePkg/Usb3DebugFeaturePkg.dec
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PostCodeDebugFeaturePkg/PostCodeDebugFeaturePkg.dec
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BeepDebugFeaturePkg/BeepDebugFeaturePkg.dec
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MebxFeaturePkg/MebxFeaturePkg.dec
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[PcdsFeatureFlag]
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## This PCD specified whether ACPI SDT protocol is installed.
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# ROYAL_PARK_OVERRIDE: PcdInstallAcpiSdtProtocol
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gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE
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gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreImageLoaderSearchTeSectionFirst|FALSE
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gEfiMdeModulePkgTokenSpaceGuid.PcdPciDegradeResourceForOptionRom|FALSE
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# Disabling PcdBrowserGrayOutTextStatement causes all empty/disabled rows active
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gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserGrayOutTextStatement|TRUE
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gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE
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gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE
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gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|FALSE
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gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|FALSE
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# Build scripts override the value of this PCD, update value in scripts for the change to take effect.
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gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|FALSE
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gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable|FALSE
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gBoardModuleTokenSpaceGuid.PcdSecurityEnable|FALSE
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gBoardModuleTokenSpaceGuid.PcdAdvancedFeatureEnable|FALSE
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gBoardModuleTokenSpaceGuid.PcdOptimizationEnable|FALSE
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gBoardModuleTokenSpaceGuid.PcdIntelGopEnable|FALSE #LegacyVideoRom.bin and IntelGopDriver.efi
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gBoardModuleTokenSpaceGuid.PcdUefiShellEnable|FALSE
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gNhltFeaturePkgTokenSpaceGuid.PcdNhltFeatureEnable|FALSE
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gSndwFeatureModuleTokenSpaceGuid.PcdSndwFeatureEnable|FALSE
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gMebxFeaturePkgTokenSpaceGuid.PcdMebxFeatureEnable|TRUE
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|FALSE
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# XmlCli: Initialize Feature Pcd
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gXmlCliFeaturePkgTokenSpaceGuid.PcdXmlCliFeatureEnable|TRUE
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[PcdsFeatureFlag.X64]
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# Optimze Driver init time in FastBoot Mode
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# If set PcdPs2KbdExtendedVerification to False, we can save 380 ms for Ps2KeyboardDxe driver initialize time
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gEfiMdeModulePkgTokenSpaceGuid.PcdPs2KbdExtendedVerification|FALSE
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#
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# Enabling PcdHiiOsRuntimeSupport casuses S4 failure due to
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# insuficient Runtime memory allocation
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#
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gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE
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[PcdsFixedAtBuild]
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gSiPkgTokenSpaceGuid.PcdAcpiEnable|FALSE
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gSiPkgTokenSpaceGuid.PcdSmbiosEnable|FALSE
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gSiPkgTokenSpaceGuid.PcdS3Enable|FALSE
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gSiPkgTokenSpaceGuid.PcdITbtEnable|FALSE
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gSiPkgTokenSpaceGuid.PcdBiosGuardEnable|FALSE
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#[-start-200420-IB17800056-modify]#
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# ADL PO Temporary remove
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gSiPkgTokenSpaceGuid.PcdHgEnable|TRUE
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#[-end-200420-IB17800056-modify]#
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gSiPkgTokenSpaceGuid.PcdBootGuardEnable|FALSE
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gSiPkgTokenSpaceGuid.PcdAtaEnable|FALSE
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gSiPkgTokenSpaceGuid.PcdFspWrapperEnable|TRUE
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gSiPkgTokenSpaceGuid.PcdOcWdtEnable|FALSE
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gSiPkgTokenSpaceGuid.PcdSerialIoUartEnable|FALSE
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gSiPkgTokenSpaceGuid.PcdIpuEnable|FALSE
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gSiPkgTokenSpaceGuid.PcdPeiDisplayEnable|FALSE
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gSiPkgTokenSpaceGuid.PcdVtdEnable|FALSE
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gSiPkgTokenSpaceGuid.PcdGnaEnable|FALSE
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gSiPkgTokenSpaceGuid.PcdThcEnable|FALSE
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gSiPkgTokenSpaceGuid.PcdPpmEnable|FALSE
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gSiPkgTokenSpaceGuid.PcdPpamEnable|FALSE
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gSiPkgTokenSpaceGuid.PcdSpaEnable|FALSE
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gSiPkgTokenSpaceGuid.PcdPsmiEnable|FALSE
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gSiPkgTokenSpaceGuid.PcdVmdEnable|FALSE
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gSiPkgTokenSpaceGuid.PcdCpuPcieEnable|FALSE
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gSiPkgTokenSpaceGuid.PcdTraceHubDebugLibMaster|0x48
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gSiPkgTokenSpaceGuid.PcdTraceHubDebugLibChannel|0xE
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gSiPkgTokenSpaceGuid.PcdAcpiDebugEnableFlag|TRUE # Acpi debug enable flag
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#
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# 16MB TSEG.
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#
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gSiPkgTokenSpaceGuid.PcdTsegSize|0x1000000
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#
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# Default BootStage is set here.
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# Stage 1 - enable debug (system deadloop after debug init)
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# Stage 2 - mem init (system deadloop after mem init)
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# Stage 3 - boot to shell only
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# Stage 4 - boot to OS
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# Stage 5 - boot to OS with security boot enabled
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# Stage 6 - boot with advanced features
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# stage 7 - tuning
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#
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gMinPlatformPkgTokenSpaceGuid.PcdBootStage|6
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gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode|TRUE
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gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|1
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gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiReclaimMemorySize|0xA2
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gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize|0xE8
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gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x3100
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gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x6E
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gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x99
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#
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# The PCDs are used to control the Windows SMM Security Mitigations Table - Protection Flags
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#
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# BIT0: If set, expresses that for all synchronous SMM entries,SMM will validate that input and output buffers lie entirely within the expected fixed memory regions.
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# BIT1: If set, expresses that for all synchronous SMM entries, SMM will validate that input and output pointers embedded within the fixed communication buffer only refer to address ranges \
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# that lie entirely within the expected fixed memory regions.
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# BIT2: Firmware setting this bit is an indication that it will not allow reconfiguration of system resources via non-architectural mechanisms.
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# BIT3-31: Reserved
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#
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gMinPlatformPkgTokenSpaceGuid.PcdWsmtProtectionFlags|0x07
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gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|0
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## This PCD decides how FSP is measured
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# 1) The BootGuard ACM may already measured the FSP component, such as FSPT/FSPM.
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# We need a flag (PCD) to indicate if there is need to do such FSP measurement or NOT.
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# 2) The FSP binary includes FSP code and FSP UPD region. The UPD region is considered
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# as configuration block, and it may be updated by OEM by design.
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# This flag (PCD) is to indicate if we need isolate the the UPD region from the FSP code region.
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# BIT0: Need measure FSP. (for FSP 1.x) - reserved in FSP2.
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# BIT1: Need measure FSPT. (for FSP 2.x)
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# BIT2: Need measure FSPM. (for FSP 2.x)
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# BIT3: Need measure FSPS. (for FSP 2.x)
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# BIT4~30: reserved.
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# BIT31: Need isolate UPD region measurement.
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# 0: measure FSP[T|M|S] as one binary in one record (PCR0).
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# 1: measure FSP UPD region in one record (PCR1),
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# measure the FSP code without UPD in another record (PCR0).
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#
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gIntelFsp2WrapperTokenSpaceGuid.PcdFspMeasurementConfig|0x80000008
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gBoardModuleTokenSpaceGuid.PcdAcpiDebugFeatureEnable|FALSE
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gBoardModuleTokenSpaceGuid.PcdS4Enable|FALSE
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gBoardModuleTokenSpaceGuid.PcdBiosGuardBinEnable|FALSE #BiosGuardModule.bin
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gBoardModuleTokenSpaceGuid.PcdGopConfigBin|FALSE
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gBoardModuleTokenSpaceGuid.PcdNhltBinEnable|FALSE #NhltIcl.bin
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gBoardModuleTokenSpaceGuid.PcdRaidDriverEfiEnable|FALSE #RaidDriver.efi
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gBoardModuleTokenSpaceGuid.PcdRsteDriverEfiEnable|FALSE #SataDriverRste.efi
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gBoardModuleTokenSpaceGuid.PcdNvmeEnable|FALSE
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gBoardModuleTokenSpaceGuid.PcdIntelRaidEnable|FALSE
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gBoardModuleTokenSpaceGuid.PcdTerminalEnable|FALSE
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gBoardModuleTokenSpaceGuid.PcdEcEnable|FALSE
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!if gSiPkgTokenSpaceGuid.PcdAdlLpSupport == TRUE
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gBoardModuleTokenSpaceGuid.PcdDefaultBoardId|0x13
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!else
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gBoardModuleTokenSpaceGuid.PcdDefaultBoardId|0x27
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!endif
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gBoardModuleTokenSpaceGuid.PcdFFUEnable|FALSE
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gBoardModuleTokenSpaceGuid.PcdFspBinGccBuildEnable|FALSE
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# Build scripts override the value of this PCD, update value in scripts for the change to take effect.
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gBoardModuleTokenSpaceGuid.PcdSetupEnable|TRUE
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gBoardModuleTokenSpaceGuid.PcdStartupAcmBinEnable|FALSE #StartupAcm.bin
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#
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# LiteBios related PCDs must be moved to LiteBios board package when it is created
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#
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gBoardModuleTokenSpaceGuid.PcdMicrocodeBinEnable|TRUE #Microcode
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gBoardModuleTokenSpaceGuid.PcdEcEnable|TRUE
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gBoardModuleTokenSpaceGuid.PcdSipkgBinaryEnable|FALSE
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gBoardModulePkgTokenSpaceGuid.PcdPs2KbMsEnable|0x01
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gBoardModulePkgTokenSpaceGuid.PcdSuperIoPciIsaBridgeDevice|{0x00, 0x00, 0x1F, 0x00}
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gBoardModulePkgTokenSpaceGuid.PcdUart1Enable|0x01
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gBoardModulePkgTokenSpaceGuid.PcdUart1IrqMask|0x0010
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gBoardModulePkgTokenSpaceGuid.PcdUart1IoPort|0x03F8
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gBoardModulePkgTokenSpaceGuid.PcdUart1Length|0x08
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gPlatformModuleTokenSpaceGuid.PcdPlatformCmosAccessSupport|FALSE
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gPlatformModuleTokenSpaceGuid.PcdEnableSecureErase|FALSE
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gPlatformModuleTokenSpaceGuid.PcdDTbtEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdCapsuleEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdI2cTouchDriverEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdPiI2cStackEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdUsb3SerialStatusCodeEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdUserAuthenticationEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdPciHotplugEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdUsbTypeCEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdVirtualKeyboardEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdEbcEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdHddPasswordEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdNetworkEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdGigUndiEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdMouseEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdSinitAcmBinEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdAcmProdBinEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdScsiEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdJpgEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdUsbEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdNetworkIp6Enable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdNetworkIscsiEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdNetworkVlanEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdFatEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdCryptoEnable|FALSE # Current Smbios implementation needs this
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gPlatformModuleTokenSpaceGuid.PcdLzmaEnable|TRUE
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gPlatformModuleTokenSpaceGuid.PcdDxeCompressEnable|TRUE
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gPlatformModuleTokenSpaceGuid.PcdVtioEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdUserIdentificationEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdDnxSupportEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdUsbFnEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdH8S2113Present|FALSE
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gPlatformModuleTokenSpaceGuid.PcdNat87393Present|FALSE
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gPlatformModuleTokenSpaceGuid.PcdNct677FPresent|FALSE
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gPlatformModuleTokenSpaceGuid.PcdSkipFspTempRamInitAndExit|FALSE
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gPlatformModuleTokenSpaceGuid.PcdTdsEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdOpalPasswordEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdMemoryTestEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdTpmEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdBeepStatusCodeEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdPostCodeStatusCodeEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdDgrPolicyOverride|FALSE
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gPlatformModuleTokenSpaceGuid.PcdSymbolInReleaseEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdResiliencyEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdMeResiliencyEnable|FALSE
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gPlatformModuleTokenSpaceGuid.PcdRemotePlatformEraseSupport|FALSE
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gPlatformModuleTokenSpaceGuid.PcdExtendedBiosRegionSupport|FALSE
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## This flag is used to initialize debug output interface.
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# BIT0 - RAM debug interface.
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# BIT1 - UART debug interface.
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# BIT2 - USB debug interface.
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# BIT3 - USB3 debug interface.
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# BIT4 - Serial IO debug interface.
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# BIT5 - TraceHub debug interface.
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# BIT6 - Reserved.
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# BIT7 - CMOS control.
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gPlatformModuleTokenSpaceGuid.PcdStatusCodeFlags|0x32
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gPlatformModuleTokenSpaceGuid.PcdRamDebugEnable|TRUE
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#
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# BIOS build switches configuration
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#
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gPlatformModuleTokenSpaceGuid.PcdDeprecatedFunctionRemove|TRUE
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gPlatformModuleTokenSpaceGuid.PcdSerialPortEnable|TRUE
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gPlatformModuleTokenSpaceGuid.PcdGmAdrAddress|(gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress - 0x10000000) # 0xB0000000
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gPlatformModuleTokenSpaceGuid.PcdGttMmAddress|(gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress - 0x11000000) # 0xAF000000
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#
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# PlatformTemporaryMmioAssignmentBegin
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#
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# When gEfiPeiBootInRecoveryModePpiGuid is installed, below MMIO resource would be
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# temporarily assigned to NVME/AHCI host controller after FspSiInitDone and be released at EndOfPei.
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# Please take care of platform resource assignment to avoid conflicts.
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#
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gPlatformModuleTokenSpaceGuid.PcdAhciPeiMmioBase|(gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress - 0x30000000) # 0x90000000
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gPlatformModuleTokenSpaceGuid.PcdAhciPeiMmioLimit|(gPlatformModuleTokenSpaceGuid.PcdAhciPeiMmioBase + 0x1000000) # 0x91000000
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gPlatformModuleTokenSpaceGuid.PcdNvmeHcPeiMmioBase|(gPlatformModuleTokenSpaceGuid.PcdAhciPeiMmioLimit) # 0x91000000
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gPlatformModuleTokenSpaceGuid.PcdNvmeHcPeiMmioLimit|(gPlatformModuleTokenSpaceGuid.PcdNvmeHcPeiMmioBase + 0x1000000) # 0x92000000
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# The bit width of data to be written to Port80 set to 16
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gEfiMdePkgTokenSpaceGuid.PcdPort80DataWidth|16
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gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor|L"Intel"
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# Change PcdBootManagerMenuFile to point to UiApp
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gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x8b, 0x7d, 0x9a, 0xd8, 0x16, 0xd0, 0x26, 0x4d, 0x93, 0xe3, 0xea, 0xb6, 0xb4, 0xd3, 0xb0, 0xa2 }
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# Do not support output status code to memory
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gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxPeiStackSize|0x80000
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gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x10000
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gEfiMdeModulePkgTokenSpaceGuid.PcdHwErrStorageSize|0x00000800
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gEfiMdeModulePkgTokenSpaceGuid.PcdMaxHardwareErrorVariableSize|0x400
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gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport|FALSE
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gEfiMdeModulePkgTokenSpaceGuid.PcdLoadModuleAtFixAddressEnable|$(TOP_MEMORY_ADDRESS)
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gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserSubtitleTextColor|0x0
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gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserFieldTextColor|0x01
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gEfiMdeModulePkgTokenSpaceGuid.PcdReclaimVariableSpaceAtEndOfDxe|TRUE
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#
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# Telemetry Feature PCDs
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#
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## Major Version from EDKII.
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gTelemetryTokenSpaceGuid.PcdEDKIIVersionMajor|0xFF
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## Minor Version from EDKII.
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gTelemetryTokenSpaceGuid.PcdEDKIIVersionMinor|0xFF
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## Revision from EDKII.
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gTelemetryTokenSpaceGuid.PcdEDKIIVersionRevision|0xFF
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## Build Number from EDKII.
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gTelemetryTokenSpaceGuid.PcdEDKIIVersionBuild|0xFF
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# gino: need to update EDK2 >>
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#
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# Crypto Modulization
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#
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## Crypto Modulization Feature Enabling
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gBoardModuleTokenSpaceGuid.PcdModularCryptoEnable|FALSE
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## Crypto Modulization Scope
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#gEfiCryptoPkgTokenSpaceGuid.PcdCryptoServiceFamilyEnable.HmacMd5.Family | FALSE
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#gEfiCryptoPkgTokenSpaceGuid.PcdCryptoServiceFamilyEnable.HmacSha1.Family | FALSE
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#gEfiCryptoPkgTokenSpaceGuid.PcdCryptoServiceFamilyEnable.HmacSha256.Family | FALSE
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#gEfiCryptoPkgTokenSpaceGuid.PcdCryptoServiceFamilyEnable.Md4.Family | FALSE
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#gEfiCryptoPkgTokenSpaceGuid.PcdCryptoServiceFamilyEnable.Md5.Family | FALSE
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#gEfiCryptoPkgTokenSpaceGuid.PcdCryptoServiceFamilyEnable.Pkcs.Family | FALSE
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#gEfiCryptoPkgTokenSpaceGuid.PcdCryptoServiceFamilyEnable.Dh.Family | FALSE
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#gEfiCryptoPkgTokenSpaceGuid.PcdCryptoServiceFamilyEnable.Random.Family | FALSE
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#gEfiCryptoPkgTokenSpaceGuid.PcdCryptoServiceFamilyEnable.Rsa.Family | FALSE
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#gEfiCryptoPkgTokenSpaceGuid.PcdCryptoServiceFamilyEnable.Sha1.Family | FALSE
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#gEfiCryptoPkgTokenSpaceGuid.PcdCryptoServiceFamilyEnable.Sha256.Family | FALSE
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#gEfiCryptoPkgTokenSpaceGuid.PcdCryptoServiceFamilyEnable.Sha384.Family | FALSE
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#gEfiCryptoPkgTokenSpaceGuid.PcdCryptoServiceFamilyEnable.Sha512.Family | FALSE
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#gEfiCryptoPkgTokenSpaceGuid.PcdCryptoServiceFamilyEnable.X509.Family | FALSE
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#gEfiCryptoPkgTokenSpaceGuid.PcdCryptoServiceFamilyEnable.Tdes.Family | FALSE
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#gEfiCryptoPkgTokenSpaceGuid.PcdCryptoServiceFamilyEnable.Aes.Family | FALSE
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#gEfiCryptoPkgTokenSpaceGuid.PcdCryptoServiceFamilyEnable.Arc4.Family | FALSE
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#gEfiCryptoPkgTokenSpaceGuid.PcdCryptoServiceFamilyEnable.Sm3.Family | FALSE
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#gEfiCryptoPkgTokenSpaceGuid.PcdCryptoServiceFamilyEnable.Hkdf.Family | FALSE
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#gEfiCryptoPkgTokenSpaceGuid.PcdCryptoServiceFamilyEnable.Tls.Family | FALSE
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#gEfiCryptoPkgTokenSpaceGuid.PcdCryptoServiceFamilyEnable.TlsSet.Family | FALSE
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#gEfiCryptoPkgTokenSpaceGuid.PcdCryptoServiceFamilyEnable.TlsGet.Family | FALSE
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# gino: need to update EDK2 <<
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gNhltFeaturePkgTokenSpaceGuid.NhltConfigurationByPcdEnabled|FALSE
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!if gXmlCliFeaturePkgTokenSpaceGuid.PcdXmlCliFeatureEnable == TRUE
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# Set Pcd Value to Client Platform, Refer README for more valid options
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gXmlCliFeaturePkgTokenSpaceGuid.PcdPlatformXmlCli|0x1
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# XmlCli Feature Package Token Space defining Setup Values
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|
gXmlCliFeaturePkgTokenSpaceGuid.PcdXmlCliSupport|0x0
|
|
gXmlCliFeaturePkgTokenSpaceGuid.PcdPublishSetupPgPtr|0x1
|
|
gXmlCliFeaturePkgTokenSpaceGuid.PcdEnableXmlCliLite|0x0
|
|
!endif
|
|
|
|
## Specifies the number of variable MTRRs reserved for OS use. The default number of
|
|
# MTRRs reserved for OS use is 0.
|
|
# @Prompt Number of reserved variable MTRRs.
|
|
gUefiCpuPkgTokenSpaceGuid.PcdCpuNumberOfReservedVariableMtrrs|0x0
|
|
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|10000
|
|
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x20000
|
|
|
|
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBusNumber|0x0
|
|
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciDeviceNumber|0x1F
|
|
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciFunctionNumber|0x2
|
|
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciEnableRegisterOffset|0x44
|
|
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoBarEnableMask|0x80
|
|
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBarRegisterOffset|0x00
|
|
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddress|0x1800
|
|
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiPm1TmrOffset|0x08
|
|
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddressMask|0xFFFC
|
|
|
|
gMinPlatformPkgTokenSpaceGuid.PcdFspDispatchModeUseFspPeiMain|TRUE
|
|
|
|
#[-start-191111-IB10189001-modify]#
|
|
# gino: kernel issue, this is W/A
|
|
[PcdsFixedAtBuild]
|
|
gMinPlatformPkgTokenSpaceGuid.PcdPeiPhaseStackTop|0xA0000
|
|
|
|
[PcdsFixedAtBuild.IA32]
|
|
gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0
|
|
# gMinPlatformPkgTokenSpaceGuid.PcdPeiPhaseStackTop|0xA0000
|
|
#[-end-191111-IB10189001-modify]#
|
|
|
|
[PcdsFixedAtBuild.X64]
|
|
|
|
# Default platform supported RFC 4646 languages: (American) English
|
|
gEfiMdePkgTokenSpaceGuid.PcdUefiVariableDefaultPlatformLangCodes|"en-US"
|
|
|
|
[PcdsPatchableInModule]
|
|
#[-start-191111-IB10189001-remove]#
|
|
# Insyde had defined this pcd
|
|
# gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0304
|
|
#[-end-191111-IB10189001-remove]#
|
|
gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000046
|
|
|
|
[PcdsDynamicHii.common.DEFAULT]
|
|
gPlatformModuleTokenSpaceGuid.PcdPlatformMemoryCheck|L"MemoryCheck"|gPlatformModuleTokenSpaceGuid|0x0|0
|
|
gPlatformModuleTokenSpaceGuid.PcdComPortAttributes0IsEnabled|L"ComAttributes"|gSetupVariableGuid|0x16|0
|
|
gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|L"ComAttributes"|gSetupVariableGuid|0x13|0
|
|
gEfiSecurityPkgTokenSpaceGuid.PcdTpm2AcpiTableRev|L"TCG2_VERSION"|gTcg2ConfigFormSetGuid|0x8|4|NV,BS
|
|
gPlatformModuleTokenSpaceGuid.PcdFastBootEnable|L"Setup"|gSetupVariableGuid|0x0|0
|
|
gPlatformModuleTokenSpaceGuid.PcdSystemFirmwareFmpSupportedMode|L"SysFmpMode"|gSysFwUpdateProgressGuid|0x0|0xFF|NV,BS
|
|
|
|
[PcdsDynamicHii.X64.DEFAULT]
|
|
gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5 # Variable: L"Timeout"
|
|
gEfiMdeModulePkgTokenSpaceGuid.PcdSetupConOutColumn|L"ConOutConfig"|gPlatformModuleTokenSpaceGuid|0x0|100
|
|
gEfiMdeModulePkgTokenSpaceGuid.PcdSetupConOutRow|L"ConOutConfig"|gPlatformModuleTokenSpaceGuid|0x4|31
|
|
gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupport"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport"
|
|
|
|
[PcdsDynamicDefault]
|
|
gEfiSecurityPkgTokenSpaceGuid.PcdCRBIdleByPass|0xFF
|
|
## This PCD defines initial setting of TCG2 Persistent Firmware Management Flags
|
|
# Currently enabled flags:
|
|
# TCG2_BIOS_TPM_MANAGEMENT_FLAG_PP_REQUIRED_FOR_TURN_OFF (BIT5)
|
|
# TCG2_BIOS_TPM_MANAGEMENT_FLAG_PP_REQUIRED_FOR_CHANGE_EPS (BIT6)
|
|
# TCG2_BIOS_TPM_MANAGEMENT_FLAG_PP_REQUIRED_FOR_CHANGE_PCRS (BIT7)
|
|
# TCG2_BIOS_STORAGE_MANAGEMENT_FLAG_PP_REQUIRED_FOR_DISABLE_BLOCK_SID (BIT17)
|
|
# @Prompt Initial setting of TCG2 Persistent Firmware Management Flags
|
|
gEfiSecurityPkgTokenSpaceGuid.PcdTcg2PhysicalPresenceFlags|0x200E0
|
|
gEfiSecurityPkgTokenSpaceGuid.PcdTpm2CurrentIrqNum|0x00
|
|
|
|
gEfiSecurityPkgTokenSpaceGuid.PcdSkipOpalPasswordPrompt|FALSE
|
|
|
|
gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSupport|FALSE
|
|
gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|0x0
|
|
gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|0x0
|
|
gEfiMdeModulePkgTokenSpaceGuid.PcdAtaSmartEnable|TRUE
|
|
gEfiMdeModulePkgTokenSpaceGuid.PcdConInConnectOnDemand|FALSE
|
|
#
|
|
# Set video to native resolution as Windows 8 WHCK requirement.
|
|
#
|
|
gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0x0
|
|
gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0x0
|
|
## This is recover file name in PEI phase.
|
|
# The file must be in the root directory.
|
|
# The file name must be the 8.3 format.
|
|
# The PCD data must be in UNICODE format.
|
|
# @Prompt Recover file name in PEI phase
|
|
gEfiMdeModulePkgTokenSpaceGuid.PcdRecoveryFileName|L"Capsule.cap"|VOID*|0x20
|
|
## Default OEM Table ID for ACPI table creation, it is "EDK2 ".
|
|
# According to ACPI specification, this field is particularly useful when
|
|
# defining a definition block to distinguish definition block functions.
|
|
# The OEM assigns each dissimilar table a new OEM Table ID.
|
|
# This PCD is ignored for definition block.
|
|
# @Prompt Default OEM Table ID for ACPI table creation.
|
|
# default set to "ICL ", will be patched by AcpiPlatform per CPU family
|
|
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId|0x20202020204C4349
|
|
|
|
gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBBase|0xFFFFFFFFFFFFFFFF
|
|
gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBLimit|0x0000000000000000
|
|
gMinPlatformPkgTokenSpaceGuid.PcdPciSegmentCount|0x1
|
|
|
|
gPlatformModuleTokenSpaceGuid.PcdTopSwapEnableSwSmi|0xFF
|
|
gPlatformModuleTokenSpaceGuid.PcdTopSwapDisableSwSmi|0xFF
|
|
gPlatformModuleTokenSpaceGuid.PcdPostIbbVerificationEnable|TRUE
|
|
|
|
gSiPkgTokenSpaceGuid.PcdAcpiDefaultOemTableId|0x20202020204C4349
|
|
|
|
gEfiSecurityPkgTokenSpaceGuid.PcdFirmwareDebuggerInitialized|FALSE
|
|
gEfiSecurityPkgTokenSpaceGuid.PcdSkipHddPasswordPrompt|FALSE
|
|
gEfiSecurityPkgTokenSpaceGuid.PcdSkipOpalPasswordPrompt|FALSE
|
|
|
|
gBoardModuleTokenSpaceGuid.PcdUsbcEcPdNegotiation|TRUE
|
|
|
|
|
|
## The mask is used to control VTd behavior.<BR><BR>
|
|
# BIT0: Enable IOMMU during boot (If DMAR table is installed in DXE. If VTD_INFO_PPI is installed in PEI.)
|
|
# BIT1: Enable IOMMU when transfer control to OS (ExitBootService in normal boot. EndOfPEI in S3)
|
|
# @Prompt The policy for VTd driver behavior.
|
|
gIntelSiliconPkgTokenSpaceGuid.PcdVTdPolicyPropertyMask|0x00000000
|
|
|
|
gPlatformModuleTokenSpaceGuid.PcdVTdDisablePeiPmrProtection|FALSE
|
|
|
|
## Enable PCIe Resizable BAR Capability Support.
|
|
gEfiMdeModulePkgTokenSpaceGuid.PcdPcieResizableBarSupport|FALSE
|
|
|
|
[PcdsDynamicExDefault]
|
|
gEfiMdeModulePkgTokenSpaceGuid.PcdS3BootScriptTablePrivateDataPtr|0x0
|
|
gEfiMdeModulePkgTokenSpaceGuid.PcdFastPS2Detection|FALSE
|
|
|
|
gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000
|
|
#
|
|
# Some of the PCD consumed by both FSP and bootloader should be defined
|
|
# here for bootloader to consume.
|
|
#
|
|
|
|
gBoardModuleTokenSpaceGuid.PcdBoardGpioTablePreMem|{0x0}
|
|
gBoardModuleTokenSpaceGuid.PcdBoardGpioTablePreMem.GpioConfig[60].GpioPad|0x0
|
|
gBoardModuleTokenSpaceGuid.PcdBoardGpioTable|{0x0}
|
|
gBoardModuleTokenSpaceGuid.PcdBoardGpioTable.GpioConfig[130].GpioPad|0x0
|
|
gBoardModuleTokenSpaceGuid.PcdBoardGpioTableEarlyPreMem|{0x0}
|
|
gBoardModuleTokenSpaceGuid.PcdBoardGpioTableEarlyPreMem.GpioConfig[40].GpioPad|0x0
|
|
gBoardModuleTokenSpaceGuid.PcdBoardAcpiData|{0x0}
|
|
|
|
|
|
[PcdsDynamicExVpd.common.DEFAULT]
|
|
gBoardModuleTokenSpaceGuid.VpdPcdBoardGpioTablePreMem| * |{CODE({
|
|
{0x0} // terminator
|
|
})}
|
|
|
|
gBoardModuleTokenSpaceGuid.VpdPcdBoardGpioTable| * |{CODE({
|
|
{0x0} // terminator
|
|
})}
|
|
|
|
gBoardModuleTokenSpaceGuid.VpdPcdPcieClkUsageMap| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
|
|
gBoardModuleTokenSpaceGuid.VpdPcdUSB2OCMap| * |{CODE(
|
|
{ 16,
|
|
{ USB_OC_SKIP, // Port 1
|
|
USB_OC_SKIP, // Port 2
|
|
USB_OC_SKIP, // Port 3
|
|
USB_OC_SKIP, // Port 4
|
|
USB_OC_SKIP, // Port 5
|
|
USB_OC_SKIP, // Port 6
|
|
USB_OC_SKIP, // Port 7
|
|
USB_OC_SKIP, // Port 8
|
|
USB_OC_SKIP, // Port 9
|
|
USB_OC_SKIP, // Port 10
|
|
USB_OC_SKIP, // Port 11
|
|
USB_OC_SKIP, // Port 12
|
|
USB_OC_SKIP, // Port 13
|
|
USB_OC_SKIP, // Port 14
|
|
USB_OC_SKIP, // Port 15
|
|
USB_OC_SKIP } // Port 16
|
|
})}
|
|
|
|
gBoardModuleTokenSpaceGuid.VpdPcdUSB3OCMap| * |{CODE(
|
|
{ 10,
|
|
{ USB_OC_SKIP, // Port 1
|
|
USB_OC_SKIP, // Port 2
|
|
USB_OC_SKIP, // Port 3
|
|
USB_OC_SKIP, // Port 4
|
|
USB_OC_SKIP, // Port 5
|
|
USB_OC_SKIP, // Port 6
|
|
USB_OC_SKIP, // Port 7
|
|
USB_OC_SKIP, // Port 8
|
|
USB_OC_SKIP, // Port 9
|
|
USB_OC_SKIP } // Port 10
|
|
})}
|
|
|
|
!if gSiPkgTokenSpaceGuid.PcdAdlLpSupport == TRUE
|
|
gBoardModuleTokenSpaceGuid.VpdPcdMrcSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
|
|
gBoardModuleTokenSpaceGuid.VpdPcdMrcDqsMapCpu2Dram| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
|
|
#[-start-210526-KEBIN00005-modify]#
|
|
!if $(C970_SUPPORT_ENABLE) == YES
|
|
gBoardModuleTokenSpaceGuid.Yogac970MO1Q1R16GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
!endif
|
|
#[-end-210526-KEBIN00005-modify]#
|
|
#[-start-210519-KEBIN00001-modify]#
|
|
!if $(C970_SUPPORT_ENABLE) == YES
|
|
gBoardModuleTokenSpaceGuid.Yogac970MO1Q2R16GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.Yogac970MO1D1R8GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.Yogac970MO2O2R32GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.YogaC9VpdPcdMrcDqsMapCpu2Dram| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
|
|
gBoardModuleTokenSpaceGuid.YogaC9VpdPcdMrcDqMapCpu2Dram| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
!endif
|
|
#[-end-210519-KEBIN00001-modify]#
|
|
#[-start-210702-YUNLEI0109-add]
|
|
!if $(C970_SUPPORT_ENABLE) == YES
|
|
gBoardModuleTokenSpaceGuid.Yogac970Samsung16GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.Yogac970hynix16GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.Yogac970hynix8GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
!endif
|
|
#[-end-210702-YUNLEI0109-add]
|
|
|
|
#[-start-210910-QINGLIN0060-add]#
|
|
!if ($(S370_SUPPORT_ENABLE) == YES) OR ($(S570_SUPPORT_ENABLE) == YES)
|
|
gBoardModuleTokenSpaceGuid.DDR4Samsung4GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.DDR4Samsung8GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.DDR4Hynix4GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.DDR4Hynix8GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.DDR4Micron4GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.DDR4Micron8GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.DDR4NullSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
!endif
|
|
#[-start-211230-QINGLIN0140-modify]#
|
|
!if ($(S570_SUPPORT_ENABLE) == YES) OR ($(S370_SUPPORT_ENABLE) == YES)
|
|
#[-end-211230-QINGLIN0140-modify]#
|
|
gBoardModuleTokenSpaceGuid.DDR4Micron8G2ndSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
!endif
|
|
#[-end-210910-QINGLIN0060-add]#
|
|
#[-start-211228-QINGLIN0136-add]#
|
|
!if ($(S370_SUPPORT_ENABLE) == YES)
|
|
gBoardModuleTokenSpaceGuid.DDR4Smart4GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.DDR4Adata4GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
|
|
gBoardModuleTokenSpaceGuid.DDR4Micron8G170SpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.DDR4Smart8G170SpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
!endif
|
|
#[-end-211228-QINGLIN0136-add]#
|
|
|
|
#[start-210720-STORM1100-modify]#
|
|
!if $(C770_SUPPORT_ENABLE) == YES
|
|
|
|
gBoardModuleTokenSpaceGuid.VpdC770DISPcdPcieClkUsageMap| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
|
|
gBoardModuleTokenSpaceGuid.VpdC770UMAPcdPcieClkUsageMap| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
|
|
gBoardModuleTokenSpaceGuid.YogaC716VpdPcdMrcDqsMapCpu2Dram| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
|
|
gBoardModuleTokenSpaceGuid.YogaC714VpdPcdMrcDqsMapCpu2Dram| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
|
|
gBoardModuleTokenSpaceGuid.YogaC716VpdPcdMrcDqMapCpu2Dram| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
|
|
gBoardModuleTokenSpaceGuid.YogaC714VpdPcdMrcDqMapCpu2Dram| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
|
|
|
|
#[-start-210726-YUNLEI0113-modify]
|
|
gBoardModuleTokenSpaceGuid.Yogac970MO1Q2R16GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.Yogac970MO1D1R8GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.Yogac970MO2O2R32GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.Yogac970Samsung16GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.Yogac970hynix16GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.Yogac970hynix8GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.Yogac770Samsung32GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.Yogac770hynix32GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
|
|
#[-end-210726-YUNLEI0113-modify]
|
|
|
|
|
|
!endif
|
|
# end C770_SUPPORT_ENABLE
|
|
#[end-210720-STORM1100-modify]#
|
|
|
|
#[-start-210817-DABING0002-modify]#
|
|
!if ($(S77014_SUPPORT_ENABLE) == YES) OR ($(S77014IAH_SUPPORT_ENABLE) == YES)
|
|
#[-start-210825-TAMT000002-add]#
|
|
#[-start-210927-TAMT000015-add]#
|
|
gBoardModuleTokenSpaceGuid.VpdS77014DISPcdPcieClkUsageMap| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
|
|
gBoardModuleTokenSpaceGuid.VpdS77014UMAPcdPcieClkUsageMap| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
#[-end-210927-TAMT000015-add]#
|
|
#[-start-210831-TAMT000005-add]#
|
|
gBoardModuleTokenSpaceGuid.S77014VpdPcdMrcDqsMapCpu2Dram| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
|
|
gBoardModuleTokenSpaceGuid.S77014VpdPcdMrcDqMapCpu2Dram| * |{CODE(
|
|
{0x0}
|
|
#[-end-210831-TAMT000005-add]#
|
|
|
|
gBoardModuleTokenSpaceGuid.Yogac970MO1Q2R16GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.Yogac970MO1D1R8GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.Yogac970Samsung16GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.Yogac970hynix16GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.Yogac970hynix8GSpdData| * |{CODE(
|
|
#[-end-210825-TAMT000002-add]#
|
|
{0x0}
|
|
)}
|
|
!endif
|
|
#[-end-210817-DABING0002-modify]#
|
|
|
|
#[-start-210914-DABING0006-modify]#
|
|
!if $(S77013_SUPPORT_ENABLE) == YES
|
|
gBoardModuleTokenSpaceGuid.S77013VpdPcdMrcDqsMapCpu2Dram| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.S77013VpdPcdMrcDqMapCpu2Dram| * |{CODE(
|
|
{0x0}
|
|
|
|
gBoardModuleTokenSpaceGuid.Yogac970MO1Q2R16GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.Yogac970MO1D1R8GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.Yogac970Samsung16GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.Yogac970hynix16GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
gBoardModuleTokenSpaceGuid.Yogac970hynix8GSpdData| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
!endif
|
|
#[-end-210914-DABING0006-modify]#
|
|
|
|
gBoardModuleTokenSpaceGuid.VpdPcdMrcDqMapCpu2Dram| * |{CODE(
|
|
{0x0}
|
|
)}
|
|
|
|
gBoardModuleTokenSpaceGuid.VpdPcdCpuUsb3OcMap| * |{CODE(
|
|
{ 6,
|
|
{ USB_OC_SKIP, // Port 1
|
|
USB_OC_SKIP, // Port 2
|
|
USB_OC_SKIP, // Port 3
|
|
USB_OC_SKIP, // Port 4
|
|
USB_OC_SKIP, // Port 5
|
|
USB_OC_SKIP } // Port 6
|
|
})}
|
|
!endif
|
|
|
|
gBoardModuleTokenSpaceGuid.VpdPcdPmaxDevices| * |{CODE(
|
|
{{
|
|
{
|
|
"\\_SB.PC00.HDAS" // Realtek codec device string
|
|
},
|
|
0xBB8, // D0 peak power in mW
|
|
0x00 // Dx peak power in mW
|
|
},
|
|
{
|
|
{
|
|
"\\_SB.PC00.LNK0" // WF Camera string
|
|
},
|
|
0x32A, // D0 peak power in mW without accounting for flash
|
|
0x00 // Dx peak power in mW
|
|
},
|
|
{
|
|
{
|
|
"\\_SB.PC00.LNK1" // UF Camera string
|
|
},
|
|
0x33E, // D0 peak power in mW without accounting for flash
|
|
0x00 // Dx peak power in mW
|
|
},
|
|
{
|
|
{
|
|
"\\_SB.PC00.FLM0" // Flash device string
|
|
},
|
|
0x2328, // D0 peak power in mW
|
|
0x00 // Dx peak power in mW
|
|
}
|
|
})}
|
|
|
|
!if gSiPkgTokenSpaceGuid.PcdAdlLpSupport == TRUE
|
|
## Update in SKU dsc file like below for changing the value as per Board
|
|
## [PcdsDynamicExVpd.common.SkuIdAdlMLp4Rvp]
|
|
## gBoardModuleTokenSpaceGuid.PcdClwlI2cController|*|{'1'}
|
|
## gBoardModuleTokenSpaceGuid.PcdClwlI2cSlaveAddress|*|{0x23}
|
|
gBoardModuleTokenSpaceGuid.PcdClwlI2cController|*|{'0'}
|
|
gBoardModuleTokenSpaceGuid.PcdClwlI2cSlaveAddress|*|{0x14}
|
|
!endif
|