184 lines
6.2 KiB
C
184 lines
6.2 KiB
C
/** @file
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USB2 PHY tuning tables
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@copyright
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Copyright (c) 2018 Intel Corporation. All rights reserved
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This software and associated documentation (if any) is furnished
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under a license and may only be used or copied in accordance
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with the terms of the license. Except as permitted by such
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license, no part of this software or documentation may be
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reproduced, stored in a retrieval system, or transmitted in any
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form or by any means without the express written consent of
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Intel Corporation.
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This file contains an 'Intel Peripheral Driver' and is
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licensed for Intel CPUs and chipsets under the terms of your
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license agreement with Intel or your vendor. This file may
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be modified by the user, subject to additional terms of the
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license agreement.
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**/
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#include <PlatformBoardConfig.h>
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//
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// Default USB2 PHY tuning parameters based on EV recommendations
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//
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//[-start-210617-KEBIN00014-modify]//
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#ifdef LCFC_SUPPORT
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#ifdef C970_SUPPORT
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USB2_PHY_TABLE mUsb2PhyTuningTable = USB2_PHY_TABLE_INIT (
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 1
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 2
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 3
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{ 0x7, 0x7, 0x3, 0x0 }, // Port 4
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 5
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 6
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 7
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 8
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 9
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 10
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 11
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 12
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 13
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 14
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 15
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{ 0x6, 0x0, 0x3, 0x0 } // Port 16
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);
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#endif
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//[start-210720-STORM1100-modify]//
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#ifdef C770_SUPPORT
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USB2_PHY_TABLE mUsb2PhyTuningTable = USB2_PHY_TABLE_INIT (
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 1
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 2
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 3
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{ 0x7, 0x7, 0x3, 0x0 }, // Port 4
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 5
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 6
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 7
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 8
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 9
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 10
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 11
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 12
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 13
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 14
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 15
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{ 0x6, 0x0, 0x3, 0x0 } // Port 16
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);
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#endif
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//[end-210720-STORM1100-modify]//
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//[-start-210924-JAYAN00000-modify]//
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//[-start-210817-DABING0002-modify]//
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#if defined(S77014_SUPPORT) || defined(S77014IAH_SUPPORT)
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USB2_PHY_TABLE mUsb2PhyTuningTable = USB2_PHY_TABLE_INIT (
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 1
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 2
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 3
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{ 0x7, 0x7, 0x3, 0x0 }, // Port 4
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 5
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 6
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 7
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 8
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{ 0x7, 0x5, 0x3, 0x0 }, // Port 9
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 10
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 11
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 12
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 13
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 14
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 15
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{ 0x6, 0x0, 0x3, 0x0 } // Port 16
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);
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#endif
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//[-end-210817-DABING0002-modify]//
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//[-end-210924-JAYAN00000-modify]//
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//[-start-210914-DABING0006-modify]//
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#ifdef S77013_SUPPORT
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USB2_PHY_TABLE mUsb2PhyTuningTable = USB2_PHY_TABLE_INIT (
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 1
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 2
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 3
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{ 0x7, 0x7, 0x3, 0x0 }, // Port 4
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 5
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 6
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 7
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 8
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 9
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 10
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 11
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 12
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 13
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 14
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 15
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{ 0x6, 0x0, 0x3, 0x0 } // Port 16
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);
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#endif
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//[-start-210914-DABING0006-modify]//
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//[-start-210721-QINGLIN0001-add]//
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#ifdef S570_SUPPORT
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USB2_PHY_TABLE mUsb2PhyTuningTable = USB2_PHY_TABLE_INIT (
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 1
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 2
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 3
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 4
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 5
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 6
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 7
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 8
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 9
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 10
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 11
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 12
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 13
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 14
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 15
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{ 0x6, 0x0, 0x3, 0x0 } // Port 16
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);
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#endif
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//[-end-210721-QINGLIN0001-add]//
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//[-start-210803-QINGLIN0008-add]//
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#ifdef S370_SUPPORT
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USB2_PHY_TABLE mUsb2PhyTuningTable = USB2_PHY_TABLE_INIT (
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 1
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 2
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 3
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 4
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 5
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 6
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 7
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 8
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 9
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 10
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 11
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 12
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 13
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 14
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 15
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{ 0x6, 0x0, 0x3, 0x0 } // Port 16
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);
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#endif
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//[-end-210803-QINGLIN0008-add]//
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#else
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USB2_PHY_TABLE mUsb2PhyTuningTable = USB2_PHY_TABLE_INIT (
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 1
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 2
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 3
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 4
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 5
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 6
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 7
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 8
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 9
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 10
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 11
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 12
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 13
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 14
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{ 0x6, 0x0, 0x3, 0x0 }, // Port 15
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{ 0x6, 0x0, 0x3, 0x0 } // Port 16
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);
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#endif
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//[-end-210617-KEBIN00014-modify]//
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