143 lines
4.8 KiB
C
143 lines
4.8 KiB
C
/** @file
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Provide BIOS region lock protocol to protect BIOS region
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;******************************************************************************
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;* Copyright (c) 2014 - 2020, Insyde Software Corporation. All Rights Reserved.
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;*
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;* You may not reproduce, distribute, publish, display, perform, modify, adapt,
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;* transmit, broadcast, present, recite, release, license or otherwise exploit
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;* any part of this publication in any form, by any means, without the prior
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;* written permission of Insyde Software Corporation.
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;*
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;******************************************************************************
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*/
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#include <Uefi.h>
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#include <ChipsetAccess.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Library/IoLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/DebugLib.h>
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#include <Library/UefiLib.h>
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#include <Library/S3BootScriptLib.h>
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#include "BiosRegionLockInfo.h"
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#include <Library/MmPciLib.h>
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#include <Register/PchRegs.h>
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#include <Register/SpiRegs.h>
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//[-start-191225-IB16740000-add]// for PCI_DEVICE_NUMBER_PCH_LPC & PCI_FUNCTION_NUMBER_PCH_XHCI define
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#include <PchBdfAssignment.h>
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//[-end-191225-IB16740000-add]//
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#include <PchReservedResources.h>
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#include <Protocol/PciEnumerationComplete.h>
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VOID
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EFIAPI
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RestorePchSpiBar0 (
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IN EFI_EVENT Event,
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IN VOID *Context
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)
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{
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UINT32 PchSpiBar0;
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UINT64 BootScriptPciAddress;
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PchSpiBar0 = PCH_SPI_BASE_ADDRESS;
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BootScriptPciAddress = S3_BOOT_SCRIPT_LIB_PCI_ADDRESS (
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0,
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31,
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5,
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R_SPI_CFG_BAR0
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);
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S3BootScriptSavePciCfgWrite (
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S3BootScriptWidthUint32,
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BootScriptPciAddress,
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1,
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&PchSpiBar0
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);
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DEBUG ((DEBUG_INFO, "S3BootScriptSavePciCfgWrite RestorePchSpiBar0 BootScriptPciAddress = 0x%08x, PchSpiBar0 = 0x%08x\n", (UINT32)BootScriptPciAddress, (UINT32)PchSpiBar0));
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}
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/**
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Entry point for Bios Region Lock driver. Install BIOS region lock protocol to protect BIOS region.
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@param[in] ImageHandle Image handle of this driver.
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@param[in] SystemTable Global system service table.
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@retval EFI_SUCCESS Initialization complete.
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*/
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EFI_STATUS
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EFIAPI
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BiosRegionLockInit (
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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)
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{
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EFI_HANDLE Handle;
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EFI_STATUS Status;
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BIOS_REGION_LOCK_INSTANCE *BiosRegionLockInstance;
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BIOS_REGION_LOCK_PROTOCOL *BiosRegionLock;
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UINTN PchSpiBase;
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UINTN PciSpiRegBase;
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VOID *Registration;
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PciSpiRegBase = MmPciBase (
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DEFAULT_PCI_BUS_NUMBER_PCH,
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PCI_DEVICE_NUMBER_PCH_SPI,
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PCI_FUNCTION_NUMBER_PCH_SPI
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);
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PchSpiBase = MmioRead32 (PciSpiRegBase + R_SPI_CFG_BAR0) &~(B_SPI_CFG_BAR0_MASK);
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if (MmioRead16 (PchSpiBase + R_SPI_MEM_HSFSC) & B_SPI_MEM_HSFSC_FLOCKDN) {
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DEBUG ((DEBUG_ERROR, "SPI has been locked - Access Denied!\n"));
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return EFI_DEVICE_ERROR;
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}
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BiosRegionLockInstance = AllocateZeroPool (sizeof (BIOS_REGION_LOCK_INSTANCE));
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if (BiosRegionLockInstance == NULL) {
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DEBUG ((DEBUG_ERROR, "Allocate Pool Failure!\n"));
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return EFI_OUT_OF_RESOURCES;
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}
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BiosRegionLock = &BiosRegionLockInstance->BiosRegionLock;
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BiosRegionLock->SetRegionByType = SetRegionByType;
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BiosRegionLock->SetRegionByAddress = SetRegionByAddress;
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BiosRegionLock->ClearRegionByType = ClearRegionByType;
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BiosRegionLock->ClearRegionByAddress = ClearRegionByAddress;
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BiosRegionLock->Lock = Lock;
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Handle = NULL;
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Status = gBS->InstallProtocolInterface (
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&Handle,
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&gEfiBiosRegionLockProtocolGuid,
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EFI_NATIVE_INTERFACE,
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BiosRegionLock
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);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "Install EfiBiosRegionLockProtocol Failure!\n"));
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gBS->FreePool (BiosRegionLockInstance);
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}
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//#ifdef EFI_DEBUG
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else {
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if (PcdGetBool (PcdStatusCodeUseSerial)) {
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DEBUG ((DEBUG_ERROR, "Install EfiBiosRegionLockProtocol Success!\n"));
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}
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}
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//#endif
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//
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// Only for the issue about Native FSP Build that S3script restores wrong Bar0 address during S3,
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// ITS:0081438
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//
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if (PcdGetBool(PcdNativeFspBuild)) {
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EfiCreateProtocolNotifyEvent (
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&gEfiPciEnumerationCompleteProtocolGuid,
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TPL_CALLBACK,
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RestorePchSpiBar0,
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NULL,
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&Registration
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);
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DEBUG ((DEBUG_INFO, "BiosRegionLockInit EfiCreateProtocolNotifyEvent by gEfiPciEnumerationCompleteProtocolGuid for RestorePchSpiBar0\n"));
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}
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return Status;
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}
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