299 lines
11 KiB
Plaintext
299 lines
11 KiB
Plaintext
/** @file
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;******************************************************************************
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;* Copyright (c) 2019, Insyde Software Corp. All Rights Reserved.
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;*
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;* You may not reproduce, distribute, publish, display, perform, modify, adapt,
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;* transmit, broadcast, present, recite, release, license or otherwise exploit
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;* any part of this publication in any form, by any means, without the prior
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;* written permission of Insyde Software Corporation.
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;*
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;******************************************************************************
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*/
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SCOPE (IGPU_SCOPE)
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{
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Method (SSNR, 1, Serialized)
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{
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Switch (ToInteger (Arg0))
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{
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case (VEN_SENSOR_HEADER_STRUC)
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{
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// Ventura Sensor parameters header structure
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Name (SBHS, Buffer(0x8) {})
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CreateDWordField (SBHS, 0, VERV)
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CreateDWordField (SBHS, 4, NUMS)
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// Populate Header Structure
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Store (VEN_VERSION_HEADER, VERV)
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Store (VEN_NUM_SENSORS, NUMS)
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Return (SBHS)
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}
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case (VEN_SENSOR_CPU_STRUC)
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{
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// Ventura CPU Parameters Structure
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Name (SCPP, Buffer(76) {})
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CreateDWordField (SCPP, 0, VRV1)
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CreateDWordField (SCPP, 4, VCAP)
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CreateDWordField (SCPP, 8, VCCP)
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CreateDWordField (SCPP, 12, VCDP)
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CreateDWordField (SCPP, 16, VCEP)
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CreateDWordField (SCPP, 20, VCGP)
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CreateDWordField (SCPP, 24, VCHP)
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CreateDWordField (SCPP, 28, VCXP)
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CreateDWordField (SCPP, 32, VCYP)
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CreateDWordField (SCPP, 36, VCZP)
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CreateDWordField (SCPP, 40, VCKP)
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CreateDWordField (SCPP, 44, VCMP)
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CreateDWordField (SCPP, 48, VCNP)
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CreateDWordField (SCPP, 52, VCAL)
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CreateDWordField (SCPP, 56, VCBE)
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CreateDWordField (SCPP, 60, VCGA)
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CreateDWordField (SCPP, 64, VCPP)
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CreateDWordField (SCPP, 68, VCDE)
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Store (VEN_VERSION_CPU, VRV1)
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Store (VEN_CPU_PARAM_A, VCAP)
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Store (VEN_CPU_PARAM_C, VCCP)
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Store (VEN_CPU_PARAM_D, VCDP)
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Store (VEN_CPU_PARAM_E, VCEP)
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Store (VEN_CPU_PARAM_G, VCGP)
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Store (VEN_CPU_PARAM_H, VCHP)
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Store (VEN_CPU_PARAM_X, VCXP)
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Store (VEN_CPU_PARAM_Y, VCYP)
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Store (VEN_CPU_PARAM_Z, VCZP)
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Store (VEN_CPU_PARAM_K, VCKP)
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Store (VEN_CPU_PARAM_M, VCMP)
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Store (VEN_CPU_PARAM_N, VCNP)
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Store (VEN_CPU_PARAM_AL, VCAL)
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Store (VEN_CPU_PARAM_BE, VCBE)
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Store (VEN_CPU_PARAM_GA, VCGA)
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Store (VEN_CPU_PARAM_P, VCPP)
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Store (VEN_CPU_PARAM_DEL, VCDE)
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Return (SCPP)
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}
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case (VEN_SENSOR_GPU_STRUC)
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{
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// Ventura GPU Parameters Structure
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Name (SGPP, Buffer(40) {})
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CreateDWordField (SGPP, 0, VRV2)
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CreateDWordField (SGPP, 4, VGWP)
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CreateDWordField (SGPP, 8, VGPP)
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CreateDWordField (SGPP, 12, VGQP)
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CreateDWordField (SGPP, 16, VGRP)
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CreateDWordField (SGPP, 20, VGAP)
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CreateDWordField (SGPP, 24, VGBP)
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CreateDWordField (SGPP, 28, VGCP)
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CreateDWordField (SGPP, 32, VGDP)
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CreateDWordField (SGPP, 36, VGDE)
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Store (VEN_VERSION_GPU, VRV2)
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Store (VEN_GPU_PARAM_W, VGWP)
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Store (VEN_GPU_PARAM_P, VGPP)
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Store (VEN_GPU_PARAM_Q, VGQP)
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Store (VEN_GPU_PARAM_R, VGRP)
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Store (VEN_GPU_PARAM_A, VGAP)
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Store (VEN_GPU_PARAM_B, VGBP)
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Store (VEN_GPU_PARAM_C, VGCP)
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Store (VEN_GPU_PARAM_D, VGDP)
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Store (VEN_GPU_PARAM_DE, VGDE)
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Return (SGPP)
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}
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case (VEN_SENSOR_PARAM_STRUC)
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{
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// Ventura CPU Sensor structure
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Name (SSCP, Buffer(44) {})
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CreateDWordField (SSCP, 4, CSNT)
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CreateDWordField (SSCP, 8, CPTI)
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CreateDWordField (SSCP, 12, CICA)
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CreateDWordField (SSCP, 16, CIRC)
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CreateDWordField (SSCP, 20, CICV)
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CreateDWordField (SSCP, 24, CIRA)
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CreateDWordField (SSCP, 28, CIAV)
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CreateDWordField (SSCP, 32, CIEP)
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CreateDWordField (SSCP, 36, CPPF)
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CreateDWordField (SSCP, 40, CSNR)
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// Ventura GPU Sensor structure
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Name (SSGP, Buffer(44) {})
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CreateDWordField (SSGP, 4, GSNT)
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CreateDWordField (SSGP, 8, GPTI)
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CreateDWordField (SSGP, 12, GICA)
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CreateDWordField (SSGP, 16, GIRC)
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CreateDWordField (SSGP, 20, GICV)
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CreateDWordField (SSGP, 24, GIRA)
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CreateDWordField (SSGP, 28, GIAV)
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CreateDWordField (SSGP, 32, GIEP)
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CreateDWordField (SSGP, 36, GPPF)
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CreateDWordField (SSGP, 40, GSNR)
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// The below sensor parameter values for GPU and CPU
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// are board specific. To support for ventura, fill
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// the SSCP and SSGP structures
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// Populate CPU Sensor values
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Store (0x0, Index(SSCP, 0)) // Indicate CPU sensor
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Store (VENSNS_CPU_SENSOR_TYPE, CSNT)
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Store (VENSNS_CPU_I2C_PORT, CPTI)
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Store (VENSNS_CPU_I2C_ADDR, CICA)
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Store (VENSNS_CPU_INA219_CFG_LOC, CIRC)
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Store (VENSNS_CPU_INA219_CFG_VALUE, CICV)
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Store (VENSNS_CPU_INA219_CALIB_LOC, CIRA)
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Store (VENSNS_CPU_INA219_CALIB_VALUE, CIAV)
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Store (VENSNS_CPU_INA219_POWER_LOC, CIEP)
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Store (VENSNS_CPU_PMU_POLLING_FREQ, CPPF)
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Store (VENSNS_CPU_SENSE_RESISTOR, CSNR)
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// Populate GPU Sensor values
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Store (0x1, Index(SSGP, 0)) // Indicate GPU sensor
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Store (VENSNS_GPU_SENSOR_TYPE, GSNT)
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Store (VENSNS_GPU_I2C_PORT, GPTI)
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Store (VENSNS_GPU_I2C_ADDR, GICA)
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Store (VENSNS_GPU_INA219_CFG_LOC, GIRC)
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Store (VENSNS_GPU_INA219_CFG_VALUE, GICV)
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Store (VENSNS_GPU_INA219_CALIB_LOC, GIRA)
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Store (VENSNS_GPU_INA219_CALIB_VALUE, GIAV)
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Store (VENSNS_GPU_INA219_POWER_LOC, GIEP)
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Store (VENSNS_GPU_PMU_POLLING_FREQ, GPPF)
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Store (VENSNS_GPU_SENSE_RESISTOR, GSNR)
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Return (Concatenate (SSCP, SSGP))
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}
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}
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Return (STATUS_ERROR_UNSUPPORTED)
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}
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Name (VSTS, 1) // Ventura Status
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Name (TBUD, SPB_VEN_THERMAL_BUDGET) // Thermal Budget
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Name (PSCP, 0) // P-State capacity, mainly for s/w debugging
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Method (SPB, 4, Serialized)
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{
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// Only Interface Revision 0x0101 is supported
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If (LNotEqual (Arg1, 0x101))
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{
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Return (STATUS_ERROR_UNSUPPORTED) // Status Error Unsupported
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}
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// (Arg2) Sub-Function
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Switch (ToInteger (Arg2))
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{
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//
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// Function 0: SPB_FUNC_SUPPORT - Bit list of supported functions.
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//
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case (SPB_FUNC_SUPPORT)
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{
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// Sub Function 0, 32, 33, 34, 35, 42 are supported
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Return (Buffer(8) {0x01, 0x00, 0x00, 0x00, 0x0F, 0x04, 0x00, 0x00})
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}
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//
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// Function 32: SPB_FUNC_VENTURASTATUS
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//
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case (SPB_FUNC_VENTURASTATUS)
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{
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Store (TBUD, Local1)
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// failsafe to clear ventura status bit
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And (Local1, 0xFFFFF, Local1)
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// Just return SPB status for now (bit[0]=1 SPB enabled)
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If (CondRefOf (DGPU_SCOPE.PBCM, Local0)){ // Make sure this object is present.
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If (DGPU_SCOPE.PBCM){
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// Software/EC have another chance to disable ventura through VSTS
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If (LNotEqual (VSTS, 0)) {
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Or (Local1, 0x40000000, Local1)
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}
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}
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}
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Return (Local1)
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}
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//
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// Function 33: SPB_FUNC_GETPSS
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//
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case (SPB_FUNC_GETPSS)
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{
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Return (CPU0_SCOPE._PSS)
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}
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//
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// Function 34: SPB_FUNC_SETPPC
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//
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case (SPB_FUNC_SETPPC)
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{
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Name (MCHH, Zero)
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CreateByteField (Arg3, 0, PCAP)
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Store (PCAP, PSCP)
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If (LNotEqual (PCAP, CPU0_SCOPE._PPC))
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{
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If (LEqual (CPU0_SCOPE._PPC, Zero))
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{
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// Save IGPU Enhanced Perf Mode EN/DIS state
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// Disable IGPU Enhanced Perf Mode
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// Store (MMCH, MCHH)
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// Store (One, MMCH)
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}
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Else
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{
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If (LEqual (PCAP, Zero))
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{
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// Restore IGPU Enhanced Perf Mode EN/DIS state
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// Store (MCHH, MMCH)
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}
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}
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}
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// Store (PCAP, CPU0_SCOPE._PPC)
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Notify (CPU0_SCOPE, 0x80)
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If (CondRefOf (CPU1_SCOPE._PPC, Local0)) {
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// Store (PCAP, CPU1_SCOPE._PPC)
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Notify (CPU1_SCOPE, 0x80)
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}
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If (CondRefOf (CPU2_SCOPE._PPC, Local0)) {
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// Store (PCAP, CPU2_SCOPE._PPC)
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Notify (CPU2_SCOPE, 0x80)
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}
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If (CondRefOf (CPU3_SCOPE._PPC, Local0)) {
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// Store (PCAP, CPU3_SCOPE._PPC)
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Notify (CPU3_SCOPE, 0x80)
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}
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Return (PCAP)
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}
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//
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// Function 35: SPB_FUNC_GETPPC
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//
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case (SPB_FUNC_GETPPC)
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{
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Return (PSCP)
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}
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//
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// Function 36: SPB_FUNC_CALLBACK
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//
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case (SPB_FUNC_CALLBACK)
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{
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CreateField (Arg3, 0, 20, THBG)
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CreateField (Arg3, 30, 1, DDVE)
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Return (DGPU_SCOPE.PBCM)
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}
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//
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// Function 42: SPB_FUNC_SYSPARAMS
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//
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case (SPB_FUNC_SYSPARAMS)
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{
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Return (SSNR (Arg3))
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}
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} // end of switch
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Return (STATUS_ERROR_UNSUPPORTED) // Status Error Unsupported
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}
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}
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