308 lines
8.9 KiB
Plaintext
308 lines
8.9 KiB
Plaintext
/** @file
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;******************************************************************************
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;* Copyright (c) 2018 - 2021, Insyde Software Corp. All Rights Reserved.
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;*
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;* You may not reproduce, distribute, publish, display, perform, modify, adapt,
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;* transmit, broadcast, present, recite, release, license or otherwise exploit
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;* any part of this publication in any form, by any means, without the prior
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;* written permission of Insyde Software Corporation.
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;*
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;******************************************************************************
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*/
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/*
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== Readme ==
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For NVIDIA general support, SBIOS has to set below GPIO config:
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- Please search keyword: IBV_customize and OEM_customize to match platform design
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*/
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Scope (DGPU_BRIDGE_SCOPE)
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{
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OperationRegion (RPCX, SystemMemory, PCI_SCOPE.DGBA, 0x1000) // PEG Root Port.
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Field (RPCX, DWordAcc, NoLock, Preserve)
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{
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Offset (0x04),
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CMDR, 8, // Command Register
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Offset (0x19),
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PRBN, 8, // Primary Bus Number
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Offset (0x4A), // Device Status Register
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CEDR, 1,
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Offset (0x69), // Device Control2 Register
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, 2,
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LREN, 1,
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Offset (0xA4),
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D0ST, 2,
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}
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Device (NXHC)
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{
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Name (_ADR, 0x02)
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Device (NHUB)
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{
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Name (_ADR, Zero)
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Device (SS01)
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{
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Name (_ADR, One)
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Method (_UPC, 0, Serialized)
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{
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Name (NUPC, Package(4) {Zero, 0xFF, Zero, Zero}) // byte0: Connectable=no, byte1: Type=Proprietary
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Return (NUPC)
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}
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Method (_PLD) { Return (NPLD (0, 1)) }
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}
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Device (SS02)
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{
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Name (_ADR, 0x02)
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Method (_UPC, 0, Serialized)
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{
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Name (NUPC, Package(4) {Zero, 0xFF, Zero, Zero}) // byte0: Connectable=no, byte1: Type=Proprietary
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Return (NUPC)
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}
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Method (_PLD) { Return (NPLD (0, 2)) }
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}
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Device (SS03)
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{
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Name (_ADR, 0x03)
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Method (_UPC, 0, Serialized)
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{
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Name (NUPC, Package(4) {Zero, 0xFF, Zero, Zero}) // byte0: Connectable=no, byte1: Type=Proprietary
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Return (NUPC)
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}
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Method (_PLD) { Return (NPLD (0, 3)) }
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}
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Device (SS04)
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{
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Name (_ADR, 0x04)
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Method (_UPC, 0, Serialized)
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{
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Name (NUPC, Package(4) {Zero, 0xFF, Zero, Zero}) // byte0: Connectable=no, byte1: Type=Proprietary
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Return (NUPC)
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}
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Method (_PLD) { Return (NPLD (0, 4)) }
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}
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Device(SS05)
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{
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Name (_ADR, 0x05)
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Method (_UPC, 0, Serialized)
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{
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Name (NUPC, Package(4) {Zero, 0xFF, Zero, Zero}) // byte0: Connectable=no, byte1: Type=Proprietary
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Return (NUPC)
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}
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Method (_PLD) { Return (NPLD (0, 5)) }
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}
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Device(SS06)
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{
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Name (_ADR, 0x06)
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Method (_UPC, 0, Serialized)
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{
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Name (NUPC, Package(4) {Zero, 0xFF, Zero, Zero}) // byte0: Connectable=no, byte1: Type=Proprietary
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Return (NUPC)
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}
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Method (_PLD) { Return (NPLD (0, 6)) }
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}
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}
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Method (NPLD, 2, Serialized)
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{
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Name (PCKG, Package(1)
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{
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Buffer(0x10){}
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})
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CreateField (DerefOf (Index (PCKG, Zero)), Zero, 0x07, REV)
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Store (One, REV)
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CreateField (DerefOf (Index (PCKG, Zero)), 0x40, One, VISI)
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Store (Arg0, VISI)
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CreateField (DerefOf (Index (PCKG, Zero)), 0x57, 0x08, GPOS)
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Store (Arg1, GPOS)
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Return (PCKG)
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}
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}
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}
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Scope (DGPU_SCOPE)
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{
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Name (LTRE, Zero) // Buffer for LTR Save/Restore
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Method (_STA, 0)
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{
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Return (0x0F)
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}
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OperationRegion (PCIM, SystemMemory, PCI_SCOPE.DGDA, 0x1000) // dGPU
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Field (PCIM, DWordAcc, NoLock, Preserve)
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{
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NVID, 16,
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NDID, 16,
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CMDR, 8,
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VGAR, 2008,
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Offset (0x48B),
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, 1,
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HDAE, 1
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}
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OperationRegion (DGPU, SystemMemory, PCI_SCOPE.DGDA, 0x100) // dGPU
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Field (DGPU, DWordAcc, NoLock, Preserve)
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{
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Offset (0x40), // Offset(64)
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SSSV, 32
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}
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/*
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// method: _ROM
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// Arguments:
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// Arg0: Integer Offset of the graphics device ROM data
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// Arg1: Integer Size of the buffer to fill in (up to 4K)
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//
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// Return Value:
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// Returns Buffer Buffer of requested video ROM bytes
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Method (_ROM, 2)
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{
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Store (Arg0, Local0)
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Store (Arg1, Local1)
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Name (VROM, Buffer(Local1) {0x00}) // Create 4K buffer to return to DD
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If (LGreater (Local1, 0x1000))
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{
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Store (0x1000, Local1) // Return dummy buffer if asking for more than 4K
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}
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If (LGreater (Arg0, RVBS))
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{
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Return (VROM) // Return dummy buffer if asking beyond VBIOS image
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}
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Add (Arg0, Arg1, Local2)
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If (LGreater (Local2, RVBS)) // If requested (BASE + LEN) > VBIOS image size
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{
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Subtract (RVBS, Local0, Local1) // Limit length to the final chunk of VBIOS image
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}
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Divide (Local0, 0x8000, Local3, Local4) // (Dividend, Divisor, Remainder, Result)
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Switch (Local4)
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{
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Case (0)
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{
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Store (DGPU_SCOPE.VBS1, Local5)
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}
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Case (1)
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{
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Store (DGPU_SCOPE.VBS2, Local5)
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}
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Case (2)
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{
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Store (DGPU_SCOPE.VBS3, Local5)
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}
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Case (3)
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{
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Store (DGPU_SCOPE.VBS4, Local5)
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}
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Case (4)
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{
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Store (DGPU_SCOPE.VBS5, Local5)
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}
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Case (5)
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{
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Store (DGPU_SCOPE.VBS6, Local5)
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}
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Case (6)
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{
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Store (DGPU_SCOPE.VBS7, Local5)
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}
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Case (7)
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{
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Store (DGPU_SCOPE.VBS8, Local5)
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}
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}
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Multiply (0x8000, Local4, Local4) // (Multiplicand, Multiplier, Result)
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Subtract (Local0, Local4, Local0)
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Mid (Local5, Local0, Local1, VROM)
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Return (VROM)
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}
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*/
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Method (_DSM, 4, Serialized)
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{
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//
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// Check for Nvidia Optimus _DSM UUID
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//
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// NVOP_DSM_GUID {A486D8F8-0BDA-471B-A72B-6042A6B5BEE0}
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If (LEqual (Arg0, ToUUID ("A486D8F8-0BDA-471B-A72B-6042A6B5BEE0")))
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{
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Return (DGPU_SCOPE.NVOP (Arg0, Arg1, Arg2, Arg3))
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}
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//
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// Check for Nvidia GPS _DSM UUID
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//
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// GPS_DSM_GUID {A3132D01-8CDA-49BA-A52E-BC9D46DF6B81}
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If (LEqual (Arg0, ToUUID ("A3132D01-8CDA-49BA-A52E-BC9D46DF6B81")))
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{
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If (LNotEqual (DGPU_SCOPE.GPSS, Zero))
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{
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Return (DGPU_SCOPE.GPS (Arg0, Arg1, Arg2, Arg3))
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}
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}
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//
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// Check for Nvidia GC6 _DSM UUID
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//
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// GC6_DSM_GUID {CBECA351-067B-4924-9CBD-B46B00B86F34}
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If (LEqual (Arg0, ToUUID ("CBECA351-067B-4924-9CBD-B46B00B86F34")))
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{
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If (LNotEqual (DGPU_SCOPE.GC6S, Zero))
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{
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Return (DGPU_SCOPE.NVJT (Arg0, Arg1, Arg2, Arg3))
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}
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}
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//
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// Check for Nvidia NBCI _DSM UUID
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//
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// NBCI_DSM_GUID {D4A50B75-65C7-46F7-BFB7-41514CEA0244}
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If (LEqual (Arg0, ToUUID ("D4A50B75-65C7-46F7-BFB7-41514CEA0244")))
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{
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If (LNotEqual (DGPU_SCOPE.NBCS, Zero))
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{
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Return (DGPU_SCOPE.NBCI (Arg0, Arg1, Arg2, Arg3))
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}
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}
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#if FixedPcdGetBool (PcdHgNvidiaVenturaFeatureSupport)
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//
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// Check for Nvidia SPB _DSM UUID
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//
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// SPB_DSM_GUID {95DB88FD-940A-4253-A446-70CE0504AEDF}
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If (LEqual (Arg0, ToUUID ("95DB88FD-940A-4253-A446-70CE0504AEDF")))
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{
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If (CondRefof (IGPU_SCOPE.SPB))
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{
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Return (IGPU_SCOPE.SPB (Arg0, Arg1, Arg2, Arg3))
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}
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}
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#endif
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//
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// Check for MXM _DSM UUID
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//
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//[-start-210917-GEORGE0004-modify]//
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//[-start-210918-QINGLIN0068-modify]//
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//#ifndef S77014_SUPPORT
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#if !defined(S77014_SUPPORT) && !defined(S570_SUPPORT) && !defined(S77014IAH_SUPPORT)
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//[-end-210918-QINGLIN0068-modify]//
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If (LEqual (Arg0, ToUUID ("4004A400-917D-4cf2-B89C-79B62FD55665")))
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{
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Return (DGPU_SCOPE.MXM (Arg0, Arg1, Arg2, Arg3))
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}
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#endif
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//[-end-210917-GEORGE0004-modify]//
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Return (STATUS_ERROR_UNSPECIFIED)
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}
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} |