1096 lines
39 KiB
Plaintext
1096 lines
39 KiB
Plaintext
/** @file
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Intel ACPI Reference Code for Intel(R) Dynamic Tuning Technology
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;******************************************************************************
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;* Copyright (c) 2020 , Insyde Software Corp. All Rights Reserved.
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;*
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;* You may not reproduce, distribute, publish, display, perform, modify, adapt,
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;* transmit, broadcast, present, recite, release, license or otherwise exploit
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;* any part of this publication in any form, by any means, without the prior
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;* written permission of Insyde Software Corporation.
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;*
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;******************************************************************************
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*/
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/** @file
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@copyright
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INTEL CONFIDENTIAL
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Copyright 1999 - 2021 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains a 'Sample Driver' and is licensed as such under the terms
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of your license agreement with Intel or your vendor. This file may be modified
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by the user, subject to the additional terms of the license agreement.
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@par Specification Reference:
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**/
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//[-start-200217-IB14630320-modify]//
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#if FeaturePcdGet (PcdUseCrbEcFlag)
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External (\_SB.PC00.LPCB.H_EC.UVTH, FieldUnitObj)
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#endif
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//[-end-200217-IB14630320-modify]//
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Scope(\_SB.PC00.TCPU) // SA Thermal Device
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{
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// PFLG
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// 0 - Default, participant is on the main board
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// 1 - Participant device is on the docking station
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// 2 - Participant device is on the detachable base
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// 3 - Participant device is an external device (such as a USB device, Intel(R) Dynamic Tuning Technology does not support this type of device today)
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Name(PFLG, 0)
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// _STA (Status)
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//
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// This object returns the current status of a device.
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//
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// Arguments: (0)
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// None
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// Return Value:
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// An Integer containing a device status bitmap:
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// Bit 0 - Set if the device is present.
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// Bit 1 - Set if the device is enabled and decoding its resources.
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// Bit 2 - Set if the device should be shown in the UI.
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// Bit 3 - Set if the device is functioning properly (cleared if device failed its diagnostics).
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// Bit 4 - Set if the battery is present.
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// Bits 5-31 - Reserved (must be cleared).
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//
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Method(_STA)
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{
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If (LEqual(\SADE,1)){
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Return(0x0F)
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} Else {
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Return(0x00)
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}
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}
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//
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// Define an OpRegion for the Intel(R) Dynamic Tuning Technology MSR's accessed via MCHBAR+0x5000
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//
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OperationRegion (CPWR, SystemMemory, Add(ShiftLeft(\_SB.PC00.MC.MHBR,15),0x5000), 0x1000)
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Field (CPWR, ByteAcc, NoLock, Preserve)
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{
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Offset (0x930), // PACKAGE_POWER_SKU (MCHBAR+0x5930)
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PTDP, 15, // TDP Package Power [14:0]
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, 1, // reserved [15]
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PMIN, 15, // Minimal Package Power [30:16]
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, 1, // Reserved [31]
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PMAX, 15, // Maximal Package Power [46:32]
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, 1, // Reserved [47]
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TMAX, 7, // Maximal Time Window [54:48]
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Offset (0x938), // PACKAGE_POWER_SKU_UNIT (MCHBAR+0x5938)
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PWRU, 4, // Power Units [3:0]
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, 4, // Reserved [7:4]
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EGYU, 5, // Energy Units [12:8]
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, 3, // Reserved [15:13]
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TIMU, 4, // Time Units [19:16]
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Offset (0x958), // PLATFORM_INFO (MCHBAR+0x5958)
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, 32, // [31:0]
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LPMS, 1, // LPM Support [32]
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CTNL, 2, // CONFIG_TDP_NUM_LEVELS [34:33]
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Offset(0x978),
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PCTP, 8, // Package Temperature.(MCHBAR+ 0x5978)
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Offset (0x998), // RP_STATE_CAP_0_0_0_MCHBAR_PCU (MCHBAR+0x5998)
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RP0C, 8, // [7:0] RP0_CAP, These fields indicate the maximum RPx base frequency capability for the Integrated GFX Engine (GT).
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RP1C, 8, // [15:8] RP1_CAP, Values are in units of 100 MHz.
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RPNC, 8, // [23:16] RPN_CAP
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Offset (0xF3C), // CONFIG_TDP_NOMINAL (MCHBAR+0x5F3C)
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TRAT, 8, // TDP Ratio [7:0]
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Offset (0xF40), // CONFIG_TDP_LEVEL1 (MCHBAR+0x5F40)
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PTD1, 15, // Package TDP [14:0]
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, 1, // reserved [15]
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TRA1, 8, // TDP Ratio [23:16]
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, 8, // reserved [31:24]
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PMX1, 15, // Package MAX Power [46:32]
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, 1, // reserved [47]
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PMN1, 15, // Package MIN Power [62:48]
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Offset (0xF48), // CONFIG_TDP_LEVEL2 (MCHBAR+0x5F48)
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PTD2, 15, // Package TDP [14:0]
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, 1, // reserved [15]
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TRA2, 8, // TDP Ratio [23:16]
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, 8, // reserved [31:24]
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PMX2, 15, // Package MAX Power [46:32]
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, 1, // reserved [47]
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PMN2, 15, // Package MIN Power [62:48]
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Offset (0xF50), // CONFIG_TDP_CONTROL (MCHBAR+0x5F50)
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CTCL, 2, // TDP Level [1:0]
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, 29, // reserved [30:2]
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CLCK, 1, // Config TDP Lock [31]
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Offset (0xF54), // TURBO_ACTIVATION_RATIO (MCHBAR+0x5F54)
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MNTR, 8, // Max Non Turbo Ratio [7:0]
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}
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Name(XPCC,0) // semaphore to record when PPCC gets called for the first time
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// PPCC (Participant Power Control Capabilities)
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//
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// The PPCC object evaluates to a package of packages that indicates to Intel(R) Dynamic Tuning Technology processor
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// participant the power control capabilities.
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//
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// Arguments: (0)
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// None
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// Return Value:
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// PPCC package of packages
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//
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Method(PPCC,0,Serialized,,PkgObj)
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{
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If(LAnd(LEqual(XPCC,0),CondRefOf(\_SB.CBMI))){
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Switch(ToInteger(\_SB.CBMI)){ // use the boot index from PPM to choose the PL for PPCC
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case(0){
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If(LAnd(LGreaterEqual(\_SB.CLVL,1),LLessEqual(\_SB.CLVL,3))){
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CPL0() // copy PL0 values to PPCC
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Store(1,XPCC)
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}
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}
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case(1){
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If(LOr(LEqual(\_SB.CLVL,2),LEqual(\_SB.CLVL,3))){
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CPL1() // copy PL1 values to PPCC
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Store(1,XPCC)
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}
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}
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case(2){
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If(LEqual(\_SB.CLVL,3)){
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CPL2() // copy PL2 values to PPCC
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Store(1,XPCC)
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}
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}
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}
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}
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Return(NPCC)
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}
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// PPCC (Participant Power Control Capabilities)
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//
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// The PPCC object evaluates to a package of packages that indicates to Intel(R) Dynamic Tuning Technology processor
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// participant the power control capabilities.
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//
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// Arguments: (0)
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// None
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// Return Value:
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// PPCC package of packages
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//
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// PPCC will be initialized by the _INI method with power on default values from the PPM code.
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//
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Name (NPCC, Package()
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{ // Field Name : Field Type
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2, // Revision : DWordConst
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Package () // Power Limit 1
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{
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0, // PowerLimitIndex : DWordConst = 0
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35000, // PowerLimitMinimum : DWordConst
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45000, // PowerLimitMaximum : DWordConst
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28000, // TimeWindowMinimum : DWordConst
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32000, // TimeWindowMaximum : DWordConst
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1000 // StepSize : DWordConst
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},
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Package () // Power Limit 2
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{
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1, // PowerLimitIndex : DWordConst = 1
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56250, // PowerLimitMinimum : DWordConst
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56250, // PowerLimitMaximum : DWordConst
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0, // TimeWindowMinimum : DWordConst
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0, // TimeWindowMaximum : DWordConst
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1000 // StepSize : DWordConst
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}
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}) // End of PPCC object
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// CPNU (Convert Power Number from MMIO register to correct Units)
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//
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// Arguments: (1)
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// Arg0 = Number to be converted
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// Arg1 = Units desired
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// 0 = Watts
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// 1 = MilliWatts
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// Return Value:
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// Converted integer
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//
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Method(CPNU,2,Serialized,,IntObj)
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{
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Name(CNVT,0) // converted number
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Name(PPUU,0) // units
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Name(RMDR,0) // remainder
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if (LEqual(PWRU,0)) { // use PACKAGE_POWER_SKU_UNIT - Power Units[3:0]
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Store(1,PPUU)
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} else {
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ShiftLeft(Decrement(PWRU),2,PPUU) // get units
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}
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Divide(Arg0,PPUU,RMDR,CNVT) // convert Arg0 to Watts
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if(LEqual(Arg1,0)){
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Return(CNVT) // return in watts
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} else {
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Multiply(CNVT,1000,CNVT) // convert to milliwatts
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Multiply(RMDR,1000,RMDR) // convert remainder to a useful integer
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Divide(RMDR,PPUU,,RMDR) // convert remainder to watts
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Add(CNVT,RMDR,CNVT) // add the integer part and the fraction part together
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Return(CNVT) // return in milliwatts
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}
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}
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// CPL0 (Copy PL0 power limits to PPCC)
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//
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// Arguments:
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// None
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// Return Value:
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// None
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//
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Method(CPL0,0)
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{
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Store (2,Index(\_SB.PC00.TCPU.NPCC,0)) // Revision
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Store (0,Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,1)),0)) // PowerLimitIndex
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Store (125,Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,1)),1)) // PowerLimitMinimum
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Store (CPNU(\_SB.PL10,1),Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,1)),2)) // PowerLimitMaximum
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Multiply (\_SB.PLW0,1000,Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,1)),3)) // TimeWindowMinimum
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Add (Multiply(\_SB.PLW0,1000),4000,Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,1)),4))// TimeWindowMaximum
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Store (PPSZ,Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,1)),5)) // StepSize
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Store (1,Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,2)),0)) // PowerLimitIndex
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Store (CPNU(\_SB.PL20,1),Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,2)),1)) // PowerLimitMinimum
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Store (CPNU(\_SB.PL20,1),Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,2)),2)) // PowerLimitMaximum
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Store (0,Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,2)),3)) // TimeWindowMinimum
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Store (0,Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,2)),4)) // TimeWindowMaximum
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Store (PPSZ,Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,2)),5)) // StepSize
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}
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// CPL1 (Copy PL1 power limits to PPCC)
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//
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// Arguments:
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// None
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// Return Value:
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// None
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//
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Method(CPL1,0)
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{
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Store (2,Index(\_SB.PC00.TCPU.NPCC,0)) // Revision
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Store (0,Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,1)),0)) // PowerLimitIndex
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Store (125,Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,1)),1)) // PowerLimitMinimum
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Store (CPNU(\_SB.PL11,1),Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,1)),2)) // PowerLimitMaximum
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Multiply (\_SB.PLW1,1000,Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,1)),3)) // TimeWindowMinimum
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Add (Multiply(\_SB.PLW1,1000),4000,Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,1)),4))// TimeWindowMaximum
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Store (PPSZ,Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,1)),5)) // StepSize
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Store (1,Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,2)),0)) // PowerLimitIndex
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Store (CPNU(\_SB.PL21,1),Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,2)),1)) // PowerLimitMinimum
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Store (CPNU(\_SB.PL21,1),Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,2)),2)) // PowerLimitMaximum
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Store (0,Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,2)),3)) // TimeWindowMinimum
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Store (0,Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,2)),4)) // TimeWindowMaximum
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Store (PPSZ,Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,2)),5)) // StepSize
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}
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// CPL2 (Copy PL2 power limits to PPCC)
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//
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// Arguments:
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// None
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// Return Value:
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// None
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//
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Method(CPL2,0)
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{
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Store (2,Index(\_SB.PC00.TCPU.NPCC,0)) // Revision
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Store (0,Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,1)),0)) // PowerLimitIndex
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Store (125,Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,1)),1)) // PowerLimitMinimum
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Store (CPNU(\_SB.PL12,1),Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,1)),2)) // PowerLimitMaximum
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Multiply (\_SB.PLW2,1000,Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,1)),3)) // TimeWindowMinimum
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Add (Multiply(\_SB.PLW2,1000),4000,Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,1)),4))// TimeWindowMaximum
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Store (PPSZ,Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,1)),5)) // StepSize
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Store (1,Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,2)),0)) // PowerLimitIndex
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Store (CPNU(\_SB.PL22,1),Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,2)),1)) // PowerLimitMinimum
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Store (CPNU(\_SB.PL22,1),Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,2)),2)) // PowerLimitMaximum
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Store (0,Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,2)),3)) // TimeWindowMinimum
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Store (0,Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,2)),4)) // TimeWindowMaximum
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Store (PPSZ,Index(DerefOf(Index(\_SB.PC00.TCPU.NPCC,2)),5)) // StepSize
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}
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Name (LSTM,0) // Last temperature reported
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// _PPC (Performance Present Capabilities)
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//
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// Arguments: (0)
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// None
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// Return Value:
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// An Integer containing the range of states supported
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// 0 - States 0 through nth state are available (all states available)
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// 1 - States 1 through nth state are available
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// 2 - States 2 through nth state are available
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// ...
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// n - State n is available only
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//
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Name(_PPC,0)
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// SPPC (Set Participant Performance Capability)
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//
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// SPPC is a control method object that takes one integer parameter that will indicate the maximum allowable
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// P-State for OSPM to use at any given time.
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//
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// Arguments: (1)
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// Arg0 - integer
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// Return Value:
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// None
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//
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Method(SPPC,1,Serialized)
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{
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If (CondRefOf(\_SB.CPPC)){
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Store(Arg0, \_SB.CPPC) // Note: \_SB.CPPC must be an Integer not a Method
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}
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If (LGreater(ToInteger(\TCNT),0)) {
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Notify(\_SB.PR00, 0x80) // Tell PR00 driver to re-eval _PPC
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}
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If (LGreater(ToInteger(\TCNT),1)) {
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Notify(\_SB.PR01, 0x80) // Tell PR01 driver to re-eval _PPC
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}
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If (LGreater(ToInteger(\TCNT),2)) {
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Notify(\_SB.PR02, 0x80) // Tell PR02 driver to re-eval _PPC
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}
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If (LGreater(ToInteger(\TCNT),3)) {
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Notify(\_SB.PR03, 0x80) // Tell PR03 driver to re-eval _PPC
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}
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If (LGreater(ToInteger(\TCNT),4)) {
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Notify(\_SB.PR04, 0x80) // Tell PR04 driver to re-eval _PPC
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}
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If (LGreater(ToInteger(\TCNT),5)) {
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Notify(\_SB.PR05, 0x80) // Tell PR05 driver to re-eval _PPC
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}
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If (LGreater(ToInteger(\TCNT),6)) {
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Notify(\_SB.PR06, 0x80) // Tell PR06 driver to re-eval _PPC
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}
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If (LGreater(ToInteger(\TCNT),7)) {
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Notify(\_SB.PR07, 0x80) // Tell PR07 driver to re-eval _PPC
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}
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If (LGreater(ToInteger(\TCNT),8)) {
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Notify(\_SB.PR08, 0x80) // Tell PR08 driver to re-eval _PPC
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}
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If (LGreater(ToInteger(\TCNT),9)) {
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Notify(\_SB.PR09, 0x80) // Tell PR09 driver to re-eval _PPC
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}
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If (LGreater(ToInteger(\TCNT),10)) {
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Notify(\_SB.PR10, 0x80) // Tell PR10 driver to re-eval _PPC
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}
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If (LGreater(ToInteger(\TCNT),11)) {
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Notify(\_SB.PR11, 0x80) // Tell PR11 driver to re-eval _PPC
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}
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If (LGreater(ToInteger(\TCNT),12)) {
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Notify(\_SB.PR12, 0x80) // Tell PR12 driver to re-eval _PPC
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}
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If (LGreater(ToInteger(\TCNT),13)) {
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Notify(\_SB.PR13, 0x80) // Tell PR13 driver to re-eval _PPC
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}
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If (LGreater(ToInteger(\TCNT),14)) {
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Notify(\_SB.PR14, 0x80) // Tell PR14 driver to re-eval _PPC
|
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}
|
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If (LGreater(ToInteger(\TCNT),15)) {
|
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Notify(\_SB.PR15, 0x80) // Tell PR15 driver to re-eval _PPC
|
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}
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If (LGreater(ToInteger(\TCNT),16)) {
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Notify(\_SB.PR16, 0x80) // Tell PR16 driver to re-eval _PPC
|
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}
|
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If (LGreater(ToInteger(\TCNT),17)) {
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Notify(\_SB.PR17, 0x80) // Tell PR17 driver to re-eval _PPC
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}
|
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If (LGreater(ToInteger(\TCNT),18)) {
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Notify(\_SB.PR18, 0x80) // Tell PR18 driver to re-eval _PPC
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}
|
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If (LGreater(ToInteger(\TCNT),19)) {
|
|
Notify(\_SB.PR19, 0x80) // Tell PR19 driver to re-eval _PPC
|
|
}
|
|
If (LGreater(ToInteger(\TCNT),20)) {
|
|
Notify(\_SB.PR20, 0x80) // Tell PR20 driver to re-eval _PPC
|
|
}
|
|
If (LGreater(ToInteger(\TCNT),21)) {
|
|
Notify(\_SB.PR21, 0x80) // Tell PR21 driver to re-eval _PPC
|
|
}
|
|
If (LGreater(ToInteger(\TCNT),22)) {
|
|
Notify(\_SB.PR22, 0x80) // Tell PR22 driver to re-eval _PPC
|
|
}
|
|
If (LGreater(ToInteger(\TCNT),23)) {
|
|
Notify(\_SB.PR23, 0x80) // Tell PR23 driver to re-eval _PPC
|
|
}
|
|
If (LGreater(ToInteger(\TCNT),24)) {
|
|
Notify(\_SB.PR24, 0x80) // Tell PR24 driver to re-eval _PPC
|
|
}
|
|
If (LGreater(ToInteger(\TCNT),25)) {
|
|
Notify(\_SB.PR25, 0x80) // Tell PR25 driver to re-eval _PPC
|
|
}
|
|
If (LGreater(ToInteger(\TCNT),26)) {
|
|
Notify(\_SB.PR26, 0x80) // Tell PR26 driver to re-eval _PPC
|
|
}
|
|
If (LGreater(ToInteger(\TCNT),27)) {
|
|
Notify(\_SB.PR27, 0x80) // Tell PR27 driver to re-eval _PPC
|
|
}
|
|
If (LGreater(ToInteger(\TCNT),28)) {
|
|
Notify(\_SB.PR28, 0x80) // Tell PR28 driver to re-eval _PPC
|
|
}
|
|
If (LGreater(ToInteger(\TCNT),29)) {
|
|
Notify(\_SB.PR29, 0x80) // Tell PR29 driver to re-eval _PPC
|
|
}
|
|
If (LGreater(ToInteger(\TCNT),30)) {
|
|
Notify(\_SB.PR30, 0x80) // Tell PR30 driver to re-eval _PPC
|
|
}
|
|
If (LGreater(ToInteger(\TCNT),31)) {
|
|
Notify(\_SB.PR31, 0x80) // Tell PR31 driver to re-eval _PPC
|
|
}
|
|
}
|
|
|
|
// SPUR (Set _PUR)
|
|
//
|
|
// This object takes an integer as argument that indicates the number of Logical processors that
|
|
// must be idled by the OSPM. This object's implementation must modify the NumProcessors field
|
|
// of the _PUR object implemented in the processor aggregator object definition and also must
|
|
// notify the processor aggregator object with code 0x80 to allow the OSPM to re-evaluate _PUR.
|
|
//
|
|
// Arguments: (1)
|
|
// number of Logical processors that that must be idled by the OSPM
|
|
// Return Value:
|
|
// None
|
|
//
|
|
Method(SPUR,1,,,IntObj)
|
|
{
|
|
If(LLessEqual(Arg0,\TCNT)){ // bounds check the argument
|
|
If(LEqual(\_SB.PAGD._STA, 0x0F)){ // check if _PUR is enabled
|
|
Store(Arg0, Index(\_SB.PAGD._PUR, 1))
|
|
Notify (\_SB.PAGD, 0x80)
|
|
}
|
|
}
|
|
}
|
|
|
|
// PCCC (Participant Current Control Capabilities)
|
|
//
|
|
// The PCCC object evaluates to a package of packages that indicates to Intel(R) Dynamic Tuning Technology processor participant the Icc control capabilities.
|
|
//
|
|
// Arguments: (0)
|
|
// None
|
|
//
|
|
// Return Value:
|
|
// A package of packages as described below:
|
|
//
|
|
// Package()
|
|
// {
|
|
// 0x80000000, // DWordConst, Revision
|
|
// Package ()
|
|
// {
|
|
// 0x80000000, // DWordConst, CurrentLimitMinimum in milli Amps
|
|
// 0x80000000, // DWordConst, CurrentLimitMaximum in milli Amps
|
|
// }
|
|
// }
|
|
Method(PCCC,0,Serialized,,PkgObj)
|
|
{
|
|
Store (1,Index(PCCX,0)) // Revision
|
|
Switch(ToInteger(CPNU(PTDP,0))){ // SKU check
|
|
case(57){
|
|
Store (43000,Index(DerefOf(Index(PCCX,1)),0)) // CurrentLimitMinimum
|
|
Store (95000,Index(DerefOf(Index(PCCX,1)),1)) // CurrentLimitMaximum
|
|
}
|
|
case(47){
|
|
Store (39000,Index(DerefOf(Index(PCCX,1)),0)) // CurrentLimitMinimum
|
|
Store (85000,Index(DerefOf(Index(PCCX,1)),1)) // CurrentLimitMaximum
|
|
}
|
|
case(37){
|
|
Store (29000,Index(DerefOf(Index(PCCX,1)),0)) // CurrentLimitMinimum
|
|
Store (55000,Index(DerefOf(Index(PCCX,1)),1)) // CurrentLimitMaximum
|
|
}
|
|
case(25){
|
|
Store (16000,Index(DerefOf(Index(PCCX,1)),0)) // CurrentLimitMinimum
|
|
Store (32000,Index(DerefOf(Index(PCCX,1)),1)) // CurrentLimitMaximum
|
|
}
|
|
case(15){
|
|
Store (14000,Index(DerefOf(Index(PCCX,1)),0)) // CurrentLimitMinimum
|
|
Store (32000,Index(DerefOf(Index(PCCX,1)),1)) // CurrentLimitMaximum
|
|
}
|
|
case(11){
|
|
Store (14000,Index(DerefOf(Index(PCCX,1)),0)) // CurrentLimitMinimum
|
|
Store (25000,Index(DerefOf(Index(PCCX,1)),1)) // CurrentLimitMaximum
|
|
}
|
|
Default{ // UNKNOWN SKU
|
|
Store (0xFF,Index(DerefOf(Index(PCCX,1)),0)) // CurrentLimitMinimum
|
|
Store (0xFF,Index(DerefOf(Index(PCCX,1)),1)) // CurrentLimitMaximum
|
|
}
|
|
} // End of Switch(PTDP)
|
|
|
|
Return(PCCX)
|
|
} // End of PCCC object
|
|
|
|
// PCCX (Participant Current Control Capabilities temp structure)
|
|
//
|
|
// This is used to pass data from the PCCC object to the PDRT object.
|
|
//
|
|
Name (PCCX, Package()
|
|
{
|
|
0x80000000, // DWordConst, Revision
|
|
|
|
Package ()
|
|
{
|
|
0x80000000, // DWordConst, CurrentLimitMinimum
|
|
0x80000000 // DWordConst, CurrentLimitMaximum
|
|
}
|
|
}) // End of PCCC object
|
|
|
|
// KEFF (VR efficiency Table)
|
|
//
|
|
// This object evaluates to a package of packages that indicates the VR efficiency factor for various processor power.
|
|
//
|
|
// Arguments: (0)
|
|
// None
|
|
//
|
|
// Return Value:
|
|
// A package of packages.
|
|
//
|
|
Name(KEFF, Package()
|
|
{
|
|
// Processor PMAX, Efficiency
|
|
Package () {444, 0},
|
|
Package () {463, 39},
|
|
Package () {481, 75},
|
|
Package () {499, 108},
|
|
Package () {518, 139},
|
|
Package () {536, 168},
|
|
Package () {554, 195},
|
|
Package () {573, 221},
|
|
Package () {591, 244},
|
|
Package () {609, 267},
|
|
Package () {628, 287},
|
|
Package () {812, 445},
|
|
Package () {983, 551},
|
|
Package () {1163, 621},
|
|
Package () {1342, 673},
|
|
Package () {1527, 710},
|
|
Package () {1704, 742},
|
|
Package () {1885, 767},
|
|
Package () {2072, 785},
|
|
Package () {2255, 802},
|
|
Package () {6044, 897},
|
|
Package () {11740, 924},
|
|
Package () {17576, 926},
|
|
Package () {23605, 919},
|
|
Package () {29821, 909},
|
|
Package () {36223, 898},
|
|
Package () {42856, 886},
|
|
Package () {49723, 873},
|
|
Package () {56870, 858},
|
|
Package () {64380, 842}
|
|
})
|
|
|
|
Name (CEUP, Package()
|
|
{
|
|
0x80000000,
|
|
0x80000000,
|
|
0x80000000,
|
|
0x80000000,
|
|
0x80000000,
|
|
0x80000000
|
|
})
|
|
|
|
// _TMP (Temperature)
|
|
//
|
|
// This control method returns the thermal zone's current operating temperature.
|
|
//
|
|
// Arguments: (0)
|
|
// None
|
|
// Return Value:
|
|
// An Integer containing the current temperature of the thermal zone (in tenths of degrees Kelvin)
|
|
//
|
|
Method(_TMP,0,Serialized)
|
|
{
|
|
Return((\_SB.IETM.CTOK(PCTP)))
|
|
}
|
|
|
|
// _DTI (Device Temperature Indication)
|
|
//
|
|
// Conveys the temperature of a device's internal temperature sensor to the platform when a temperature trip point
|
|
// is crossed or when a meaningful temperature change occurs.
|
|
//
|
|
// Arguments: (1)
|
|
// Arg0 - An Integer containing the current value of the temperature sensor (in tenths Kelvin)
|
|
// Return Value:
|
|
// None
|
|
//
|
|
Method(_DTI, 1)
|
|
{
|
|
Store(Arg0,LSTM)
|
|
Notify(\_SB.PC00.TCPU, 0x91) // notify the participant of a trip point change event
|
|
}
|
|
|
|
// _NTT (Notification Temperature Threshold)
|
|
//
|
|
// Returns the temperature change threshold for devices containing native temperature sensors to cause
|
|
// evaluation of the _DTI object
|
|
//
|
|
// Arguments: (0)
|
|
// None
|
|
// Return Value:
|
|
// An Integer containing the temperature threshold in tenths of degrees Kelvin.
|
|
//
|
|
Method(_NTT, 0)
|
|
{
|
|
Return(2782) // 5 degree Celcius, this could be a platform policy with setup item
|
|
}
|
|
|
|
Name(PTYP, 0x00)
|
|
|
|
// _PSS (Performance Supported States)
|
|
//
|
|
// This optional object indicates to OSPM the number of supported processor performance states that any given system can support.
|
|
//
|
|
// Arguments: (1)
|
|
// None
|
|
// Return Value:
|
|
// A variable-length Package containing a list of Pstate sub-packages as described below
|
|
//
|
|
// Return Value Information
|
|
// Package {
|
|
// PState [0] // Package - Performance state 0
|
|
// ....
|
|
// PState [n] // Package - Performance state n
|
|
// }
|
|
//
|
|
// Each Pstate sub-Package contains the elements described below:
|
|
// Package {
|
|
// CoreFrequency // Integer (DWORD)
|
|
// Power // Integer (DWORD)
|
|
// Latency // Integer (DWORD)
|
|
// BusMasterLatency // Integer (DWORD)
|
|
// Control // Integer (DWORD)
|
|
// Status // Integer (DWORD)
|
|
// }
|
|
//
|
|
// Stub for the Actual CPU _PSS method.
|
|
//
|
|
Method(_PSS,,,,PkgObj)
|
|
{
|
|
If(CondRefOf(\_SB.PR00._PSS))
|
|
{ // Ensure _PSS is present
|
|
Return(\_SB.PR00._PSS())
|
|
} Else {
|
|
Return(Package()
|
|
{
|
|
Package(){0,0,0,0,0,0},
|
|
Package(){0,0,0,0,0,0}
|
|
}
|
|
)
|
|
}
|
|
}
|
|
|
|
// _TSS (Throttling Supported States)
|
|
//
|
|
// Arguments: (0)
|
|
// None
|
|
// Return Value:
|
|
// A variable-length Package containing a list of Tstate sub-packages as described below
|
|
//
|
|
// Return Value Information
|
|
// Package {
|
|
// TState [0] // Package - Throttling state 0
|
|
// ....
|
|
// TState [n] // Package - Throttling state n
|
|
// }
|
|
//
|
|
// Each Tstate sub-Package contains the elements described below:
|
|
// Package {
|
|
// Percent // Integer (DWORD)
|
|
// Power // Integer (DWORD)
|
|
// Latency // Integer (DWORD)
|
|
// Control // Integer (DWORD)
|
|
// Status // Integer (DWORD)
|
|
// }
|
|
//
|
|
Method(_TSS,)
|
|
{
|
|
If(CondRefOf(\_SB.PR00._TSS))
|
|
{ // Ensure _TSS is present
|
|
Return(\_SB.PR00._TSS())
|
|
} Else {
|
|
Return(Package()
|
|
{
|
|
Package(){1,0,0,0,0}
|
|
}
|
|
)
|
|
}
|
|
}
|
|
|
|
// _TPC (Throttling Present Capabilities)
|
|
//
|
|
// This optional object is a method that dynamically indicates to OSPM the number of throttling states currently supported by the platform.
|
|
//
|
|
// Arguments: (0)
|
|
// None
|
|
// Return Value:
|
|
// An Integer containing the number of states supported:
|
|
// 0 - states 0 .. nth state available (all states available)
|
|
// 1 - state 1 .. nth state available
|
|
// 2 - state 2 .. nth state available
|
|
// ...
|
|
// n - state n available only
|
|
//
|
|
Method(_TPC)
|
|
{
|
|
If(CondRefOf(\_SB.PR00._TPC))
|
|
{ // Ensure _TPC is present
|
|
Return(\_SB.PR00._TPC)
|
|
} Else {
|
|
Return(0)
|
|
}
|
|
}
|
|
|
|
// _PTC (Processor Throttling Control)
|
|
//
|
|
// _PTC is an optional object that defines a processor throttling control interface alternative to the I/O address spaced-based P_BLK throttling control register (P_CNT)
|
|
//
|
|
// PF00[2] = ACPI object indicating if OSPM is capable of direct access to On Demand throttling MSR
|
|
//
|
|
// Arguments: (0)
|
|
// None
|
|
// Return Value:
|
|
// A Package as described below
|
|
//
|
|
// Return Value Information
|
|
// Package {
|
|
// ControlRegister // Buffer (Resource Descriptor)
|
|
// StatusRegister // Buffer (Resource Descriptor)
|
|
// }
|
|
//
|
|
Method(_PTC,,,,PkgObj)
|
|
{
|
|
If(LAnd(CondRefOf(\PF00),LNotEqual(\PF00,0x80000000))) // is object present and initialized?
|
|
{
|
|
If(And(\PF00, 0x0004)) { // does OS support MSR interface?
|
|
Return(Package() {
|
|
ResourceTemplate(){Register(FFixedHW, 0, 0, 0)},
|
|
ResourceTemplate(){Register(FFixedHW, 0, 0, 0)} }) // if OS supports MSR interface
|
|
} Else {
|
|
Return(Package() {
|
|
ResourceTemplate(){Register(SystemIO, 5, 0, PCH_ACPI_PBLK)},
|
|
ResourceTemplate(){Register(SystemIO, 5, 0, PCH_ACPI_PBLK)} }) // if OS support IO based interface
|
|
}
|
|
} Else {
|
|
Return(Package() {
|
|
ResourceTemplate(){Register(FFixedHW, 0, 0, 0)},
|
|
ResourceTemplate(){Register(FFixedHW, 0, 0, 0)} }) // if object is not present or not initialized then return MSR interface
|
|
}
|
|
}
|
|
|
|
// _TSD (T-State Dependency)
|
|
//
|
|
// This optional object provides T-state control cross logical processor dependency information to OSPM.
|
|
//
|
|
// Arguments: (0)
|
|
// None
|
|
// Return Value:
|
|
// A variable-length Package containing a list of T-state dependency Packages as described below.
|
|
//
|
|
// Return Value Information
|
|
// Package {
|
|
// NumEntries // Integer
|
|
// Revision // Integer (BYTE)
|
|
// Domain // Integer (DWORD)
|
|
// CoordType // Integer (DWORD)
|
|
// NumProcessors // Integer (DWORD)
|
|
// }
|
|
//
|
|
Method(_TSD,)
|
|
{
|
|
If(CondRefOf(\_SB.PR00._TSD))
|
|
{ // Ensure _TSD is present
|
|
Return(\_SB.PR00._TSD())
|
|
} Else {
|
|
Return(Package()
|
|
{
|
|
Package(){5,0,0,0xFC,0}
|
|
}
|
|
)
|
|
}
|
|
}
|
|
|
|
// _TDL (T-state Depth Limit)
|
|
//
|
|
// This optional object evaluates to the _TSS entry number of the lowest power throttling state that OSPM may use.
|
|
//
|
|
// Arguments: (0)
|
|
// None
|
|
// Return Value:
|
|
// An Integer containing the Throttling Depth Limit _TSS entry number:
|
|
// 0 - throttling disabled.
|
|
// 1 - state 1 is the lowest power T-state available.
|
|
// 2 - state 2 is the lowest power T-state available.
|
|
// ...
|
|
// n - state n is the lowest power T-state available.
|
|
//
|
|
Method(_TDL)
|
|
{
|
|
If(LAnd(CondRefOf(\_SB.PR00._TSS),CondRefOf(\_SB.CFGD)))
|
|
{ // Ensure _TSS is present
|
|
If(And(\_SB.CFGD, PPM_TSTATE_FINE_GRAINED))
|
|
{
|
|
Return(Subtract(SizeOf(\_SB.PR00.TSMF),1))
|
|
} Else {
|
|
Return(Subtract(SizeOf(\_SB.PR00.TSMC),1))
|
|
}
|
|
} Else {
|
|
Return(0)
|
|
}
|
|
}
|
|
|
|
// _PDL (P-state Depth Limit)
|
|
//
|
|
// This optional object evaluates to the _PSS entry number of the lowest performance P-state
|
|
// that OSPM may use when performing passive thermal control.
|
|
//
|
|
// Arguments: (0)
|
|
// None
|
|
// Return Value:
|
|
// An Integer containing the P-state Depth Limit _PSS entry number:
|
|
// Integer containing the P-state Depth Limit _PSS entry number:
|
|
// 0 - P0 is the only P-state available for OSPM use
|
|
// 1 - state 1 is the lowest power P-state available
|
|
// 2 - state 2 is the lowest power P-state available
|
|
// ...
|
|
// n - state n is the lowest power P-state available
|
|
//
|
|
Method(_PDL)
|
|
{
|
|
If(CondRefOf(\_SB.PR00._PSS))
|
|
{ // Ensure _PSS is present
|
|
//
|
|
// \_SB.OSCP[10] = Platform-Wide OS Capable for no limit 16 P-states
|
|
//
|
|
If(And(\_SB.OSCP, 0x0400))
|
|
{
|
|
Return(Subtract(SizeOf(\_SB.PR00.TPSS),1))
|
|
} Else {
|
|
Return(Subtract(SizeOf(\_SB.PR00.LPSS),1))
|
|
}
|
|
} Else {
|
|
Return(0)
|
|
}
|
|
}
|
|
|
|
// Default values for Tjmax.
|
|
Name (TJMX,110) // Tjmax to calculate ACx trip point
|
|
|
|
// _TSP (Thermal Sampling Period)
|
|
//
|
|
// Sets the polling interval in 10ths of seconds. A value of 0 tells the driver to use interrupts.
|
|
//
|
|
// Arguments: (0)
|
|
// None
|
|
// Return Value:
|
|
// An Integer containing the polling rate in tenths of seconds.
|
|
// A value of 0 will specify using interrupts through the ACPI notifications.
|
|
//
|
|
// The granularity of the sampling period is 0.1 seconds. For example, if the sampling period is 30.0
|
|
// seconds, then _TSP needs to report 300; if the sampling period is 0.5 seconds, then it will report 5.
|
|
//
|
|
Method(_TSP,0,Serialized)
|
|
{
|
|
// OxMs can change this to a non-zero value if the polling is desired
|
|
Return(0)
|
|
}
|
|
|
|
// _ACx (Active Cooling)
|
|
//
|
|
// This ACPI method is optional.
|
|
// OEM/ODM can directly set the value on Intel(R) Dynamic Tuning Technology UI for the participant
|
|
// The value programmed here is the default value used on Intel RVP for the validation purpose.
|
|
// OEM/ODM can set a different default value for a specific platform if necessary
|
|
// x is a value between 0 and 9 that designates multiple active cooling levels of the thermal zone.
|
|
//
|
|
// Arguments: (0)
|
|
// None
|
|
// Return Value:
|
|
// An Integer containing the active cooling temperature threshold in tenths of degrees Kelvin
|
|
//
|
|
Method(_AC0,0,Serialized)
|
|
{
|
|
Store(\_SB.IETM.CTOK(TJMX),Local1) // Tjmax
|
|
Subtract(Local1, 10, Local1) // AC0 = Tjmax-10
|
|
|
|
If(LGreaterEqual(LSTM,Local1))
|
|
{
|
|
Return(Subtract(Local1,20)) // subtract 2 degrees which is the Hysteresis
|
|
}
|
|
Else
|
|
{
|
|
Return(Local1)
|
|
}
|
|
}
|
|
|
|
// _ACx (Active Cooling)
|
|
//
|
|
// This optional object, if present under a thermal zone, returns the
|
|
// temperature trip point at which OSPM must start or stop Active cooling,
|
|
// where x is a value between 0 and 9 that designates multiple active cooling levels of the thermal zone.
|
|
//
|
|
// Arguments: (0)
|
|
// None
|
|
// Return Value:
|
|
// An Integer containing the active cooling temperature threshold in tenths of degrees Kelvin
|
|
//
|
|
Method(_AC1,0,Serialized)
|
|
{
|
|
Store(\_SB.IETM.CTOK(TJMX),Local1) // Tjmax
|
|
Subtract(Local1, 30, Local1) // AC1 = AC0-20 or Tjmax-30
|
|
|
|
If(LGreaterEqual(LSTM,Local1))
|
|
{
|
|
Return(Subtract(Local1,20)) // subtract 2 degrees which is the Hysteresis
|
|
}
|
|
Else
|
|
{
|
|
Return(Local1)
|
|
}
|
|
}
|
|
|
|
Method(_AC2,0,Serialized)
|
|
{
|
|
Store(\_SB.IETM.CTOK(TJMX),Local1) // Tjmax
|
|
Subtract(Local1, 40, Local1) // AC2 = AC0-30 or Tjmax-40
|
|
|
|
If(LGreaterEqual(LSTM,Local1))
|
|
{
|
|
Return(Subtract(Local1,20)) // subtract 2 degrees which is the Hysteresis
|
|
}
|
|
Else
|
|
{
|
|
Return(Local1)
|
|
}
|
|
}
|
|
|
|
Method(_AC3,0,Serialized)
|
|
{
|
|
Store(\_SB.IETM.CTOK(TJMX),Local1) // Tjmax
|
|
Subtract(Local1, 55, Local1) // AC3 = AC0-45 or Tjmax-55
|
|
|
|
If(LGreaterEqual(LSTM,Local1))
|
|
{
|
|
Return(Subtract(Local1,20)) // subtract 2 degrees which is the Hysteresis
|
|
}
|
|
Else
|
|
{
|
|
Return(Local1)
|
|
}
|
|
}
|
|
|
|
Method(_AC4,0,Serialized)
|
|
{
|
|
Store(\_SB.IETM.CTOK(TJMX),Local1) // Tjmax
|
|
Subtract(Local1, 70, Local1) // AC4 = AC0-60 or Tjmax-70
|
|
|
|
If(LGreaterEqual(LSTM,Local1))
|
|
{
|
|
Return(Subtract(Local1,20)) // subtract 2 degrees which is the Hysteresis
|
|
}
|
|
Else
|
|
{
|
|
Return(Local1)
|
|
}
|
|
}
|
|
|
|
// _PSV (Passive)
|
|
//
|
|
// This ACPI method is optional.
|
|
// OEM/ODM can directly set the value on Intel(R) Dynamic Tuning Technology UI for the participant
|
|
// The value programmed here is the default value used on Intel RVP for the validation purpose.
|
|
// OEM/ODM can set a different default value for a specific platform if necessary
|
|
//
|
|
// Arguments: (0)
|
|
// None
|
|
// Return Value:
|
|
// An Integer containing the passive cooling temperature threshold in tenths of degrees Kelvin
|
|
//
|
|
Method(_PSV,0,Serialized)
|
|
{
|
|
Return(\_SB.IETM.CTOK(TJMX)) // passive Cooling Policy
|
|
}
|
|
|
|
// _CRT (Critical Temperature)
|
|
//
|
|
// This ACPI method is optional.
|
|
// OEM/ODM can directly set the value on Intel(R) Dynamic Tuning Technology UI for the participant
|
|
// The value programmed here is the default value used on Intel RVP for the validation purpose.
|
|
// OEM/ODM can set a different default value for a specific platform if necessary
|
|
//
|
|
// Arguments: (0)
|
|
// None
|
|
// Return Value:
|
|
// An Integer containing the critical temperature threshold in tenths of degrees Kelvin
|
|
//
|
|
Method(_CRT,0,Serialized)
|
|
{
|
|
Return(\_SB.IETM.CTOK(TJMX))
|
|
}
|
|
|
|
// _CR3 (Critical Temperature for S3/CS)
|
|
//
|
|
// This ACPI method is optional.
|
|
// OEM/ODM can directly set the value on Intel(R) Dynamic Tuning Technology UI for the participant
|
|
// The value programmed here is the default value used on Intel RVP for the validation purpose.
|
|
// OEM/ODM can set a different default value for a specific platform if necessary
|
|
//
|
|
// Arguments: (0)
|
|
// None
|
|
// Return Value:
|
|
// An Integer containing the critical temperature threshold in tenths of degrees Kelvin
|
|
//
|
|
Method(_CR3,0,Serialized)
|
|
{
|
|
Return(\_SB.IETM.CTOK(TJMX))
|
|
}
|
|
|
|
// _HOT (Hot Temperature)
|
|
//
|
|
// This ACPI method is optional.
|
|
// OEM/ODM can directly set the value on Intel(R) Dynamic Tuning Technology UI for the participant
|
|
// The value programmed here is the default value used on Intel RVP for the validation purpose.
|
|
// OEM/ODM can set a different default value for a specific platform if necessary
|
|
//
|
|
// Arguments: (0)
|
|
// None
|
|
// Return Value:
|
|
// The return value is an integer that represents the critical sleep threshold tenths of degrees Kelvin.
|
|
//
|
|
Method(_HOT,0,Serialized)
|
|
{
|
|
Return(\_SB.IETM.CTOK(TJMX))
|
|
}
|
|
|
|
// UVTH (Under Voltage Threshold.)
|
|
// UVTH is a command which BIOS sends to EC. [15:0]
|
|
//
|
|
// Arguments: (1)
|
|
// Arg0 should be sent by Intel(R) Dynamic Tuning Technology driver in response to power delivery capability changes. The unit is 1mV.
|
|
// Return Value:
|
|
// None
|
|
//
|
|
//[-start-200217-IB14630320-modify]//
|
|
Method(UVTH,1,Serialized)
|
|
{
|
|
#if FeaturePcdGet (PcdUseCrbEcFlag)
|
|
|
|
If (LAnd(LEqual(\ECON,1), LEqual(\_SB.PC00.LPCB.H_EC.ECAV,1))) // Check If EC opregion is available
|
|
{
|
|
Store (Arg0, Local0)
|
|
\_SB.PC00.LPCB.H_EC.ECWT (Arg0, RefOf(\_SB.PC00.LPCB.H_EC.UVTH)) // power delivery capability changed
|
|
\_SB.PC00.LPCB.H_EC.ECMD (0x17)
|
|
}
|
|
#endif
|
|
}
|
|
//[-end-200217-IB14630320-modify]//
|
|
|
|
}// End Scope(\_SB.PC00.TCPU)
|