234 lines
8.3 KiB
C
234 lines
8.3 KiB
C
/** @file
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This PEIM driver initialize Nvm Express host contoller and
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produce EdkiiPeiNvmExpressHostControllerPpi instance for other driver.
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2019 - 2021 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains a 'Sample Driver' and is licensed as such under the terms
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of your license agreement with Intel or your vendor. This file may be modified
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by the user, subject to the additional terms of the license agreement.
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@par Specification Reference:
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**/
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#ifndef _NVME_PCI_HC_PEI_H_
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#define _NVME_PCI_HC_PEI_H_
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#include <PiPei.h>
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#include <Ppi/MasterBootMode.h>
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#include <Ppi/EndOfPeiPhase.h>
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#include <Ppi/NvmExpressHostController.h>
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#include <Ppi/RstConfigPpi.h>
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#include <IndustryStandard/Pci.h>
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#include <Library/DebugLib.h>
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#include <Library/BaseLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/PciLib.h>
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#include <Library/PeiServicesLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/PchInfoLib.h>
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#include <Library/PchPcieRpLib.h>
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#include <Library/PciSegmentLib.h>
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#include <Library/PchPciBdfLib.h>
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#include <Library/CpuPcieInfoFruLib.h>
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#include <PcieRegs.h>
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#include <Register/PchRegs.h>
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#include <Register/PchPcieRpRegs.h>
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#include <CpuPcieInfo.h>
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//
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// NVME HC PEI driver implementation related definitions
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//
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#define MAX_NVME_HCS 8
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#define ENDPOINT_PCI_BUS_NUMBER_START 0x10
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#define PCI_BRIDGE_CONFIG_SPACE_STORE_SIZE 0x30
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//
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// PCIE configuration space offset for Pci-Pci Bridge
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//
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#define PCI_BRIDGE_IO_BASE 0x1C
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#define PCI_BRIDGE_IO_LIMIT 0x1D
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#define PCI_BRIDGE_MEMORY_BASE 0x20
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#define PCI_BRIDGE_MEMORY_LIMIT 0x22
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#define PCI_BRIDGE_PREFETCHABLE_MEMORY_BASE 0x24
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#define PCI_BRIDGE_PREFETCHABLE_MEMORY_LIMIT 0x26
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#define PCI_BRIDGE_PREFETCHABLE_BASE_UPPER32 0x28
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#define PCI_BRIDGE_PREFETCHABLE_LIMIT_UPPER32 0x2C
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#pragma pack(1)
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//
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// Device path for NVM Express host controller
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//
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typedef struct {
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ACPI_HID_DEVICE_PATH PciRoot;
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PCI_DEVICE_PATH PciBridge;
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PCI_DEVICE_PATH NvmeHcEp;
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EFI_DEVICE_PATH_PROTOCOL End;
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} NVME_HC_DEVICE_PATH;
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#pragma pack()
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typedef struct {
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UINT8 Bus;
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UINT8 Device;
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UINT8 Function;
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} PCI_NODE_INFO;
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typedef struct {
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PCI_NODE_INFO Bridge;
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PCI_NODE_INFO ControllerEndPoint;
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UINTN Bar;
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UINTN DevicePathLength;
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EFI_DEVICE_PATH_PROTOCOL *DevicePath;
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UINT8 OriBridgeConfigSpace[PCI_BRIDGE_CONFIG_SPACE_STORE_SIZE];
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UINT8 OriCmdRegLow;
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UINT32 OriBar0Reg;
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UINT32 OriBar1Reg;
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} NVME_HC_INFO;
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#define NVME_HC_PEI_SIGNATURE SIGNATURE_32 ('N', 'H', 'C', 'P')
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typedef struct {
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UINTN Signature;
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EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI NvmeHostControllerPpi;
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EFI_PEI_PPI_DESCRIPTOR PpiList;
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EFI_PEI_NOTIFY_DESCRIPTOR EndOfPeiNotifyList;
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UINTN TotalNvmeHcs;
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NVME_HC_INFO HcInfo[MAX_NVME_HCS];
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BOOLEAN IsHybrid;
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} NVME_HC_PEI_PRIVATE_DATA;
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#define NVME_HC_PEI_PRIVATE_DATA_FROM_THIS(a) \
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CR (a, NVME_HC_PEI_PRIVATE_DATA, NvmeHostControllerPpi, NVME_HC_PEI_SIGNATURE)
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#define NVME_HC_PEI_PRIVATE_DATA_FROM_THIS_NOTIFY(a) \
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CR (a, NVME_HC_PEI_PRIVATE_DATA, EndOfPeiNotifyList, NVME_HC_PEI_SIGNATURE)
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//
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// EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI services
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//
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/**
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Get the MMIO base address of NVM Express host controller.
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@param[in] This The PPI instance pointer.
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@param[in] ControllerId The ID of the NVM Express host controller.
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@param[out] MmioBar The MMIO base address of the controller.
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@retval EFI_SUCCESS The operation succeeds.
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@retval EFI_INVALID_PARAMETER The parameters are invalid.
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@retval EFI_NOT_FOUND The specified NVM Express host controller not
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found.
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**/
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EFI_STATUS
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EFIAPI
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GetNvmeHcMmioBar (
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IN EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI *This,
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IN UINT8 ControllerId,
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OUT UINTN *MmioBar
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);
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/**
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Get the device path of NVM Express host controller.
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@param[in] This The PPI instance pointer.
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@param[in] ControllerId The ID of the NVM Express host controller.
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@param[out] DevicePathLength The length of the device path in bytes specified
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by DevicePath.
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@param[out] DevicePath The device path of NVM Express host controller.
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This field re-uses EFI Device Path Protocol as
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defined by Section 10.2 EFI Device Path Protocol
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of UEFI 2.7 Specification.
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@retval EFI_SUCCESS The operation succeeds.
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@retval EFI_INVALID_PARAMETER The parameters are invalid.
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@retval EFI_NOT_FOUND The specified NVM Express host controller not
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found.
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@retval EFI_OUT_OF_RESOURCES The operation fails due to lack of resources.
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**/
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EFI_STATUS
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EFIAPI
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GetNvmeHcDevicePath (
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IN EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI *This,
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IN UINT8 ControllerId,
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OUT UINTN *DevicePathLength,
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OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
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);
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//
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// Internal functions
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//
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/**
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One notified function to cleanup the allocated resources at the end of PEI.
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@param[in] PeiServices Pointer to PEI Services Table.
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@param[in] NotifyDescriptor Pointer to the descriptor for the Notification
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event that caused this function to execute.
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@param[in] Ppi Pointer to the PPI data associated with this function.
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@retval EFI_SUCCESS The function completes successfully.
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**/
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EFI_STATUS
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EFIAPI
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NvmeHcEndOfPei (
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IN EFI_PEI_SERVICES **PeiServices,
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IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
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IN VOID *Ppi
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);
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/**
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The callback function for SiInitDone.
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It is to make sure this driver get BDF after rootport function mapping.
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@param[in] PeiServices Pointer to PEI Services Table.
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@param[in] NotifyDescriptor Pointer to the descriptor for the Notification
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event that caused this function to execute.
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@param[in] Ppi Pointer to the PPI data associated with this function.
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@retval EFI_SUCCESS The function completes successfully.
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**/
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EFI_STATUS
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EFIAPI
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SiInitCallBack (
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IN EFI_PEI_SERVICES **PeiServices,
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IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
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IN VOID *Ppi
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);
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#endif // _NVME_PCI_HC_PEI_H_
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