157 lines
7.1 KiB
C
157 lines
7.1 KiB
C
/** @file
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2004 - 2016 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains a 'Sample Driver' and is licensed as such under the terms
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of your license agreement with Intel or your vendor. This file may be modified
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by the user, subject to the additional terms of the license agreement.
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@par Specification Reference:
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**/
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#ifndef _COMMON_DEFINITIONS_H_
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#define _COMMON_DEFINITIONS_H_
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//
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// PCI CONFIGURATION MAP REGISTER OFFSETS
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//
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#define PCI_VID 0x0000 // Vendor ID Register
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#define PCI_DID 0x0002 // Device ID Register
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#define PCI_CMD 0x0004 // PCI Command Register
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#define PCI_STS 0x0006 // PCI Status Register
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#define PCI_RID 0x0008 // Revision ID Register
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#define PCI_IFT 0x0009 // Interface Type
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#define PCI_SCC 0x000A // Sub Class Code Register
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#define PCI_BCC 0x000B // Base Class Code Register
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#define PCI_CLS 0x000C // Cache Line Size
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#define PCI_PMLT 0x000D // Primary Master Latency Timer
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#define PCI_HDR 0x000E // Header Type Register
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#define PCI_BIST 0x000F // Built in Self Test Register
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#define PCI_BAR0 0x0010 // Base Address Register 0
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#define PCI_BAR1 0x0014 // Base Address Register 1
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#define PCI_BAR2 0x0018 // Base Address Register 2
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#define PCI_PBUS 0x0018 // Primary Bus Number Register
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#define PCI_SBUS 0x0019 // Secondary Bus Number Register
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#define PCI_SUBUS 0x001A // Subordinate Bus Number Register
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#define PCI_SMLT 0x001B // Secondary Master Latency Timer
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#define PCI_BAR3 0x001C // Base Address Register 3
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#define PCI_IOBASE 0x001C // I/O base Register
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#define PCI_IOLIMIT 0x001D // I/O Limit Register
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#define PCI_SECSTATUS 0x001E // Secondary Status Register
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#define PCI_BAR4 0x0020 // Base Address Register 4
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#define PCI_MEMBASE 0x0020 // Memory Base Register
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#define PCI_MEMLIMIT 0x0022 // Memory Limit Register
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#define PCI_BAR5 0x0024 // Base Address Register 5
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#define PCI_PRE_MEMBASE 0x0024 // Prefetchable memory Base register
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#define PCI_PRE_MEMLIMIT 0x0026 // Prefetchable memory Limit register
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#define PCI_PRE_MEMBASE_U 0x0028 // Prefetchable memory base upper 32 bits
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#define PCI_PRE_MEMLIMIT_U 0x002C // Prefetchable memory limit upper 32 bits
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#define PCI_SVID 0x002C // Subsystem Vendor ID
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#define PCI_SID 0x002E // Subsystem ID
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#define PCI_IOBASE_U 0x0030 // I/O base Upper Register
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#define PCI_IOLIMIT_U 0x0032 // I/O Limit Upper Register
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#define PCI_CAPP 0x0034 // Capabilities Pointer
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#define PCI_EROM 0x0038 // Expansion ROM Base Address
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#define PCI_INTLINE 0x003C // Interrupt Line Register
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#define PCI_INTPIN 0x003D // Interrupt Pin Register
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#define PCI_MAXGNT 0x003E // Max Grant Register
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#define PCI_BRIDGE_CNTL 0x003E // Bridge Control Register
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#define PCI_MAXLAT 0x003F // Max Latency Register
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//
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// Bit Difinitions
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//
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#ifndef BIT0
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#define BIT0 0x0001
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#define BIT1 0x0002
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#define BIT2 0x0004
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#define BIT3 0x0008
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#define BIT4 0x0010
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#define BIT5 0x0020
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#define BIT6 0x0040
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#define BIT7 0x0080
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#define BIT8 0x0100
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#define BIT9 0x0200
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#ifndef BIT10
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#define BIT10 0x0400
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#define BIT11 0x0800
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#define BIT12 0x1000
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#define BIT13 0x2000
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#define BIT14 0x4000
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#define BIT15 0x8000
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#define BIT16 0x00010000
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#define BIT17 0x00020000
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#define BIT18 0x00040000
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#define BIT19 0x00080000
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#define BIT20 0x00100000
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#define BIT21 0x00200000
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#define BIT22 0x00400000
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#define BIT23 0x00800000
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#define BIT24 0x01000000
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#define BIT25 0x02000000
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#define BIT26 0x04000000
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#define BIT27 0x08000000
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#define BIT28 0x10000000
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#define BIT29 0x20000000
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#define BIT30 0x40000000
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#define BIT31 0x80000000
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#ifndef BIT32
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#define BIT32 0x100000000
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#define BIT33 0x200000000
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#define BIT34 0x400000000
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#define BIT35 0x800000000
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#define BIT36 0x1000000000
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#define BIT37 0x2000000000
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#define BIT38 0x4000000000
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#define BIT39 0x8000000000
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#define BIT40 0x10000000000
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#define BIT41 0x20000000000
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#define BIT42 0x40000000000
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#define BIT43 0x80000000000
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#define BIT44 0x100000000000
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#define BIT45 0x200000000000
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#define BIT46 0x400000000000
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#define BIT47 0x800000000000
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#define BIT48 0x1000000000000
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#define BIT49 0x2000000000000
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#define BIT50 0x4000000000000
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#define BIT51 0x8000000000000
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#define BIT52 0x10000000000000
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#define BIT53 0x20000000000000
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#define BIT54 0x40000000000000
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#define BIT55 0x80000000000000
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#define BIT56 0x100000000000000
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#define BIT57 0x200000000000000
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#define BIT58 0x400000000000000
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#define BIT59 0x800000000000000
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#define BIT60 0x1000000000000000
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#define BIT61 0x2000000000000000
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#define BIT62 0x4000000000000000
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#define BIT63 0x8000000000000000
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#endif
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#endif
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#endif
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#endif
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