82 lines
3.1 KiB
C
82 lines
3.1 KiB
C
/** @file
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Code which supports TXT DXE component
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2019 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains an 'Intel Peripheral Driver' and is uniquely identified as
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"Intel Reference Module" and is licensed for Intel CPUs and chipsets under
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the terms of your license agreement with Intel or your vendor. This file may
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be modified by the user, subject to additional terms of the license agreement.
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@par Specification Reference:
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**/
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#include <Library/BaseLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Library/DebugLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/CpuPlatformLib.h>
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#include "CpuInitDxe.h"
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#include <Protocol/CpuNvsArea.h>
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#include <Library/CpuCommonLib.h>
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/**
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This routine updates CPU NVS for TXT feature.
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**/
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VOID
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TxtNvsUpdate (
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VOID
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)
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{
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EFI_STATUS Status;
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CPU_NVS_AREA_PROTOCOL *CpuNvsAreaProtocol;
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UINT64 Ia32FeatureControl;
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DEBUG ((DEBUG_INFO, "\n TxtNvsUdate started \n"));
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//
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// Locate Cpu Nvs
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//
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Status = gBS->LocateProtocol (&gCpuNvsAreaProtocolGuid, NULL, (VOID **) &CpuNvsAreaProtocol);
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if (Status != EFI_SUCCESS) {
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DEBUG ((DEBUG_ERROR, "\n TxtNvsUdate: Unable to Locate Cpu Nvs Protocol, SINIT ACM device will not be available\n"));
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return;
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}
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//
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// Check if TXT is enabled by BIOS
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//
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Ia32FeatureControl = AsmReadMsr64 (MSR_IA32_FEATURE_CONTROL);
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DEBUG ((DEBUG_INFO, "TxtNvsUdate: MSR_IA32_FEATURE_CONTROL=%x\n", Ia32FeatureControl));
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if ((Ia32FeatureControl & TXT_OPT_IN_VMX_AND_SMX_MSR_VALUE) == TXT_OPT_IN_VMX_AND_SMX_MSR_VALUE){
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CpuNvsAreaProtocol->Area->TxtEnabled = 1;
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} else {
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CpuNvsAreaProtocol->Area->TxtEnabled = 0;
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}
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DEBUG ((DEBUG_INFO, "CpuNvsAreaProtocol->Area->TxtEnabled = 0x%X\n", CpuNvsAreaProtocol->Area->TxtEnabled));
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return;
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}
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