93 lines
4.5 KiB
C
93 lines
4.5 KiB
C
/** @file
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Struct and GUID definitions for CpuInitDataHob.
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2013 - 2021 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains an 'Intel Peripheral Driver' and is uniquely identified as
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"Intel Reference Module" and is licensed for Intel CPUs and chipsets under
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the terms of your license agreement with Intel or your vendor. This file may
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be modified by the user, subject to additional terms of the license agreement.
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@par Specification Reference:
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**/
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#ifndef _CPU_INIT_DATA_HOB_H_
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#define _CPU_INIT_DATA_HOB_H_
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#include <Ppi/SiPolicy.h>
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#include <PowerMgmtNvsStruct.h>
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#define TDP_MAX_LEVEL 3
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extern EFI_GUID gCpuInitDataHobGuid;
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///
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/// This HOB is used to pass only the required information from PEI for DXE consumption.
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///
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typedef struct {
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UINT32 PpmFlags; /// PPM Flags Values.
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UINT8 CtdpLevelsSupported; /// ConfigTdp Number Of Levels.
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UINT8 ApplyConfigTdp; /// Enable Configurable TDP
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UINT8 LowestMaxPerf; /// Max ratio of the slowest core.
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UINT8 ConfigurablePpc; /// Boot Mode vlues for _PPC
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UINT8 ConfigTdpLevel; /// Configuration for boot TDP selection; <b>0: TDP Nominal</b>; 1: TDP Down; 2: TDP Up.
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UINT8 CtdpTar[TDP_MAX_LEVEL]; /// CTDP Levels TAR
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UINT8 ConfigTdpBootModeIndex; /// CTDP Boot Mode Index
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UINT16 CtdpPowerLimit1[TDP_MAX_LEVEL]; /// CTDP Levels Power Limit1
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UINT16 CtdpPowerLimit2[TDP_MAX_LEVEL]; /// CTDP Levels Power Limit2
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UINT8 CtdpPowerLimitWindow[TDP_MAX_LEVEL]; /// CTDP Levels Power Limit1 Time Window
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UINT8 CtdpCtc[TDP_MAX_LEVEL]; /// CTDP Levels CTC
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UINT8 CtdpPpc[TDP_MAX_LEVEL]; /// CTDP Levels PPC
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UINT8 EnableItbm; /// Enable/Disable Intel Turbo Boost Max Technology 3.0.
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UINT8 EnableItbmDriver; /// @Deprecated: Intel Turbo Boost Max Technology 3.0 Driver doesn't support for TGL.
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UINT8 EnableAllThermalFunctions;
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UINT8 PerCoreRatioOverride; /// Enable or disable Per Core PState OC supported.
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FVID_TABLE FvidTable[TPSS_FVID_MAX_STATES+1]; /// FVID Table
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/**
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Number of supported Core Voltage & Frequency Point Offset.
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**/
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UINT8 CoreVfPointCount;
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/**
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Array for the each selected Core VF Point to display the ration.
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**/
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UINT8 CoreVfPointRatio[CPU_OC_MAX_VF_POINTS];
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/**
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Array used to specific max ratio applied to each selected Core.
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**/
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UINT8 PerCoreRatio[CPU_MAX_BIG_CORES];
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/**
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Number of supported Ring Voltage & Frequency Point Offset.
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**/
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UINT8 RingVfPointCount;
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/**
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Array for the each selected Ring VF Point to display the ration.
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**/
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UINT8 RingVfPointRatio[CPU_OC_MAX_VF_POINTS];
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/**
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Array used to specific max ratio applied to each selected Atom Cluster.
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**/
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UINT8 PerAtomClusterRatio[CPU_MAX_ATOM_CLUSTERS];
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} CPU_INIT_DATA_HOB;
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#endif
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