171 lines
19 KiB
C
171 lines
19 KiB
C
//
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// Automatically generated by GenNvs ver 2.4.6
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// Please DO NOT modify !!!
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//
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/**@file
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2017 - 2021 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains an 'Intel Peripheral Driver' and is uniquely identified as
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"Intel Reference Module" and is licensed for Intel CPUs and chipsets under
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the terms of your license agreement with Intel or your vendor. This file may
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be modified by the user, subject to additional terms of the license agreement.
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@par Specification Reference:
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**/
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//
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// Define CPU NVS Area operation region.
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//
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#ifndef _CPU_NVS_AREA_DEF_H_
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#define _CPU_NVS_AREA_DEF_H_
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#pragma pack (push,1)
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typedef struct {
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UINT8 Revision; ///< Offset 0 CPU GlobalNvs Revision
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UINT32 PpmFlags; ///< Offset 1 PPM Flags Values
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UINT8 Reserved0[1]; ///< Offset 5:5
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UINT8 AutoCriticalTripPoint; ///< Offset 6 Auto Critical Trip Point
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UINT8 AutoPassiveTripPoint; ///< Offset 7 Auto Passive Trip Point
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UINT8 AutoActiveTripPoint; ///< Offset 8 Auto Active Trip Point
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UINT32 Cpuid; ///< Offset 9 CPUID
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UINT8 ConfigurablePpc; ///< Offset 13 Boot Mode vlues for _PPC
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UINT8 CtdpLevelsSupported; ///< Offset 14 ConfigTdp Number Of Levels
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UINT8 ConfigTdpBootModeIndex; ///< Offset 15 CTDP Boot Mode Index
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UINT16 CtdpPowerLimit1[3]; ///< Offset 16 CTDP Level 0 Power Limit1
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///< Offset 18 CTDP Level 1 Power Limit1
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///< Offset 20 CTDP Level 2 Power Limit1
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UINT16 CtdpPowerLimit2[3]; ///< Offset 22 CTDP Level 0 Power Limit2
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///< Offset 24 CTDP Level 1 Power Limit2
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///< Offset 26 CTDP Level 2 Power Limit2
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UINT8 CtdpPowerLimitWindow[3]; ///< Offset 28 CTDP Level 0 Power Limit1 Time Window
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///< Offset 29 CTDP Level 1 Power Limit1 Time Window
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///< Offset 30 CTDP Level 2 Power Limit1 Time Window
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UINT8 CtdpCtc[3]; ///< Offset 31 CTDP Level 0 CTC
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///< Offset 32 CTDP Level 1 CTC
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///< Offset 33 CTDP Level 2 CTC
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UINT8 CtdpTar[3]; ///< Offset 34 CTDP Level 0 TAR
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///< Offset 35 CTDP Level 1 TAR
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///< Offset 36 CTDP Level 2 TAR
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UINT8 CtdpPpc[3]; ///< Offset 37 CTDP Level 0 PPC
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///< Offset 38 CTDP Level 1 PPC
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///< Offset 39 CTDP Level 2 PPC
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UINT8 Reserved1[1]; ///< Offset 40:40
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UINT8 C6MwaitValue; ///< Offset 41 Mwait Hint value for C6
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UINT8 C7MwaitValue; ///< Offset 42 Mwait Hint value for C7/C7s
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UINT8 CDMwaitValue; ///< Offset 43 Mwait Hint value for C7/C8/C9/C10
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UINT8 Reserved2[2]; ///< Offset 44:45
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UINT16 C6Latency; ///< Offset 46 Latency Value for C6
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UINT16 C7Latency; ///< Offset 48 Latency Value for C7/C7S
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UINT16 CDLatency; ///< Offset 50 Latency Value for C8/C9/C10
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UINT16 CDIOLevel; ///< Offset 52 IO LVL value for C8/C9/C10
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UINT16 CDPowerValue; ///< Offset 54 Power value for C8/C9/C10
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UINT8 MiscPowerManagementFlags; ///< Offset 56 MiscPowerManagementFlags
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UINT8 HwpVersion; ///< Offset 57 HWP Version
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UINT8 Reserved3[27]; ///< Offset 58:84
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UINT8 LowestMaxPerf; ///< Offset 85 Max ratio of the slowest core.
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UINT8 EnableItbm; ///< Offset 86 Enable/Disable Intel Turbo Boost Max Technology 3.0.
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UINT8 OcBins; ///< Offset 87 Indicates bins of Oc support. MSR 194h FLEX_RATIO Bits (19:17)
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UINT8 TxtEnabled; ///< Offset 88 Indicates whether TXT is enabled or not based on MSR 0x3A
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UINT8 HwpEnable; ///< Offset 89 HWP Enable
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UINT8 HeteroStatus; ///< Offset 90 Indicates whether Hetero is supported by SoC
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UINT8 CoreModule[64]; ///< Offset 91 Indicates the number of cores in a module and module ID of Processor 0. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 92 Indicates the number of cores in a module and module ID of Processor 1. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 93 Indicates the number of cores in a module and module ID of Processor 2. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 94 Indicates the number of cores in a module and module ID of Processor 3. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 95 Indicates the number of cores in a module and module ID of Processor 4. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 96 Indicates the number of cores in a module and module ID of Processor 5. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 97 Indicates the number of cores in a module and module ID of Processor 6. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 98 Indicates the number of cores in a module and module ID of Processor 7. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 99 Indicates the number of cores in a module and module ID of Processor 8. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 100 Indicates the number of cores in a module and module ID of Processor 9. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 101 Indicates the number of cores in a module and module ID of Processor 10. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 102 Indicates the number of cores in a module and module ID of Processor 11. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 103 Indicates the number of cores in a module and module ID of Processor 12. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 104 Indicates the number of cores in a module and module ID of Processor 13. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 105 Indicates the number of cores in a module and module ID of Processor 14. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 106 Indicates the number of cores in a module and module ID of Processor 15. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 107 Indicates the number of cores in a module and module ID of Processor 16. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 108 Indicates the number of cores in a module and module ID of Processor 17. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 109 Indicates the number of cores in a module and module ID of Processor 18. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 110 Indicates the number of cores in a module and module ID of Processor 19. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 111 Indicates the number of cores in a module and module ID of Processor 20. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 112 Indicates the number of cores in a module and module ID of Processor 21. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 113 Indicates the number of cores in a module and module ID of Processor 22. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 114 Indicates the number of cores in a module and module ID of Processor 23. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 115 Indicates the number of cores in a module and module ID of Processor 24. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 116 Indicates the number of cores in a module and module ID of Processor 25. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 117 Indicates the number of cores in a module and module ID of Processor 26. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 118 Indicates the number of cores in a module and module ID of Processor 27. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 119 Indicates the number of cores in a module and module ID of Processor 28. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 120 Indicates the number of cores in a module and module ID of Processor 29. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 121 Indicates the number of cores in a module and module ID of Processor 30. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 122 Indicates the number of cores in a module and module ID of Processor 31. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 123 Indicates the number of cores in a module and module ID of Processor 32. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 124 Indicates the number of cores in a module and module ID of Processor 33. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 125 Indicates the number of cores in a module and module ID of Processor 34. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 126 Indicates the number of cores in a module and module ID of Processor 35. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 127 Indicates the number of cores in a module and module ID of Processor 36. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 128 Indicates the number of cores in a module and module ID of Processor 37. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 129 Indicates the number of cores in a module and module ID of Processor 38. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 130 Indicates the number of cores in a module and module ID of Processor 39. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 131 Indicates the number of cores in a module and module ID of Processor 40. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 132 Indicates the number of cores in a module and module ID of Processor 41. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 133 Indicates the number of cores in a module and module ID of Processor 42. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 134 Indicates the number of cores in a module and module ID of Processor 43. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 135 Indicates the number of cores in a module and module ID of Processor 44. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 136 Indicates the number of cores in a module and module ID of Processor 45. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 137 Indicates the number of cores in a module and module ID of Processor 46. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 138 Indicates the number of cores in a module and module ID of Processor 47. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 139 Indicates the number of cores in a module and module ID of Processor 48. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 140 Indicates the number of cores in a module and module ID of Processor 49. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 141 Indicates the number of cores in a module and module ID of Processor 50. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 142 Indicates the number of cores in a module and module ID of Processor 51. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 143 Indicates the number of cores in a module and module ID of Processor 52. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 144 Indicates the number of cores in a module and module ID of Processor 53. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 145 Indicates the number of cores in a module and module ID of Processor 54. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 146 Indicates the number of cores in a module and module ID of Processor 55. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 147 Indicates the number of cores in a module and module ID of Processor 56. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 148 Indicates the number of cores in a module and module ID of Processor 57. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 149 Indicates the number of cores in a module and module ID of Processor 58. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 150 Indicates the number of cores in a module and module ID of Processor 59. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 151 Indicates the number of cores in a module and module ID of Processor 60. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 152 Indicates the number of cores in a module and module ID of Processor 61. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 153 Indicates the number of cores in a module and module ID of Processor 62. 07:4 - Number of cores in a module. 3:0 - ModuleID
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///< Offset 154 Indicates the number of cores in a module and module ID of Processor 63. 07:4 - Number of cores in a module. 3:0 - ModuleID
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UINT32 CoreType; ///< Offset 155 Each bit indicates the core type
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UINT16 ScalingFactorSmallCore; ///< Offset 159 Indicates the Scaling Factor for Small Core
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UINT16 ScalingFactorBigCore; ///< Offset 161 Indicates the Scaling Factor for Big Core
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UINT16 NominalFrequency; ///< Offset 163 Nominal Frequency
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UINT8 IsNominalFrequencySupported; ///< Offset 165 Indicates if Nominal Frequency is supported
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UINT16 ReferencePerformanceBigCore; ///< Offset 166 Reference Performance for Big Core
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UINT16 ReferencePerformanceSmallCore; ///< Offset 168 Reference Performance for Small Core
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UINT16 SmallCoreNominalFrequency; ///< Offset 170 Small Core Nominal Frequency
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} CPU_NVS_AREA;
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#pragma pack(pop)
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#endif
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