288 lines
8.5 KiB
C
288 lines
8.5 KiB
C
/** @file
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This file contains generation specific interfaces for PEI CPU initialization.
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2020 - 2021 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains an 'Intel Peripheral Driver' and is uniquely identified as
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"Intel Reference Module" and is licensed for Intel CPUs and chipsets under
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the terms of your license agreement with Intel or your vendor. This file may
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be modified by the user, subject to additional terms of the license agreement.
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@par Specification Reference:
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**/
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#ifndef _PEI_CPU_INIT_FRU_LIB_H_
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#define _PEI_CPU_INIT_FRU_LIB_H_
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#include <ConfigBlock.h>
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#include <ConfigBlock/CpuPowerMgmtBasicConfig.h>
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#include <CpuPowerMgmtVrConfig.h>
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#include <Library/DebugLib.h>
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#include <Library/BaseLib.h>
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#include <Library/CpuCommonLib.h>
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/**
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CPU SSC configuration for specific generation.
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@param[in] ComputeDieSscEnable - Enable/Disable Compute Die SSC.
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@param[in] SocDieSscEnable - Enable/Disable Soc Die SSC.
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@param[in] ComputeDieSscValue - Compute Die SSC value to config.
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@param[in] SocDieSscValue - Soc Die SSC value to config.
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**/
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EFI_STATUS
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EFIAPI
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PeiCpuSscConfigPreMem (
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IN BOOLEAN ComputeDieSscEnable,
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IN BOOLEAN SocDieSscEnable,
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IN UINT8 ComputeDieSscValue,
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IN UINT8 SocDieSscValue
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);
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/**
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Load CPU power management basic Config block default for specific generation.
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@param[in, out] CpuPowerMgmtBasicConfig Pointer to CPU_POWER_MGMT_BASIC_CONFIG instance
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**/
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VOID
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EFIAPI
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PeiCpuLoadPowerMgmtBasicConfigDefault (
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IN OUT CPU_POWER_MGMT_BASIC_CONFIG *CpuPowerMgmtBasicConfig
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);
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/**
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Set Turbo Ratio Limit for specific generation.
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@param[in] CpuPowerMgmtBasicConfig Pointer to CPU_POWER_MGMT_BASIC_CONFIG instance
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**/
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VOID
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EFIAPI
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PeiCpuSetTurboRatioLimit (
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IN CPU_POWER_MGMT_BASIC_CONFIG *CpuPowerMgmtBasicConfig
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);
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/**
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Compare the hyper threading setup option against the CPU strap setting
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and in case of mismatch request a reset.
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@param[in] CpuStrapSetData - The current strap setting data.
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@param[in] HyperThreading - hyper threading setting from BIOS Setup option.
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@retval NO_RESET - No reset is needed.
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@retval WARM_RESET - Update requires a warm reset.
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**/
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CPU_RESET_TYPE
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PeiCpuStrapHtEnableDisable (
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IN VOID *CpuStrapSetData,
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IN UINT8 HyperThreading
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);
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/**
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Compare the number of active cores setup option against the CPU strap setting
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and in case of mismatch request a reset.
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@param[in] CpuStrapSetData - The current strap setting.
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@param[in] ActiveCoreCount - Active big core count.
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@param[in] ActiveSmallCoreCount - Active small core count.
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@param[in] ActiveSocNorthAtomCoreCount - Active Soc North atom core count.
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@retval NO_RESET - No reset is needed.
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@retval WARM_RESET - Update requires a warm reset.
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@retval COLD_RESET - Update requires a cold reset.
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**/
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CPU_RESET_TYPE
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PeiCpuStrapSetActiveCores (
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IN VOID *CpuStrapSetData,
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IN UINT8 ActiveCoreCount,
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IN UINT8 ActiveSmallCoreCount,
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IN UINT8 ActiveSocNorthAtomCoreCount
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);
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/**
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Compare the BIST setup option against the CPU strap setting
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and in case of mismatch request a reset.
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@param[in] CpuStrapSetData - The current strap setting.
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@param[in] BistOnReset - BistOnReset CPU Test Config Policy.
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@retval NO_RESET - No reset is needed.
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@retval WARM_RESET - Update requires a warm reset.
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**/
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CPU_RESET_TYPE
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PeiCpuStrapBistEnableDisable (
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IN VOID *CpuStrapSetData,
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IN UINT8 BistOnReset
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);
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/**
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Compare the flex multiplier setup options against the CPU strap settings
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and in case of mismatch request a reset.
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@param[in] CpuStrapSetData - The current strap setting.
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@param[in] CpuRatio - CpuRatio CPU policy.
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@retval NO_RESET - No reset is needed.
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@retval WARM_RESET - Update requires a warm reset.
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**/
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CPU_RESET_TYPE
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PeiCpuStrapProgramFlexMultiplier (
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IN VOID *CpuStrapSetData,
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IN UINT8 CpuRatio
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);
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/**
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Compare the boot frequency setup option against the boot ratio strap setting
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and in case of mismatch request a reset.
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@param[in] CpuStrapSetData - The current strap setting.
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@param[in] BootFrequency - BootFrequency CPU policy.
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@retval NO_RESET - No reset is needed.
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@retval WARM_RESET - Update requires a warm reset.
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**/
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CPU_RESET_TYPE
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PeiCpuStrapBootRatioEnableDisable (
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IN VOID *CpuStrapSetData,
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IN UINT8 BootFrequency
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);
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/**
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Compare the JTAG power gate setup option against the CPU strap setting
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and in case of mismatch request a reset.
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@param[in] CpuStrapSet - The current strap setting.
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@param[in] JtagC10PowerGateDisable - JtagC10PowerGateDisable CPU policy.
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@retval NO_RESET - No reset is needed.
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@retval WARM_RESET - Update requires a warm reset.
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**/
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CPU_RESET_TYPE
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PeiCpuStrapJtagPowerGateEnableDisable (
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IN VOID *CpuStrapSetData,
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IN UINT8 JtagC10PowerGateDisable
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);
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/**
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Compare the Dlvr Bypass Mode setup option against the CPU strap setting
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and in case of mismatch request a reset.
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@param[in] CpuStrapSetData - The current strap setting.
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@param[in] DlvrBypassMode - DlvrBypassMode Config Policy.
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@retval NO_RESET - No reset is needed.
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@retval WARM_RESET - Update requires a warm reset.
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**/
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CPU_RESET_TYPE
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PeiCpuStrapDlvrSetting (
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IN VOID *CpuStrapSetData,
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IN UINT8 DlvrBypassModeEnable
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);
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/**
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Return Total Memory Encryption (TME) default policy setting
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@retval Total Memory Encryption (TME) default policy setting
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**/
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UINT32
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PeiCpuTmeDefaultSetting (
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VOID
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);
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/**
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Disable or enable CPU Crashlog dump feature by Mailbox.
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@param[in] BOOLEAN Policy for CrashLog
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**/
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VOID
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PeiCpuCrashLogMailboxEnable (
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IN BOOLEAN CrashLogEnable
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);
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/**
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Program the BIOS Parameters required for MCHECK module.
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**/
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VOID
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ProgramBiosParamsForMcheck (
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VOID
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);
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/**
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Return the boot frequency default policy setting
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@retval Boot Frequency default policy setting
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**/
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UINT32
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PeiCpuBootFreqDefaultSetting (
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VOID
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);
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/**
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Set the PRMRR region.
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@param PrmrrBase PRMRR base address
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@param PrmrrSize PRMRR size
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@retval RETURN_SUCCESS PRMRR region is set successfully.
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@retval RETURN_UNSUPPORTED PRMRR is not supported.
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@retval RETURN_ACCESS_DENIED PRMRR region is already locked and cannot be changed.
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**/
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RETURN_STATUS
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PeiCpuSetPrmrrRegion (
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UINT64 PrmrrBase,
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UINT32 PrmrrSize
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);
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/**
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Configure INF_DFX power.
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@param[in] InfDfxPwrEnable. TRUE, keep INF_DFX power up; FALSE, shutdown INF_DFX power
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@retval EFI_UNSUPPORTED Command unsupported
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@retval EFI_SUCCESS Command succeeded
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**/
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EFI_STATUS
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PeiCpuInfDfxPwrEnable (
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IN BOOLEAN InfDfxPwrEnable
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);
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/**
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Update CpuStrap base on platform type
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@param[in] CpuStrapSetData - The current strap setting.
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@param[in] VendorId - VR VendorId.
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@param[in] ProdId - VR ProdId.
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@retval NO_RESET - No reset is needed.
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@retval WARM_RESET - Update requires a warm reset.
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**/
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CPU_RESET_TYPE
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PeiCpuStrapPlatformType (
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IN UINT32 *CpuStrapSetData,
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IN UINT32 VendorId,
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IN UINT32 ProdId
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);
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#endif // _PEI_CPU_INIT_FRU_LIB_H_
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