69 lines
2.5 KiB
C
69 lines
2.5 KiB
C
/** @file
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PEI Heci PPI
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2006 - 2016 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains an 'Intel Peripheral Driver' and is uniquely identified as
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"Intel Reference Module" and is licensed for Intel CPUs and chipsets under
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the terms of your license agreement with Intel or your vendor. This file may
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be modified by the user, subject to additional terms of the license agreement.
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@par Specification Reference:
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**/
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#ifndef _HECI_PPI_H_
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#define _HECI_PPI_H_
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#include <Protocol/HeciProtocol.h>
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///
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/// HECI PPI GUID
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/// This PPI provides an interface to communicate with Intel ME in PEI phase
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///
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extern EFI_GUID gHeciPpiGuid;
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///
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/// Revision
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///
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#define HECI_PPI_REVISION 1
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typedef struct _HECI_PPI HECI_PPI;
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///
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/// HECI PPI
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/// The interface functions are for sending/receiving HECI messages between host and Intel ME subsystem
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/// in PEI phase
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///
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struct _HECI_PPI {
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HECI_SENDWACK SendwAck; ///< Send HECI message and wait for respond
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HECI_READ_MESSAGE ReadMsg; ///< Read message from HECI
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HECI_SEND_MESSAGE SendMsg; ///< Send message to HECI
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HECI_INIT InitializeHeci; ///< Init HECI
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HECI_GET_ME_STATUS GetMeStatus; ///< Get Intel ME Status register
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HECI_GET_ME_MODE GetMeMode; ///< Get Intel ME mode
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};
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#endif
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