107 lines
3.6 KiB
C
107 lines
3.6 KiB
C
/** @file
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This file contains definitions of PCH Info HOB.
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2016 - 2021 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains an 'Intel Peripheral Driver' and is uniquely identified as
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"Intel Reference Module" and is licensed for Intel CPUs and chipsets under
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the terms of your license agreement with Intel or your vendor. This file may
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be modified by the user, subject to additional terms of the license agreement.
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@par Specification Reference:
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**/
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#ifndef _PCH_INFO_HOB_H_
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#define _PCH_INFO_HOB_H_
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extern EFI_GUID gPchInfoHobGuid;
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#include <PchLimits.h>
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#define PCH_INFO_HOB_REVISION 5
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#pragma pack (push,1)
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/**
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This structure is used to provide the information of PCH controller.
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<b>Revision 1</b>:
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- Initial version.
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<b>Revision 2</b>:
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- Add CridSupport, CridOrgRid, and CridNewRid.
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<b>Revision 3</b>:
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- Add Thc0Strap.
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<b>Revision 4</b>
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- Removed GbePciePortNumber
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<b>Revision 5</b>
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- Add AudioDspFusedOut
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**/
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typedef struct {
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/**
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This member specifies the revision of the PCH Info HOB. This field is used
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to indicate backwards compatible changes to the protocol. Platform code that
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consumes this protocol must read the correct revision value to correctly interpret
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the content of the protocol fields.
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**/
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UINT8 Revision;
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UINT8 PcieControllerCfg[PCH_MAX_PCIE_CONTROLLERS];
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/**
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THC strap disable/enable status
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**/
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UINT8 Thc0Strap;
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UINT32 PciePortFuses;
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/**
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Bit map for PCIe Root Port Lane setting. If bit is set it means that
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corresponding Root Port has its lane enabled.
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BIT0 - RP0, BIT1 - RP1, ...
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This information needs to be passed through HOB as FIA registers
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are not accessible with POSTBOOT_SAI
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**/
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UINT32 PciePortLaneEnabled;
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/**
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Publish Hpet BDF and IoApic BDF information for VTD.
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**/
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UINT32 HpetBusNum : 8;
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UINT32 HpetDevNum : 5;
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UINT32 HpetFuncNum : 3;
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UINT32 IoApicBusNum : 8;
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UINT32 IoApicDevNum : 5;
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UINT32 IoApicFuncNum : 3;
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/**
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Publish the CRID information.
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**/
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UINT32 CridOrgRid : 8;
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UINT32 CridNewRid : 8;
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UINT32 CridSupport : 1;
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/**
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Publish the HDA information.
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**/
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UINT32 AudioDspFusedOut : 1;
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UINT32 Rsvdbits : 14;
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} PCH_INFO_HOB;
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#pragma pack (pop)
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#endif // _PCH_INFO_HOB_H_
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