1752 lines
37 KiB
C
1752 lines
37 KiB
C
/** @file
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PCH PCIe Bus Device Function Library.
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All functions from this library are available in PEI, DXE, and SMM,
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But do not support UEFI RUNTIME environment call.
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2019 - 2021 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains an 'Intel Peripheral Driver' and is uniquely identified as
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"Intel Reference Module" and is licensed for Intel CPUs and chipsets under
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the terms of your license agreement with Intel or your vendor. This file may
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be modified by the user, subject to additional terms of the license agreement.
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@par Specification Reference:
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**/
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#include <Base.h>
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#include <Library/BaseLib.h>
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#include <Library/DebugLib.h>
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#include <Library/PciSegmentLib.h>
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#include <Library/PchInfoLib.h>
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#include <Library/PchPcieRpLib.h>
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#include <Register/PchRegs.h>
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#include <PchBdfAssignment.h>
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#include <SataSocIntegration.h>
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/**
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Check if a Device is present for PCH FRU
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If the data is defined for PCH RFU return it
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If the data is not defined (Device is NOT present) assert.
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@param[in] DataToCheck Device or Function number to check
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@retval Device or Function number value if defined for PCH FRU
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0xFF if not present in PCH FRU
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**/
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UINT8
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CheckAndReturn (
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UINT8 DataToCheck
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)
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{
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if (DataToCheck == NOT_PRESENT) {
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ASSERT (FALSE);
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}
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return DataToCheck;
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}
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/**
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Get CNVI controller PCIe Device Number
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@retval CNVI controller PCIe Device Number
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**/
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UINT8
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CnviDevNumber (
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VOID
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)
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{
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return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_CNVI_WIFI);
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}
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/**
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Get CNVI controller PCIe Function Number
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@retval CNVI controller PCIe Function Number
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**/
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UINT8
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CnviFuncNumber (
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VOID
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)
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{
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return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_CNVI_WIFI);
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}
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/**
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Get CNVI controller address that can be passed to the PCI Segment Library functions.
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@retval CNVI controller address in PCI Segment Library representation
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**/
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UINT64
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CnviPciCfgBase (
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VOID
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)
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{
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return PCI_SEGMENT_LIB_ADDRESS (
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DEFAULT_PCI_SEGMENT_NUMBER_PCH,
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DEFAULT_PCI_BUS_NUMBER_PCH,
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CnviDevNumber (),
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CnviFuncNumber (),
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0
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);
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}
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/**
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Get eSPI controller address that can be passed to the PCI Segment Library functions.
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@retval eSPI controller address in PCI Segment Library representation
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**/
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UINT64
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EspiPciCfgBase (
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VOID
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)
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{
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ASSERT (PCI_DEVICE_NUMBER_PCH_ESPI != NOT_PRESENT);
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return PCI_SEGMENT_LIB_ADDRESS (
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DEFAULT_PCI_SEGMENT_NUMBER_PCH,
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DEFAULT_PCI_BUS_NUMBER_PCH,
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PCI_DEVICE_NUMBER_PCH_ESPI,
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PCI_FUNCTION_NUMBER_PCH_ESPI,
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0
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);
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}
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/**
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Returns Gigabit Ethernet PCI Device Number
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@retval GbE device number
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**/
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UINT8
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GbeDevNumber (
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VOID
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)
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{
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return CheckAndReturn (PCI_DEVICE_NUMBER_GBE);
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}
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/**
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Returns Gigabit Ethernet PCI Function Number
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@retval GbE function number
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**/
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UINT8
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GbeFuncNumber (
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VOID
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)
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{
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return CheckAndReturn (PCI_FUNCTION_NUMBER_GBE);
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}
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/**
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Get GbE controller address that can be passed to the PCI Segment Library functions.
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@retval GbE controller address in PCI Segment Library representation
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**/
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UINT64
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GbePciCfgBase (
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VOID
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)
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{
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return PCI_SEGMENT_LIB_ADDRESS (
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DEFAULT_PCI_SEGMENT_NUMBER_PCH,
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DEFAULT_PCI_BUS_NUMBER_PCH,
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GbeDevNumber (),
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GbeFuncNumber (),
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0
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);
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}
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/**
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Get HDA PCI device number
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@retval PCI dev number
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**/
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UINT8
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HdaDevNumber (
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VOID
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)
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{
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return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_HDA);
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}
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/**
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Get HDA PCI function number
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@retval PCI fun number
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**/
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UINT8
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HdaFuncNumber (
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VOID
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)
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{
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return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_HDA);
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}
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/**
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Get HDA controller address that can be passed to the PCI Segment Library functions.
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@retval HDA controller address in PCI Segment Library representation
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**/
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UINT64
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HdaPciCfgBase (
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VOID
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)
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{
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return PCI_SEGMENT_LIB_ADDRESS (
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DEFAULT_PCI_SEGMENT_NUMBER_PCH,
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DEFAULT_PCI_BUS_NUMBER_PCH,
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HdaDevNumber (),
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HdaFuncNumber (),
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0
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);
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}
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/**
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Get IEH PCI device number
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@retval PCI dev number
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**/
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UINT8
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IehDevNumber (
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VOID
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)
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{
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return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_IEH);
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}
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/**
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Get IEH PCI function number
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@retval PCI fun number
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**/
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UINT8
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IehFuncNumber (
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VOID
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)
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{
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return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_IEH);
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}
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/**
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Get IEH controller address that can be passed to the PCI Segment Library functions.
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@retval IEH controller address in PCI Segment Library representation
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**/
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UINT64
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IehPciCfgBase (
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VOID
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)
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{
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return PCI_SEGMENT_LIB_ADDRESS (
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DEFAULT_PCI_SEGMENT_NUMBER_PCH,
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DEFAULT_PCI_BUS_NUMBER_PCH,
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IehDevNumber (),
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IehFuncNumber (),
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0
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);
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}
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/**
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Get P2SB PCI device number
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@retval PCI dev number
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**/
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UINT8
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P2sbDevNumber (
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VOID
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)
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{
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return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_P2SB);
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}
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/**
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Get P2SB PCI function number
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@retval PCI fun number
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**/
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UINT8
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P2sbFuncNumber (
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VOID
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)
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{
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return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_P2SB);
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}
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/**
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Get P2SB controller address that can be passed to the PCI Segment Library functions.
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@retval P2SB controller address in PCI Segment Library representation
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**/
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UINT64
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P2sbPciCfgBase (
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VOID
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)
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{
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return PCI_SEGMENT_LIB_ADDRESS (
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DEFAULT_PCI_SEGMENT_NUMBER_PCH,
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DEFAULT_PCI_BUS_NUMBER_PCH,
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P2sbDevNumber (),
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P2sbFuncNumber (),
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0
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);
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}
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/**
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Get ISH Device Number
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@retval ISH Device Number
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**/
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UINT8
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IshDevNumber (
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VOID
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)
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{
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return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_ISH);
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}
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/**
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Get ISH Function Number
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@retval ISH Function Number
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**/
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UINT8
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IshFuncNumber (
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VOID
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)
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{
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return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_ISH);
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}
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/**
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Get ISH controller address that can be passed to the PCI Segment Library functions.
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@retval ISH controller address in PCI Segment Library representation
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**/
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UINT64
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IshPciCfgBase (
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VOID
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)
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{
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return PCI_SEGMENT_LIB_ADDRESS (
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DEFAULT_PCI_SEGMENT_NUMBER_PCH,
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DEFAULT_PCI_BUS_NUMBER_PCH,
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IshDevNumber (),
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IshFuncNumber (),
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0
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);
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}
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/**
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Get PCH Trace Hub PCI device number
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@retval PCI dev number
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**/
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UINT8
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PchTraceHubDevNumber (
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VOID
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)
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{
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return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_TRACE_HUB);
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}
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/**
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Get PCH Trace Hub PCI function number
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@retval PCI fun number
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**/
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UINT8
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PchTraceHubFuncNumber (
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VOID
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)
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{
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return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_TRACE_HUB);
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}
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/**
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Get PCH Trace Hub PCI config space base address
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@retval PCI config space base address
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**/
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UINT64
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PchTraceHubPciCfgBase (
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VOID
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)
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{
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return PCI_SEGMENT_LIB_ADDRESS (
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DEFAULT_PCI_SEGMENT_NUMBER_PCH,
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DEFAULT_PCI_BUS_NUMBER_PCH,
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PchTraceHubDevNumber (),
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PchTraceHubFuncNumber (),
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0
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);
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}
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/**
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Get PMC PCI device number
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@retval PCI dev number
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**/
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UINT8
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PmcDevNumber (
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VOID
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)
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{
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return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PMC);
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}
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/**
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Get PMC PCI function number
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@retval PCI fun number
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**/
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UINT8
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PmcFuncNumber (
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VOID
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)
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{
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return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_PMC);
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}
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/**
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Get PMC controller address that can be passed to the PCI Segment Library functions.
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@retval PMC controller address in PCI Segment Library representation
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**/
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UINT64
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PmcPciCfgBase (
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VOID
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)
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{
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return PCI_SEGMENT_LIB_ADDRESS (
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DEFAULT_PCI_SEGMENT_NUMBER_PCH,
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DEFAULT_PCI_BUS_NUMBER_PCH,
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PmcDevNumber (),
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PmcFuncNumber (),
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0
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);
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}
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/**
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Get PMC SSRAM controller address that can be passed to the PCI Segment Library functions.
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@retval PMC SSRAM controller address in PCI Segment Library representation
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**/
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UINT64
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PmcSsramPciCfgBase (
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VOID
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)
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{
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ASSERT (PCI_DEVICE_NUMBER_PCH_PMC_SSRAM != NOT_PRESENT);
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return PCI_SEGMENT_LIB_ADDRESS (
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DEFAULT_PCI_SEGMENT_NUMBER_PCH,
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DEFAULT_PCI_BUS_NUMBER_PCH,
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PCI_DEVICE_NUMBER_PCH_PMC_SSRAM,
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PCI_FUNCTION_NUMBER_PCH_PMC_SSRAM,
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0
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);
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}
|
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/**
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Get Tsn PCI device number
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@retval PCI dev number
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**/
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UINT8
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TsnDevNumber (
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VOID
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)
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{
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return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_TSN);
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}
|
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/**
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Get Tsn PCI function number
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@retval PCI fun number
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**/
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UINT8
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TsnFuncNumber (
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VOID
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)
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{
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return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_TSN);
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}
|
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|
|
/**
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Get TSN controller address that can be passed to the PCI Segment Library functions.
|
|
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|
@retval TSN controller address in PCI Segment Library representation
|
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**/
|
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UINT64
|
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TsnPciCfgBase (
|
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VOID
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|
)
|
|
{
|
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return PCI_SEGMENT_LIB_ADDRESS (
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DEFAULT_PCI_SEGMENT_NUMBER_PCH,
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|
DEFAULT_PCI_BUS_NUMBER_PCH,
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|
TsnDevNumber (),
|
|
TsnFuncNumber (),
|
|
0
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|
);
|
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}
|
|
|
|
/**
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Returns PCH SPI Device number
|
|
|
|
@retval UINT8 PCH SPI Device number
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**/
|
|
UINT8
|
|
SpiDevNumber (
|
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VOID
|
|
)
|
|
{
|
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return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SPI);
|
|
}
|
|
|
|
/**
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|
Returns PCH SPI Function number
|
|
|
|
@retval UINT8 PCH SPI Function number
|
|
**/
|
|
UINT8
|
|
SpiFuncNumber (
|
|
VOID
|
|
)
|
|
{
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SPI);
|
|
}
|
|
|
|
/**
|
|
Returns PCH SPI PCI Config Space base address
|
|
|
|
@retval UINT64 PCH SPI Config Space base address
|
|
**/
|
|
UINT64
|
|
SpiPciCfgBase (
|
|
VOID
|
|
)
|
|
{
|
|
return PCI_SEGMENT_LIB_ADDRESS (
|
|
DEFAULT_PCI_SEGMENT_NUMBER_PCH,
|
|
DEFAULT_PCI_BUS_NUMBER_PCH,
|
|
SpiDevNumber (),
|
|
SpiFuncNumber (),
|
|
0
|
|
);
|
|
}
|
|
|
|
/**
|
|
Get XHCI controller PCIe Device Number
|
|
|
|
@retval XHCI controller PCIe Device Number
|
|
**/
|
|
UINT8
|
|
PchXhciDevNumber (
|
|
VOID
|
|
)
|
|
{
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_XHCI);
|
|
}
|
|
|
|
/**
|
|
Get XHCI controller PCIe Function Number
|
|
|
|
@retval XHCI controller PCIe Function Number
|
|
**/
|
|
UINT8
|
|
PchXhciFuncNumber (
|
|
VOID
|
|
)
|
|
{
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_XHCI);
|
|
}
|
|
|
|
/**
|
|
Get XHCI controller address that can be passed to the PCI Segment Library functions.
|
|
|
|
@retval XHCI controller address in PCI Segment Library representation
|
|
**/
|
|
UINT64
|
|
PchXhciPciCfgBase (
|
|
VOID
|
|
)
|
|
{
|
|
return PCI_SEGMENT_LIB_ADDRESS (
|
|
DEFAULT_PCI_SEGMENT_NUMBER_PCH,
|
|
DEFAULT_PCI_BUS_NUMBER_PCH,
|
|
PchXhciDevNumber (),
|
|
PchXhciFuncNumber (),
|
|
0
|
|
);
|
|
}
|
|
|
|
/**
|
|
Get XDCI controller PCIe Device Number
|
|
|
|
@retval XDCI controller PCIe Device Number
|
|
**/
|
|
UINT8
|
|
PchXdciDevNumber (
|
|
VOID
|
|
)
|
|
{
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_XDCI);
|
|
}
|
|
|
|
/**
|
|
Get XDCI controller PCIe Function Number
|
|
|
|
@retval XDCI controller PCIe Function Number
|
|
**/
|
|
UINT8
|
|
PchXdciFuncNumber (
|
|
VOID
|
|
)
|
|
{
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_XDCI);
|
|
}
|
|
|
|
/**
|
|
Get XDCI controller address that can be passed to the PCI Segment Library functions.
|
|
|
|
@retval XDCI controller address in PCI Segment Library representation
|
|
**/
|
|
UINT64
|
|
PchXdciPciCfgBase (
|
|
VOID
|
|
)
|
|
{
|
|
return PCI_SEGMENT_LIB_ADDRESS (
|
|
DEFAULT_PCI_SEGMENT_NUMBER_PCH,
|
|
DEFAULT_PCI_BUS_NUMBER_PCH,
|
|
PchXdciDevNumber (),
|
|
PchXdciFuncNumber (),
|
|
0
|
|
);
|
|
}
|
|
|
|
/**
|
|
Return Smbus Device Number
|
|
|
|
@retval Smbus Device Number
|
|
**/
|
|
UINT8
|
|
SmbusDevNumber (
|
|
VOID
|
|
)
|
|
{
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SMBUS);
|
|
}
|
|
|
|
/**
|
|
Return Smbus Function Number
|
|
|
|
@retval Smbus Function Number
|
|
**/
|
|
UINT8
|
|
SmbusFuncNumber (
|
|
VOID
|
|
)
|
|
{
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SMBUS);
|
|
}
|
|
|
|
/**
|
|
Get SMBUS controller address that can be passed to the PCI Segment Library functions.
|
|
|
|
@retval SMBUS controller address in PCI Segment Library representation
|
|
**/
|
|
UINT64
|
|
SmbusPciCfgBase (
|
|
VOID
|
|
)
|
|
{
|
|
return PCI_SEGMENT_LIB_ADDRESS (
|
|
DEFAULT_PCI_SEGMENT_NUMBER_PCH,
|
|
DEFAULT_PCI_BUS_NUMBER_PCH,
|
|
SmbusDevNumber (),
|
|
SmbusFuncNumber (),
|
|
0
|
|
);
|
|
}
|
|
|
|
/**
|
|
Return DMA Smbus Device Number
|
|
|
|
@retval DMA Smbus Device Number
|
|
**/
|
|
UINT8
|
|
SmbusDmaDevNumber (
|
|
VOID
|
|
)
|
|
{
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_DMA_SMBUS);
|
|
}
|
|
|
|
/**
|
|
Return DMA Smbus Function Number
|
|
|
|
@retval DMA Smbus Function Number
|
|
**/
|
|
UINT8
|
|
SmbusDmaFuncNumber (
|
|
VOID
|
|
)
|
|
{
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_DMA_SMBUS);
|
|
}
|
|
|
|
/**
|
|
Get DMA SMBUS controller address that can be passed to the PCI Segment Library functions.
|
|
|
|
@retval DMA SMBUS controller address in PCI Segment Library representation
|
|
**/
|
|
UINT64
|
|
SmbusDmaPciCfgBase (
|
|
VOID
|
|
)
|
|
{
|
|
return PCI_SEGMENT_LIB_ADDRESS (
|
|
DEFAULT_PCI_SEGMENT_NUMBER_PCH,
|
|
DEFAULT_PCI_BUS_NUMBER_PCH,
|
|
SmbusDmaDevNumber (),
|
|
SmbusDmaFuncNumber (),
|
|
0
|
|
);
|
|
}
|
|
|
|
/**
|
|
Get SD Card controller PCIe Device Number
|
|
|
|
@retval SD Card controller PCIe Device Number
|
|
**/
|
|
UINT8
|
|
ScsSdCardDevNumber (
|
|
VOID
|
|
)
|
|
{
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SCS_SDCARD);
|
|
}
|
|
|
|
/**
|
|
Get SD Card controller PCIe Function Number
|
|
|
|
@retval SD Card controller PCIe Function Number
|
|
**/
|
|
UINT8
|
|
ScsSdCardFuncNumber (
|
|
VOID
|
|
)
|
|
{
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SCS_SDCARD);
|
|
}
|
|
|
|
/**
|
|
Get SCS SD Card controller address that can be passed to the PCI Segment Library functions.
|
|
|
|
@retval SCS SD Card controller address in PCI Segment Library representation
|
|
**/
|
|
UINT64
|
|
ScsSdCardPciCfgBase (
|
|
VOID
|
|
)
|
|
{
|
|
return PCI_SEGMENT_LIB_ADDRESS (
|
|
DEFAULT_PCI_SEGMENT_NUMBER_PCH,
|
|
DEFAULT_PCI_BUS_NUMBER_PCH,
|
|
ScsSdCardDevNumber (),
|
|
ScsSdCardFuncNumber (),
|
|
0
|
|
);
|
|
}
|
|
|
|
/**
|
|
Get EMMC controller PCIe Device Number
|
|
|
|
@retval EMMC controller PCIe Device Number
|
|
**/
|
|
UINT8
|
|
ScsEmmcDevNumber (
|
|
VOID
|
|
)
|
|
{
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SCS_EMMC);
|
|
}
|
|
|
|
/**
|
|
Get EMMC controller PCIe Function Number
|
|
|
|
@retval EMMC controller PCIe Function Number
|
|
**/
|
|
UINT8
|
|
ScsEmmcFuncNumber (
|
|
VOID
|
|
)
|
|
{
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SCS_EMMC);
|
|
}
|
|
|
|
/**
|
|
Get SCS EMMC controller address that can be passed to the PCI Segment Library functions.
|
|
|
|
@retval SCS EMMC controller address in PCI Segment Library representation
|
|
**/
|
|
UINT64
|
|
ScsEmmcPciCfgBase (
|
|
VOID
|
|
)
|
|
{
|
|
return PCI_SEGMENT_LIB_ADDRESS (
|
|
DEFAULT_PCI_SEGMENT_NUMBER_PCH,
|
|
DEFAULT_PCI_BUS_NUMBER_PCH,
|
|
ScsEmmcDevNumber (),
|
|
ScsEmmcFuncNumber (),
|
|
0
|
|
);
|
|
}
|
|
|
|
/**
|
|
Get UFS controller PCIe Device Number
|
|
|
|
@param[in] UfsIndex Index of the UFS controller
|
|
|
|
@retval UFS controller PCIe Device Number
|
|
**/
|
|
UINT8
|
|
ScsUfsDevNumber (
|
|
IN UINT8 UfsIndex
|
|
)
|
|
{
|
|
switch (UfsIndex) {
|
|
case 0:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SCS_UFS0);
|
|
case 1:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SCS_UFS1);
|
|
default:
|
|
ASSERT (FALSE);
|
|
return 0xFF;
|
|
}
|
|
}
|
|
|
|
/**
|
|
Get UFS controller PCIe Function Number
|
|
|
|
@param[in] UfsIndex Index of the UFS controller
|
|
|
|
@retval UFS controller PCIe Function Number
|
|
**/
|
|
UINT8
|
|
ScsUfsFuncNumber (
|
|
IN UINT8 UfsIndex
|
|
)
|
|
{
|
|
switch (UfsIndex) {
|
|
case 0:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SCS_UFS0);
|
|
case 1:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SCS_UFS1);
|
|
default:
|
|
ASSERT (FALSE);
|
|
return 0xFF;
|
|
}
|
|
}
|
|
|
|
/**
|
|
Get SCS EMMC controller address that can be passed to the PCI Segment Library functions.
|
|
|
|
@param[in] UfsIndex Index of the UFS controller
|
|
|
|
@retval SCS EMMC controller address in PCI Segment Library representation
|
|
**/
|
|
UINT64
|
|
ScsUfsPciCfgBase (
|
|
IN UINT8 UfsIndex
|
|
)
|
|
{
|
|
return PCI_SEGMENT_LIB_ADDRESS (
|
|
DEFAULT_PCI_SEGMENT_NUMBER_PCH,
|
|
DEFAULT_PCI_BUS_NUMBER_PCH,
|
|
ScsUfsDevNumber (UfsIndex),
|
|
ScsUfsFuncNumber (UfsIndex),
|
|
0
|
|
);
|
|
}
|
|
|
|
/**
|
|
Get SATA controller PCIe Device Number
|
|
|
|
@param[in] SataCtrlIndex SATA controller index
|
|
|
|
@retval SATA controller PCIe Device Number
|
|
**/
|
|
UINT8
|
|
SataDevNumber (
|
|
IN UINT32 SataCtrlIndex
|
|
)
|
|
{
|
|
ASSERT (SataCtrlIndex < MAX_SATA_CONTROLLER);
|
|
|
|
if (SataCtrlIndex == 0) {
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SATA_1);
|
|
} else if (SataCtrlIndex == 1) {
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SATA_2);
|
|
} else if (SataCtrlIndex == 2) {
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SATA_3);
|
|
} else {
|
|
ASSERT (FALSE);
|
|
return 0xFF;
|
|
}
|
|
}
|
|
|
|
/**
|
|
Get SATA controller PCIe Function Number
|
|
|
|
@param[in] SataCtrlIndex SATA controller index
|
|
|
|
@retval SATA controller PCIe Function Number
|
|
**/
|
|
UINT8
|
|
SataFuncNumber (
|
|
IN UINT32 SataCtrlIndex
|
|
)
|
|
{
|
|
ASSERT (SataCtrlIndex < MAX_SATA_CONTROLLER);
|
|
|
|
if (SataCtrlIndex == 0) {
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SATA_1);
|
|
} else if (SataCtrlIndex == 1) {
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SATA_2);
|
|
} else if (SataCtrlIndex == 2) {
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SATA_3);
|
|
} else {
|
|
ASSERT (FALSE);
|
|
return 0xFF;
|
|
}
|
|
}
|
|
|
|
/**
|
|
Get SATA controller address that can be passed to the PCI Segment Library functions.
|
|
|
|
@param[in] SataCtrlIndex SATA controller index
|
|
|
|
@retval SATA controller address in PCI Segment Library representation
|
|
**/
|
|
UINT64
|
|
SataPciCfgBase (
|
|
IN UINT32 SataCtrlIndex
|
|
)
|
|
{
|
|
return PCI_SEGMENT_LIB_ADDRESS (
|
|
DEFAULT_PCI_SEGMENT_NUMBER_PCH,
|
|
DEFAULT_PCI_BUS_NUMBER_PCH,
|
|
SataDevNumber (SataCtrlIndex),
|
|
SataFuncNumber (SataCtrlIndex),
|
|
0
|
|
);
|
|
}
|
|
|
|
/**
|
|
Get LPC controller PCIe Device Number
|
|
|
|
@retval LPC controller PCIe Device Number
|
|
**/
|
|
UINT8
|
|
LpcDevNumber (
|
|
VOID
|
|
)
|
|
{
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_LPC);
|
|
}
|
|
|
|
/**
|
|
Get LPC controller PCIe Function Number
|
|
|
|
@retval LPC controller PCIe Function Number
|
|
**/
|
|
UINT8
|
|
LpcFuncNumber (
|
|
VOID
|
|
)
|
|
{
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_LPC);
|
|
}
|
|
|
|
/**
|
|
Returns PCH LPC device PCI base address.
|
|
|
|
@retval PCH LPC PCI base address.
|
|
**/
|
|
UINT64
|
|
LpcPciCfgBase (
|
|
VOID
|
|
)
|
|
{
|
|
return PCI_SEGMENT_LIB_ADDRESS (
|
|
DEFAULT_PCI_SEGMENT_NUMBER_PCH,
|
|
DEFAULT_PCI_BUS_NUMBER_PCH,
|
|
LpcDevNumber (),
|
|
LpcFuncNumber (),
|
|
0
|
|
);
|
|
}
|
|
|
|
/**
|
|
Get Thermal Device PCIe Device Number
|
|
|
|
@retval Thermal Device PCIe Device Number
|
|
**/
|
|
UINT8
|
|
ThermalDevNumber (
|
|
VOID
|
|
)
|
|
{
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_THERMAL);
|
|
}
|
|
|
|
/**
|
|
Get Thermal Device PCIe Function Number
|
|
|
|
@retval Thermal Device PCIe Function Number
|
|
**/
|
|
UINT8
|
|
ThermalFuncNumber (
|
|
VOID
|
|
)
|
|
{
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_THERMAL);
|
|
}
|
|
|
|
/**
|
|
Returns Thermal Device PCI base address.
|
|
|
|
@retval Thermal Device PCI base address.
|
|
**/
|
|
UINT64
|
|
ThermalPciCfgBase (
|
|
VOID
|
|
)
|
|
{
|
|
return PCI_SEGMENT_LIB_ADDRESS (
|
|
DEFAULT_PCI_SEGMENT_NUMBER_PCH,
|
|
DEFAULT_PCI_BUS_NUMBER_PCH,
|
|
ThermalDevNumber (),
|
|
ThermalFuncNumber (),
|
|
0
|
|
);
|
|
}
|
|
|
|
/**
|
|
Get Serial IO I2C controller PCIe Device Number
|
|
|
|
@param[in] I2cNumber Serial IO I2C controller index
|
|
|
|
@retval Serial IO I2C controller PCIe Device Number
|
|
**/
|
|
UINT8
|
|
SerialIoI2cDevNumber (
|
|
IN UINT8 I2cNumber
|
|
)
|
|
{
|
|
if (GetPchMaxSerialIoI2cControllersNum () <= I2cNumber) {
|
|
ASSERT (FALSE);
|
|
return 0xFF;
|
|
}
|
|
switch (I2cNumber) {
|
|
case 0:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_I2C0);
|
|
case 1:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_I2C1);
|
|
case 2:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_I2C2);
|
|
case 3:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_I2C3);
|
|
case 4:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_I2C4);
|
|
case 5:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_I2C5);
|
|
case 6:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_I2C6);
|
|
case 7:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_I2C7);
|
|
default:
|
|
ASSERT (FALSE);
|
|
return 0xFF;
|
|
}
|
|
}
|
|
|
|
/**
|
|
Get Serial IO I2C controller PCIe Function Number
|
|
|
|
@param[in] I2cNumber Serial IO I2C controller index
|
|
|
|
@retval Serial IO I2C controller PCIe Function Number
|
|
**/
|
|
UINT8
|
|
SerialIoI2cFuncNumber (
|
|
IN UINT8 I2cNumber
|
|
)
|
|
{
|
|
if (GetPchMaxSerialIoI2cControllersNum () <= I2cNumber) {
|
|
ASSERT (FALSE);
|
|
return 0xFF;
|
|
}
|
|
switch (I2cNumber) {
|
|
case 0:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_I2C0);
|
|
case 1:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_I2C1);
|
|
case 2:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_I2C2);
|
|
case 3:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_I2C3);
|
|
case 4:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_I2C4);
|
|
case 5:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_I2C5);
|
|
case 6:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_I2C6);
|
|
case 7:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_I2C7);
|
|
default:
|
|
ASSERT (FALSE);
|
|
return 0xFF;
|
|
}
|
|
}
|
|
|
|
/**
|
|
Get Serial IO I3C controller PCIe Device Number
|
|
|
|
@param[in] I3CNumber Serial IO I3C controller index
|
|
|
|
@retval Serial IO I3C controller PCIe Device Number
|
|
**/
|
|
UINT8
|
|
SerialIoI3cDevNumber (
|
|
IN UINT8 I3cNumber
|
|
)
|
|
{
|
|
if (GetPchMaxSerialIoI3cControllersNum () <= I3cNumber) {
|
|
ASSERT (FALSE);
|
|
return 0xFF;
|
|
}
|
|
switch (I3cNumber) {
|
|
case 0:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_I3C0);
|
|
default:
|
|
ASSERT (FALSE);
|
|
return 0xFF;
|
|
}
|
|
}
|
|
|
|
/**
|
|
Get Serial IO I3C controller PCIe Function Number
|
|
|
|
@param[in] I3cNumber Serial IO I3C controller index
|
|
|
|
@retval Serial IO I3C controller PCIe Function Number
|
|
**/
|
|
UINT8
|
|
SerialIoI3cFuncNumber (
|
|
IN UINT8 I3cNumber
|
|
)
|
|
{
|
|
if (GetPchMaxSerialIoI3cControllersNum () <= I3cNumber) {
|
|
ASSERT (FALSE);
|
|
return 0xFF;
|
|
}
|
|
switch (I3cNumber) {
|
|
case 0:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_I3C0);
|
|
default:
|
|
ASSERT (FALSE);
|
|
return 0xFF;
|
|
}
|
|
}
|
|
|
|
|
|
/**
|
|
Get Serial IO I2C controller address that can be passed to the PCI Segment Library functions.
|
|
|
|
@param[in] I2cNumber Serial IO I2C controller index
|
|
|
|
@retval Serial IO I2C controller address in PCI Segment Library representation
|
|
**/
|
|
UINT64
|
|
SerialIoI2cPciCfgBase (
|
|
IN UINT8 I2cNumber
|
|
)
|
|
{
|
|
return PCI_SEGMENT_LIB_ADDRESS (
|
|
DEFAULT_PCI_SEGMENT_NUMBER_PCH,
|
|
DEFAULT_PCI_BUS_NUMBER_PCH,
|
|
SerialIoI2cDevNumber (I2cNumber),
|
|
SerialIoI2cFuncNumber (I2cNumber),
|
|
0
|
|
);
|
|
}
|
|
|
|
/**
|
|
Get Serial IO I3C controller address that can be passed to the PCI Segment Library functions.
|
|
|
|
@param[in] I3cNumber Serial IO I3C controller index
|
|
|
|
@retval Serial IO I3C controller address in PCI Segment Library representation
|
|
**/
|
|
UINT64
|
|
SerialIoI3cPciCfgBase (
|
|
IN UINT8 I3cNumber
|
|
)
|
|
{
|
|
return PCI_SEGMENT_LIB_ADDRESS (
|
|
DEFAULT_PCI_SEGMENT_NUMBER_PCH,
|
|
DEFAULT_PCI_BUS_NUMBER_PCH,
|
|
SerialIoI3cDevNumber (I3cNumber),
|
|
SerialIoI3cFuncNumber (I3cNumber),
|
|
0
|
|
);
|
|
}
|
|
|
|
/**
|
|
Get Serial IO SPI controller PCIe Device Number
|
|
|
|
@param[in] I2cNumber Serial IO SPI controller index
|
|
|
|
@retval Serial IO SPI controller PCIe Device Number
|
|
**/
|
|
UINT8
|
|
SerialIoSpiDevNumber (
|
|
IN UINT8 SpiNumber
|
|
)
|
|
{
|
|
if (GetPchMaxSerialIoSpiControllersNum () <= SpiNumber) {
|
|
ASSERT (FALSE);
|
|
return 0xFF;
|
|
}
|
|
if (IsPchH ()) {
|
|
switch (SpiNumber) {
|
|
case 0:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_SPI0);
|
|
case 1:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_SPI1);
|
|
case 2:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_SPI2);
|
|
case 3:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_SPI3);
|
|
case 4:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_SPI4);
|
|
case 5:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_H_SERIAL_IO_SPI5);
|
|
case 6:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_H_SERIAL_IO_SPI6);
|
|
default:
|
|
ASSERT (FALSE);
|
|
return 0xFF;
|
|
}
|
|
}
|
|
switch (SpiNumber) {
|
|
case 0:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_SPI0);
|
|
case 1:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_SPI1);
|
|
case 2:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_SPI2);
|
|
case 3:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_SPI3);
|
|
case 4:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_SPI4);
|
|
case 5:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_SPI5);
|
|
case 6:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_SPI6);
|
|
default:
|
|
ASSERT (FALSE);
|
|
return 0xFF;
|
|
}
|
|
}
|
|
|
|
/**
|
|
Get Serial IO SPI controller PCIe Function Number
|
|
|
|
@param[in] SpiNumber Serial IO SPI controller index
|
|
|
|
@retval Serial IO SPI controller PCIe Function Number
|
|
**/
|
|
UINT8
|
|
SerialIoSpiFuncNumber (
|
|
IN UINT8 SpiNumber
|
|
)
|
|
{
|
|
if (GetPchMaxSerialIoSpiControllersNum () <= SpiNumber) {
|
|
ASSERT (FALSE);
|
|
return 0xFF;
|
|
}
|
|
if (IsPchH ()) {
|
|
switch (SpiNumber) {
|
|
case 0:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_SPI0);
|
|
case 1:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_SPI1);
|
|
case 2:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_SPI2);
|
|
case 3:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_SPI3);
|
|
case 4:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_SPI4);
|
|
case 5:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_H_SERIAL_IO_SPI5);
|
|
case 6:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_H_SERIAL_IO_SPI6);
|
|
default:
|
|
ASSERT (FALSE);
|
|
return 0xFF;
|
|
}
|
|
}
|
|
switch (SpiNumber) {
|
|
case 0:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_SPI0);
|
|
case 1:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_SPI1);
|
|
case 2:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_SPI2);
|
|
case 3:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_SPI3);
|
|
case 4:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_SPI4);
|
|
case 5:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_SPI5);
|
|
case 6:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_SPI6);
|
|
default:
|
|
ASSERT (FALSE);
|
|
return 0xFF;
|
|
}
|
|
}
|
|
|
|
/**
|
|
Get Serial IO SPI controller address that can be passed to the PCI Segment Library functions.
|
|
|
|
@param[in] SpiNumber Serial IO SPI controller index
|
|
|
|
@retval Serial IO SPI controller address in PCI Segment Library representation
|
|
**/
|
|
UINT64
|
|
SerialIoSpiPciCfgBase (
|
|
IN UINT8 SpiNumber
|
|
)
|
|
{
|
|
return PCI_SEGMENT_LIB_ADDRESS (
|
|
DEFAULT_PCI_SEGMENT_NUMBER_PCH,
|
|
DEFAULT_PCI_BUS_NUMBER_PCH,
|
|
SerialIoSpiDevNumber (SpiNumber),
|
|
SerialIoSpiFuncNumber (SpiNumber),
|
|
0
|
|
);
|
|
}
|
|
|
|
/**
|
|
Get Serial IO UART controller PCIe Device Number
|
|
|
|
@param[in] UartNumber Serial IO UART controller index
|
|
|
|
@retval Serial IO UART controller PCIe Device Number
|
|
**/
|
|
UINT8
|
|
SerialIoUartDevNumber (
|
|
IN UINT8 UartNumber
|
|
)
|
|
{
|
|
if (GetPchMaxSerialIoUartControllersNum () <= UartNumber) {
|
|
ASSERT (FALSE);
|
|
return 0xFF;
|
|
}
|
|
switch (UartNumber) {
|
|
case 0:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_UART0);
|
|
case 1:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_UART1);
|
|
case 2:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_UART2);
|
|
case 3:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_UART3);
|
|
case 4:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_UART4);
|
|
case 5:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_UART5);
|
|
case 6:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SERIAL_IO_UART6);
|
|
default:
|
|
ASSERT (FALSE);
|
|
return 0xFF;
|
|
}
|
|
}
|
|
|
|
/**
|
|
Get Serial IO UART controller PCIe Function Number
|
|
|
|
@param[in] UartNumber Serial IO UART controller index
|
|
|
|
@retval Serial IO UART controller PCIe Function Number
|
|
**/
|
|
UINT8
|
|
SerialIoUartFuncNumber (
|
|
IN UINT8 UartNumber
|
|
)
|
|
{
|
|
if (GetPchMaxSerialIoUartControllersNum () <= UartNumber) {
|
|
ASSERT (FALSE);
|
|
return 0xFF;
|
|
}
|
|
switch (UartNumber) {
|
|
case 0:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_UART0);
|
|
case 1:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_UART1);
|
|
case 2:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_UART2);
|
|
case 3:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_UART3);
|
|
case 4:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_UART4);
|
|
case 5:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_UART5);
|
|
case 6:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SERIAL_IO_UART6);
|
|
default:
|
|
ASSERT (FALSE);
|
|
return 0xFF;
|
|
}
|
|
}
|
|
|
|
/**
|
|
Get Serial IO UART controller address that can be passed to the PCI Segment Library functions.
|
|
|
|
@param[in] UartNumber Serial IO UART controller index
|
|
|
|
@retval Serial IO UART controller address in PCI Segment Library representation
|
|
**/
|
|
UINT64
|
|
SerialIoUartPciCfgBase (
|
|
IN UINT8 UartNumber
|
|
)
|
|
{
|
|
return PCI_SEGMENT_LIB_ADDRESS (
|
|
DEFAULT_PCI_SEGMENT_NUMBER_PCH,
|
|
DEFAULT_PCI_BUS_NUMBER_PCH,
|
|
SerialIoUartDevNumber (UartNumber),
|
|
SerialIoUartFuncNumber (UartNumber),
|
|
0
|
|
);
|
|
}
|
|
|
|
/**
|
|
Get PCH PCIe controller PCIe Device Number
|
|
|
|
@param[in] RpIndex Root port physical number. (0-based)
|
|
|
|
@retval PCH PCIe controller PCIe Device Number
|
|
**/
|
|
UINT8
|
|
PchPcieRpDevNumber (
|
|
IN UINTN RpIndex
|
|
)
|
|
{
|
|
switch (RpIndex) {
|
|
case 0:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_1);
|
|
case 1:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_2);
|
|
case 2:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_3);
|
|
case 3:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_4);
|
|
case 4:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_5);
|
|
case 5:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_6);
|
|
case 6:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_7);
|
|
case 7:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_8);
|
|
case 8:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_9);
|
|
case 9:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_10);
|
|
case 10:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_11);
|
|
case 11:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_12);
|
|
case 12:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_13);
|
|
case 13:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_14);
|
|
case 14:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_15);
|
|
case 15:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_16);
|
|
case 16:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_17);
|
|
case 17:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_18);
|
|
case 18:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_19);
|
|
case 19:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_20);
|
|
case 20:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_21);
|
|
case 21:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_22);
|
|
case 22:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_23);
|
|
case 23:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_24);
|
|
case 24:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_25);
|
|
case 25:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_26);
|
|
case 26:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_27);
|
|
case 27:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORT_28);
|
|
|
|
default:
|
|
ASSERT (FALSE);
|
|
return 0xFF;
|
|
}
|
|
}
|
|
|
|
/**
|
|
Get PCH PCIe controller PCIe Function Number
|
|
Note:
|
|
For Client PCH generations Function Number can be various
|
|
depending on "Root Port Function Swapping". For such cases
|
|
Function Number MUST be obtain from proper register.
|
|
For Server PCHs we have no "Root Port Function Swapping"
|
|
and we can return fixed Function Number.
|
|
To address this difference in this, PCH generation independent,
|
|
library we should call specific function in PchPcieRpLib.
|
|
|
|
@param[in] RpIndex Root port physical number. (0-based)
|
|
|
|
@retval PCH PCIe controller PCIe Function Number
|
|
**/
|
|
UINT8
|
|
PchPcieRpFuncNumber (
|
|
IN UINTN RpIndex
|
|
)
|
|
{
|
|
UINTN Device;
|
|
UINTN Function;
|
|
|
|
GetPchPcieRpDevFun (RpIndex, &Device, &Function);
|
|
|
|
return (UINT8)Function;
|
|
}
|
|
|
|
/**
|
|
Get PCH PCIe controller address that can be passed to the PCI Segment Library functions.
|
|
|
|
@param[in] RpIndex PCH PCIe Root Port physical number. (0-based)
|
|
|
|
@retval PCH PCIe controller address in PCI Segment Library representation
|
|
**/
|
|
UINT64
|
|
PchPcieRpPciCfgBase (
|
|
IN UINT32 RpIndex
|
|
)
|
|
{
|
|
return PCI_SEGMENT_LIB_ADDRESS (
|
|
DEFAULT_PCI_SEGMENT_NUMBER_PCH,
|
|
DEFAULT_PCI_BUS_NUMBER_PCH,
|
|
PchPcieRpDevNumber (RpIndex),
|
|
PchPcieRpFuncNumber (RpIndex),
|
|
0
|
|
);
|
|
}
|
|
|
|
/**
|
|
Get HECI1 PCI device number
|
|
|
|
@retval PCI dev number
|
|
**/
|
|
UINT8
|
|
PchHeci1DevNumber (
|
|
VOID
|
|
)
|
|
{
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_HECI1);
|
|
}
|
|
|
|
/**
|
|
Get HECI1 PCI function number
|
|
|
|
@retval PCI fun number
|
|
**/
|
|
UINT8
|
|
PchHeci1FuncNumber (
|
|
VOID
|
|
)
|
|
{
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_HECI1);
|
|
}
|
|
|
|
/**
|
|
Get HECI1 controller address that can be passed to the PCI Segment Library functions.
|
|
|
|
@retval HECI1 controller address in PCI Segment Library representation
|
|
**/
|
|
UINT64
|
|
PchHeci1PciCfgBase (
|
|
VOID
|
|
)
|
|
{
|
|
return PCI_SEGMENT_LIB_ADDRESS (
|
|
DEFAULT_PCI_SEGMENT_NUMBER_PCH,
|
|
DEFAULT_PCI_BUS_NUMBER_PCH,
|
|
PchHeci1DevNumber (),
|
|
PchHeci1FuncNumber (),
|
|
0
|
|
);
|
|
}
|
|
|
|
/**
|
|
Get HECI3 PCI device number
|
|
|
|
@retval PCI dev number
|
|
**/
|
|
UINT8
|
|
PchHeci3DevNumber (
|
|
VOID
|
|
)
|
|
{
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_HECI3);
|
|
}
|
|
|
|
/**
|
|
Get HECI3 PCI function number
|
|
|
|
@retval PCI fun number
|
|
**/
|
|
UINT8
|
|
PchHeci3FuncNumber (
|
|
VOID
|
|
)
|
|
{
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_HECI3);
|
|
}
|
|
|
|
/**
|
|
Get HECI3 controller address that can be passed to the PCI Segment Library functions.
|
|
|
|
@retval HECI3 controller address in PCI Segment Library representation
|
|
**/
|
|
UINT64
|
|
PchHeci3PciCfgBase (
|
|
VOID
|
|
)
|
|
{
|
|
return PCI_SEGMENT_LIB_ADDRESS (
|
|
DEFAULT_PCI_SEGMENT_NUMBER_PCH,
|
|
DEFAULT_PCI_BUS_NUMBER_PCH,
|
|
PchHeci3DevNumber (),
|
|
PchHeci3FuncNumber (),
|
|
0
|
|
);
|
|
}
|
|
|
|
/**
|
|
Get Touch Host Controller PCIe Device Number
|
|
|
|
@param[in] ThcNumber THC controller index
|
|
|
|
@retval THC controller PCIe Device Number
|
|
**/
|
|
UINT8
|
|
ThcDevNumber (
|
|
IN UINT8 ThcNumber
|
|
)
|
|
{
|
|
if (GetPchMaxThcCount () <= ThcNumber) {
|
|
ASSERT (FALSE);
|
|
return 0xFF;
|
|
}
|
|
switch (ThcNumber) {
|
|
case 0:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_THC0);
|
|
case 1:
|
|
return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_THC1);
|
|
default:
|
|
ASSERT (FALSE);
|
|
return 0xFF;
|
|
}
|
|
}
|
|
|
|
/**
|
|
Get Touch Host Controller PCIe Function Number
|
|
|
|
@param[in] ThcNumber THC controller index
|
|
|
|
@retval THC controller PCIe Function Number
|
|
**/
|
|
UINT8
|
|
ThcFuncNumber (
|
|
IN UINT8 ThcNumber
|
|
)
|
|
{
|
|
if (GetPchMaxThcCount () <= ThcNumber) {
|
|
ASSERT (FALSE);
|
|
return 0xFF;
|
|
}
|
|
switch (ThcNumber) {
|
|
case 0:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_THC0);
|
|
case 1:
|
|
return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_THC1);
|
|
default:
|
|
ASSERT (FALSE);
|
|
return 0xFF;
|
|
}
|
|
}
|
|
|
|
/**
|
|
Get Touch Host Controller address that can be passed to the PCI Segment Library functions.
|
|
|
|
@param[in] ThcNumber THC controller index
|
|
|
|
@retval THC controller address in PCI Segment Library representation
|
|
**/
|
|
UINT64
|
|
ThcPciCfgBase (
|
|
IN UINT8 ThcNumber
|
|
)
|
|
{
|
|
return PCI_SEGMENT_LIB_ADDRESS (
|
|
DEFAULT_PCI_SEGMENT_NUMBER_PCH,
|
|
DEFAULT_PCI_BUS_NUMBER_PCH,
|
|
ThcDevNumber (ThcNumber),
|
|
ThcFuncNumber (ThcNumber),
|
|
0
|
|
);
|
|
} |