165 lines
4.7 KiB
C
165 lines
4.7 KiB
C
/** @file
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System reset library services.
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2007 - 2021 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains an 'Intel Peripheral Driver' and is uniquely identified as
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"Intel Reference Module" and is licensed for Intel CPUs and chipsets under
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the terms of your license agreement with Intel or your vendor. This file may
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be modified by the user, subject to additional terms of the license agreement.
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@par Specification Reference:
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**/
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#include <Uefi.h>
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#include <Library/IoLib.h>
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#include <Library/DebugLib.h>
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#include <Library/ResetSystemLib.h>
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#include <Library/PmcLib.h>
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#include <Library/BaseLib.h>
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#include <Register/PchRegsLpc.h>
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#include <Register/PmcRegs.h>
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/**
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Calling this function causes a system-wide reset. This sets
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all circuitry within the system to its initial state. This type of reset
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is asynchronous to system operation and operates without regard to
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cycle boundaries.
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System reset should not return, if it returns, it means the system does
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not support cold reset.
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**/
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VOID
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EFIAPI
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ResetCold (
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VOID
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)
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{
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IoWrite8 (R_PCH_IO_RST_CNT, V_PCH_IO_RST_CNT_FULLRESET);
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}
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/**
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Calling this function causes a system-wide initialization. The processors
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are set to their initial state, and pending cycles are not corrupted.
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System reset should not return, if it returns, it means the system does
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not support warm reset.
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**/
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VOID
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EFIAPI
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ResetWarm (
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VOID
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)
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{
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IoWrite8 (R_PCH_IO_RST_CNT, V_PCH_IO_RST_CNT_HARDRESET);
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}
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/**
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Calling this function causes the system to enter a power state equivalent
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to the ACPI G2/S5 or G3 states.
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System shutdown should not return, if it returns, it means the system does
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not support shut down reset.
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**/
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VOID
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EFIAPI
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ResetShutdown (
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VOID
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)
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{
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UINT16 ABase;
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UINT32 Data32;
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ABase = PmcGetAcpiBase ();
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///
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/// Firstly, GPE0_EN should be disabled to avoid any GPI waking up the system from S5
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///
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IoWrite32 (ABase + R_ACPI_IO_GPE0_EN_127_96, 0);
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///
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/// Secondly, PwrSts register must be cleared
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///
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/// Write a "1" to bit[8] of power button status register at
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/// (PM_BASE + PM1_STS_OFFSET) to clear this bit
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///
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IoWrite16 (ABase + R_ACPI_IO_PM1_STS, B_ACPI_IO_PM1_STS_PWRBTN);
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///
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/// Finally, transform system into S5 sleep state
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///
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Data32 = IoRead32 (ABase + R_ACPI_IO_PM1_CNT);
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Data32 = (UINT32) ((Data32 &~(B_ACPI_IO_PM1_CNT_SLP_TYP + B_ACPI_IO_PM1_CNT_SLP_EN)) | V_ACPI_IO_PM1_CNT_S5);
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IoWrite32 (ABase + R_ACPI_IO_PM1_CNT, Data32);
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Data32 = Data32 | B_ACPI_IO_PM1_CNT_SLP_EN;
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IoWrite32 (ABase + R_ACPI_IO_PM1_CNT, Data32);
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return;
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}
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/**
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Calling this function causes the system to enter a power state for platform specific.
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@param[in] DataSize The size of ResetData in bytes.
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@param[in] ResetData Optional element used to introduce a platform specific reset.
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The exact type of the reset is defined by the EFI_GUID that follows
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the Null-terminated Unicode string.
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**/
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VOID
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EFIAPI
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ResetPlatformSpecific (
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IN UINTN DataSize,
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IN VOID *ResetData OPTIONAL
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)
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{
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IoWrite8 (R_PCH_IO_RST_CNT, V_PCH_IO_RST_CNT_FULLRESET);
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}
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/**
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Calling this function causes the system to enter a power state for capsule update.
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Reset update should not return, if it returns, it means the system does
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not support capsule update.
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**/
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VOID
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EFIAPI
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EnterS3WithImmediateWake (
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VOID
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)
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{
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//
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// In case there are pending capsules to process, need to flush the cache.
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//
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AsmWbinvd ();
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ResetWarm ();
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ASSERT (FALSE);
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}
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